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anv: Emit CS stall on INTEL_MEASURE timestamp

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For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573 ("anv: implement u_trace support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>
This commit is contained in:
Felix DeGrood
2023-01-03 19:22:30 +00:00
committed by Marge Bot
parent 0a11cea652
commit 7f6beb8537
5 changed files with 37 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan/genX_cmd_buffer.c
+23 -6
View File
@@ -7808,17 +7808,34 @@ VkResult genX(CmdSetPerformanceStreamMarkerINTEL)(
void genX(cmd_emit_timestamp)(struct anv_batch *batch,
struct anv_device *device,
struct anv_address addr,
bool end_of_pipe) {
if (end_of_pipe) {
enum anv_timestamp_capture_type type) {
switch (type) {
case ANV_TIMESTAMP_CAPTURE_TOP_OF_PIPE: {
struct mi_builder b;
mi_builder_init(&b, device->info, batch);
mi_store(&b, mi_mem64(addr), mi_reg64(TIMESTAMP));
break;
}
case ANV_TIMESTAMP_CAPTURE_END_OF_PIPE:
anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
pc.PostSyncOperation = WriteTimestamp;
pc.Address = addr;
anv_debug_dump_pc(pc);
}
} else {
struct mi_builder b;
mi_builder_init(&b, device->info, batch);
mi_store(&b, mi_mem64(addr), mi_reg64(TIMESTAMP));
break;
case ANV_TIMESTAMP_CAPTURE_AT_CS_STALL:
anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
pc.CommandStreamerStallEnable = true;
pc.PostSyncOperation = WriteTimestamp;
pc.Address = addr;
anv_debug_dump_pc(pc);
}
break;
default:
unreachable("invalid");
}
}