From 7f31917119c7ec13dc7953d906af64bc71f97275 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 5 May 2022 14:18:51 +0200 Subject: [PATCH] radv: limit CP DMA to max 32KB sizes on GFX11 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/si_cmd_buffer.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 7db9a6bb917..376981f0e7e 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -1464,9 +1464,9 @@ si_emit_set_predication_state(struct radv_cmd_buffer *cmd_buffer, bool draw_visi static inline unsigned cp_dma_max_byte_count(struct radv_cmd_buffer *cmd_buffer) { - unsigned max = cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX9 - ? S_415_BYTE_COUNT_GFX9(~0u) - : S_415_BYTE_COUNT_GFX6(~0u); + enum amd_gfx_level gfx_level = cmd_buffer->device->physical_device->rad_info.gfx_level; + unsigned max = gfx_level >= GFX11 ? 32767 : + gfx_level >= GFX9 ? S_415_BYTE_COUNT_GFX9(~0u) : S_415_BYTE_COUNT_GFX6(~0u); /* make it aligned for optimal performance */ return max & ~(SI_CPDMA_ALIGNMENT - 1); @@ -1557,16 +1557,20 @@ si_emit_cp_dma(struct radv_cmd_buffer *cmd_buffer, uint64_t dst_va, uint64_t src void si_cp_dma_prefetch(struct radv_cmd_buffer *cmd_buffer, uint64_t va, unsigned size) { - uint64_t aligned_va = va & ~(SI_CPDMA_ALIGNMENT - 1); - uint64_t aligned_size = - ((va + size + SI_CPDMA_ALIGNMENT - 1) & ~(SI_CPDMA_ALIGNMENT - 1)) - aligned_va; + uint64_t aligned_va, aligned_size; struct radeon_cmdbuf *cs = cmd_buffer->cs; uint32_t header = 0, command = 0; + if (cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX11) + size = MIN2(size, 32768 - SI_CPDMA_ALIGNMENT); + assert(size <= cp_dma_max_byte_count(cmd_buffer)); radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9); + aligned_va = va & ~(SI_CPDMA_ALIGNMENT - 1); + aligned_size = ((va + size + SI_CPDMA_ALIGNMENT - 1) & ~(SI_CPDMA_ALIGNMENT - 1)) - aligned_va; + if (cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX9) { command |= S_415_BYTE_COUNT_GFX9(aligned_size) | S_415_DISABLE_WR_CONFIRM_GFX9(1);