From 7f1c0fbe61045fb1a049c04f653606ba0e29435e Mon Sep 17 00:00:00 2001 From: Yinjie Yao Date: Thu, 29 Aug 2024 14:56:23 -0400 Subject: [PATCH] radeonsi/vcn: Rename transform_skip_disabled and remove hardcoded value for VCN5 This fix the HEVC encode corruption caused by mismatch between PPS header and IB setting, the fix only apply for VCN5. Rename from transform_skip_dicarded to transform_skip_disabled. Signed-off-by: Yinjie Yao Reviewed-by: Ruijing Dong Part-of: --- src/amd/common/ac_vcn_enc.h | 2 +- src/gallium/drivers/radeonsi/radeon_vcn_enc.c | 2 +- src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c | 2 +- src/gallium/drivers/radeonsi/radeon_vcn_enc_3_0.c | 2 +- src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c | 3 +-- 5 files changed, 5 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_vcn_enc.h b/src/amd/common/ac_vcn_enc.h index 7d7fb352823..633cc58b623 100644 --- a/src/amd/common/ac_vcn_enc.h +++ b/src/amd/common/ac_vcn_enc.h @@ -304,7 +304,7 @@ typedef struct rvcn_enc_hevc_spec_misc_s { uint32_t cabac_init_flag; uint32_t half_pel_enabled; uint32_t quarter_pel_enabled; - uint32_t transform_skip_discarded; + uint32_t transform_skip_disabled; uint32_t cu_qp_delta_enabled_flag; } rvcn_enc_hevc_spec_misc_t; diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c index e440b37b2fc..d2661ef0d11 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c @@ -526,7 +526,7 @@ static void radeon_vcn_enc_hevc_get_spec_misc_param(struct radeon_encoder *enc, enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag; enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1; enc->enc_pic.hevc_spec_misc.quarter_pel_enabled = 1; - enc->enc_pic.hevc_spec_misc.transform_skip_discarded = + enc->enc_pic.hevc_spec_misc.transform_skip_disabled = sscreen->info.vcn_ip_version < VCN_3_0_0 || !pic->pic.transform_skip_enabled_flag; } diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c index 577dcff49f0..255de139fd7 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c @@ -784,7 +784,7 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder *enc) radeon_enc_code_ue(enc, pps->num_ref_idx_l1_default_active_minus1); radeon_enc_code_se(enc, 0x0); /* init_qp_minus26 */ radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1); - radeon_enc_code_fixed_bits(enc, !enc->enc_pic.hevc_spec_misc.transform_skip_discarded, 1); + radeon_enc_code_fixed_bits(enc, !enc->enc_pic.hevc_spec_misc.transform_skip_disabled, 1); if (enc->enc_pic.rc_session_init.rate_control_method == RENCODE_RATE_CONTROL_METHOD_NONE && enc->enc_pic.enc_qp_map.qp_map_type == RENCODE_QP_MAP_TYPE_NONE) radeon_enc_code_fixed_bits(enc, 0x0, 1); /* cu_qp_delta_enabled_flag */ diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_3_0.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_3_0.c index 65ff966ca96..3f77ce38942 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_3_0.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_3_0.c @@ -60,7 +60,7 @@ static void radeon_enc_spec_misc_hevc(struct radeon_encoder *enc) RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.cabac_init_flag); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.half_pel_enabled); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.quarter_pel_enabled); - RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.transform_skip_discarded); + RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.transform_skip_disabled); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.cu_qp_delta_enabled_flag); RADEON_ENC_END(); } diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c index e892e9aee79..7875594c431 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c @@ -414,7 +414,6 @@ static void radeon_enc_encode_params_av1(struct radeon_encoder *enc) static void radeon_enc_spec_misc_hevc(struct radeon_encoder *enc) { - enc->enc_pic.hevc_spec_misc.transform_skip_discarded = 0; enc->enc_pic.hevc_spec_misc.cu_qp_delta_enabled_flag = 0; RADEON_ENC_BEGIN(enc->cmd.spec_misc_hevc); @@ -425,7 +424,7 @@ static void radeon_enc_spec_misc_hevc(struct radeon_encoder *enc) RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.cabac_init_flag); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.half_pel_enabled); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.quarter_pel_enabled); - RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.transform_skip_discarded); + RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.transform_skip_disabled); RADEON_ENC_CS(0); RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.cu_qp_delta_enabled_flag); RADEON_ENC_END();