diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 82d5adbc8d5..438a27bbbf6 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -548,7 +548,7 @@ brw_blorp_copy_buffers(struct brw_context *brw, static struct intel_mipmap_tree * -find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) +find_miptree(GLbitfield buffer_bit, struct brw_renderbuffer *irb) { struct intel_mipmap_tree *mt = irb->mt; if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt) @@ -557,7 +557,7 @@ find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) } static int -blorp_get_texture_swizzle(const struct intel_renderbuffer *irb) +blorp_get_texture_swizzle(const struct brw_renderbuffer *irb) { return irb->Base.Base._BaseFormat == GL_RGB ? MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE) : @@ -566,8 +566,8 @@ blorp_get_texture_swizzle(const struct intel_renderbuffer *irb) static void do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit, - struct intel_renderbuffer *src_irb, mesa_format src_format, - struct intel_renderbuffer *dst_irb, mesa_format dst_format, + struct brw_renderbuffer *src_irb, mesa_format src_format, + struct brw_renderbuffer *dst_irb, mesa_format dst_format, GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1, GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, GLenum filter, bool mirror_x, bool mirror_y) @@ -618,15 +618,15 @@ try_blorp_blit(struct brw_context *brw, return true; /* Find buffers */ - struct intel_renderbuffer *src_irb; - struct intel_renderbuffer *dst_irb; + struct brw_renderbuffer *src_irb; + struct brw_renderbuffer *dst_irb; struct intel_mipmap_tree *src_mt; struct intel_mipmap_tree *dst_mt; switch (buffer_bit) { case GL_COLOR_BUFFER_BIT: - src_irb = intel_renderbuffer(read_fb->_ColorReadBuffer); + src_irb = brw_renderbuffer(read_fb->_ColorReadBuffer); for (unsigned i = 0; i < draw_fb->_NumColorDrawBuffers; ++i) { - dst_irb = intel_renderbuffer(draw_fb->_ColorDrawBuffers[i]); + dst_irb = brw_renderbuffer(draw_fb->_ColorDrawBuffers[i]); if (dst_irb) do_blorp_blit(brw, buffer_bit, src_irb, src_irb->Base.Base.Format, @@ -638,9 +638,9 @@ try_blorp_blit(struct brw_context *brw, break; case GL_DEPTH_BUFFER_BIT: src_irb = - intel_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); + brw_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); dst_irb = - intel_renderbuffer(draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer); + brw_renderbuffer(draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer); src_mt = find_miptree(buffer_bit, src_irb); dst_mt = find_miptree(buffer_bit, dst_irb); @@ -664,9 +664,9 @@ try_blorp_blit(struct brw_context *brw, return false; src_irb = - intel_renderbuffer(read_fb->Attachment[BUFFER_STENCIL].Renderbuffer); + brw_renderbuffer(read_fb->Attachment[BUFFER_STENCIL].Renderbuffer); dst_irb = - intel_renderbuffer(draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer); + brw_renderbuffer(draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer); do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE, dst_irb, MESA_FORMAT_NONE, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, @@ -697,7 +697,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw, int width, int height) { struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb); + struct brw_renderbuffer *src_irb = brw_renderbuffer(src_rb); struct brw_texture_image *intel_image = brw_texture_image(dst_image); /* No pixel transfer operations (zoom, bias, mapping), just a blit */ @@ -765,7 +765,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw, src_rb = ctx->ReadBuffer->Attachment[BUFFER_STENCIL].Renderbuffer; if (_mesa_get_format_bits(dst_image->TexFormat, GL_STENCIL_BITS) > 0 && src_rb != NULL) { - src_irb = intel_renderbuffer(src_rb); + src_irb = brw_renderbuffer(src_rb); src_mt = src_irb->mt; if (src_mt->stencil_mt) @@ -1165,7 +1165,7 @@ err: } static bool -set_write_disables(const struct intel_renderbuffer *irb, +set_write_disables(const struct brw_renderbuffer *irb, const unsigned color_mask, bool *color_write_disable) { /* Format information in the renderbuffer represents the requirements @@ -1193,7 +1193,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, bool partial_clear, bool encode_srgb) { struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); uint32_t x0, x1, y0, y1; mesa_format format = irb->Base.Base.Format; @@ -1349,7 +1349,7 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb, { for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) { struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf]; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); /* Only clear the buffers present in the provided mask */ if (((1 << fb->_ColorDrawBufferIndexes[buf]) & mask) == 0) @@ -1420,7 +1420,7 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw, struct intel_mipmap_tree *depth_mt = NULL; if (mask & BUFFER_BIT_DEPTH) { - struct intel_renderbuffer *irb = intel_renderbuffer(depth_rb); + struct brw_renderbuffer *irb = brw_renderbuffer(depth_rb); depth_mt = find_miptree(GL_DEPTH_BUFFER_BIT, irb); level = irb->mt_level; @@ -1439,7 +1439,7 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw, uint8_t stencil_mask = 0; struct intel_mipmap_tree *stencil_mt = NULL; if (mask & BUFFER_BIT_STENCIL) { - struct intel_renderbuffer *irb = intel_renderbuffer(stencil_rb); + struct brw_renderbuffer *irb = brw_renderbuffer(stencil_rb); stencil_mt = find_miptree(GL_STENCIL_BUFFER_BIT, irb); if (mask & BUFFER_BIT_DEPTH) { diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 53404696bbb..d253b4b9cac 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -102,7 +102,7 @@ brw_fast_clear_depth(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *depth_irb = + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); struct intel_mipmap_tree *mt = depth_irb->mt; struct gl_renderbuffer_attachment *depth_att = &fb->Attachment[BUFFER_DEPTH]; @@ -114,7 +114,7 @@ brw_fast_clear_depth(struct gl_context *ctx) if (devinfo->gen < 6) return false; - if (!intel_renderbuffer_has_hiz(depth_irb)) + if (!brw_renderbuffer_has_hiz(depth_irb)) return false; /* We only handle full buffer clears -- otherwise you'd have to track whether diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index e89340fef92..dfbb06f8a51 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -1327,7 +1327,7 @@ intel_gles3_srgb_workaround(struct brw_context *brw, struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer; /* Check if sRGB was specifically asked for. */ - struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, i); + struct brw_renderbuffer *irb = intel_get_renderbuffer(fb, i); if (irb && irb->need_srgb) return; @@ -1405,7 +1405,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, } struct gl_framebuffer *fb = drawable->driverPrivate; - struct intel_renderbuffer *rb; + struct brw_renderbuffer *rb; /* Usually, only the back buffer will need to be downsampled. However, * the front buffer will also need it if the user has rendered into it. @@ -1424,7 +1424,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, rb->layer_count == 1); intel_miptree_prepare_external(brw, rb->mt); } else { - intel_renderbuffer_downsample(brw, rb); + brw_renderbuffer_downsample(brw, rb); /* Call prepare_external on the single-sample miptree to do any * needed resolves prior to handing it off to the window system. @@ -1445,7 +1445,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, } static unsigned -intel_bits_per_pixel(const struct intel_renderbuffer *rb) +intel_bits_per_pixel(const struct brw_renderbuffer *rb) { return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; } @@ -1460,7 +1460,7 @@ static void intel_process_dri2_buffer(struct brw_context *brw, __DRIdrawable *drawable, __DRIbuffer *buffer, - struct intel_renderbuffer *rb, + struct brw_renderbuffer *rb, const char *buffer_name); static void @@ -1470,7 +1470,7 @@ static void intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) { struct gl_framebuffer *fb = drawable->driverPrivate; - struct intel_renderbuffer *rb; + struct brw_renderbuffer *rb; __DRIbuffer *buffers = NULL; int count; const char *region_name; @@ -1612,8 +1612,8 @@ intel_query_dri2_buffers(struct brw_context *brw, int i = 0; unsigned attachments[8]; - struct intel_renderbuffer *front_rb; - struct intel_renderbuffer *back_rb; + struct brw_renderbuffer *front_rb; + struct brw_renderbuffer *back_rb; front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); @@ -1678,7 +1678,7 @@ static void intel_process_dri2_buffer(struct brw_context *brw, __DRIdrawable *drawable, __DRIbuffer *buffer, - struct intel_renderbuffer *rb, + struct brw_renderbuffer *rb, const char *buffer_name) { struct gl_framebuffer *fb = drawable->driverPrivate; @@ -1768,7 +1768,7 @@ intel_process_dri2_buffer(struct brw_context *brw, (buffer->attachment == __DRI_BUFFER_FRONT_LEFT || buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) && rb->Base.Base.NumSamples > 1) { - intel_renderbuffer_upsample(brw, rb); + brw_renderbuffer_upsample(brw, rb); } assert(rb->mt); @@ -1795,7 +1795,7 @@ intel_process_dri2_buffer(struct brw_context *brw, static void intel_update_image_buffer(struct brw_context *intel, __DRIdrawable *drawable, - struct intel_renderbuffer *rb, + struct brw_renderbuffer *rb, __DRIimage *buffer, enum __DRIimageBufferMask buffer_type) { @@ -1847,7 +1847,7 @@ intel_update_image_buffer(struct brw_context *intel, if (_mesa_is_front_buffer_drawing(fb) && buffer_type == __DRI_IMAGE_BUFFER_FRONT && rb->Base.Base.NumSamples > 1) { - intel_renderbuffer_upsample(intel, rb); + brw_renderbuffer_upsample(intel, rb); } if (buffer_type == __DRI_IMAGE_BUFFER_SHARED) { @@ -1885,8 +1885,8 @@ intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) { struct gl_framebuffer *fb = drawable->driverPrivate; __DRIscreen *dri_screen = brw->screen->driScrnPriv; - struct intel_renderbuffer *front_rb; - struct intel_renderbuffer *back_rb; + struct brw_renderbuffer *front_rb; + struct brw_renderbuffer *back_rb; struct __DRIimageList images; mesa_format format; uint32_t buffer_mask = 0; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 571496230d9..544b2909251 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -391,8 +391,8 @@ intel_disable_rb_aux_buffer(struct brw_context *brw, return false; for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - const struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); + const struct brw_renderbuffer *irb = + brw_renderbuffer(fb->_ColorDrawBuffers[i]); if (irb && irb->mt->bo == tex_mt->bo && irb->mt_level >= min_level && @@ -628,7 +628,7 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, bool *draw_aux_buffer_disabled) { struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *depth_irb; + struct brw_renderbuffer *depth_irb; /* Resolve the depth buffer's HiZ buffer. */ depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); @@ -651,8 +651,8 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, assert(brw->screen->devinfo.gen < 9); for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - const struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); + const struct brw_renderbuffer *irb = + brw_renderbuffer(fb->_ColorDrawBuffers[i]); if (irb) { intel_miptree_prepare_texture(brw, irb->mt, irb->mt->surf.format, @@ -665,8 +665,8 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, struct gl_framebuffer *fb = ctx->DrawBuffer; for (int i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); + struct brw_renderbuffer *irb = + brw_renderbuffer(fb->_ColorDrawBuffers[i]); if (irb == NULL || irb->mt == NULL) continue; @@ -714,10 +714,10 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *front_irb = NULL; - struct intel_renderbuffer *back_irb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); - struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct brw_renderbuffer *front_irb = NULL; + struct brw_renderbuffer *back_irb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); struct gl_renderbuffer_attachment *depth_att = &fb->Attachment[BUFFER_DEPTH]; if (_mesa_is_front_buffer_drawing(fb)) @@ -756,8 +756,8 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) } for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); + struct brw_renderbuffer *irb = + brw_renderbuffer(fb->_ColorDrawBuffers[i]); if (!irb) continue; @@ -776,8 +776,8 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) } static void -intel_renderbuffer_move_temp_back(struct brw_context *brw, - struct intel_renderbuffer *irb) +brw_renderbuffer_move_temp_back(struct brw_context *brw, + struct brw_renderbuffer *irb) { if (irb->align_wa_mt == NULL) return; @@ -791,7 +791,7 @@ intel_renderbuffer_move_temp_back(struct brw_context *brw, intel_miptree_reference(&irb->align_wa_mt, NULL); /* Finally restore the x,y to correspond to full miptree. */ - intel_renderbuffer_set_draw_offset(irb); + brw_renderbuffer_set_draw_offset(irb); /* Make sure render surface state gets re-emitted with updated miptree. */ brw->NewGLState |= _NEW_BUFFERS; @@ -803,25 +803,25 @@ brw_postdraw_reconcile_align_wa_slices(struct brw_context *brw) struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *depth_irb = + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *stencil_irb = + struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); if (depth_irb && depth_irb->align_wa_mt) - intel_renderbuffer_move_temp_back(brw, depth_irb); + brw_renderbuffer_move_temp_back(brw, depth_irb); if (stencil_irb && stencil_irb->align_wa_mt) - intel_renderbuffer_move_temp_back(brw, stencil_irb); + brw_renderbuffer_move_temp_back(brw, stencil_irb); for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); + struct brw_renderbuffer *irb = + brw_renderbuffer(fb->_ColorDrawBuffers[i]); if (!irb || irb->align_wa_mt == NULL) continue; - intel_renderbuffer_move_temp_back(brw, irb); + brw_renderbuffer_move_temp_back(brw, irb); } } diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index b530f618afa..50730e8c0d3 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -105,8 +105,8 @@ brw_depthbuffer_format(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *srb; + struct brw_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *srb; if (!drb && (srb = intel_get_renderbuffer(fb, BUFFER_STENCIL)) && @@ -123,17 +123,17 @@ brw_depthbuffer_format(struct brw_context *brw) } static struct intel_mipmap_tree * -get_stencil_miptree(struct intel_renderbuffer *irb) +get_stencil_miptree(struct brw_renderbuffer *irb) { if (!irb) return NULL; if (irb->mt->stencil_mt) return irb->mt->stencil_mt; - return intel_renderbuffer_get_mt(irb); + return brw_renderbuffer_get_mt(irb); } static bool -rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb, +rebase_depth_stencil(struct brw_context *brw, struct brw_renderbuffer *irb, bool invalidate) { const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -163,7 +163,7 @@ rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb, perf_debug("HW workaround: blitting depth level %d to a temporary " "to fix alignment (depth tile offset %d,%d)\n", irb->mt_level, tile_x, tile_y); - intel_renderbuffer_move_to_temp(brw, irb, invalidate); + brw_renderbuffer_move_to_temp(brw, irb, invalidate); /* There is now only single slice miptree. */ brw->depthstencil.tile_x = 0; @@ -201,8 +201,8 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); struct intel_mipmap_tree *depth_mt = NULL; bool invalidate_depth = clear_mask & BUFFER_BIT_DEPTH; bool invalidate_stencil = clear_mask & BUFFER_BIT_STENCIL; @@ -238,7 +238,7 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, stencil_irb != depth_irb && stencil_irb->mt == depth_mt) { intel_miptree_reference(&stencil_irb->mt, depth_irb->mt); - intel_renderbuffer_set_draw_offset(stencil_irb); + brw_renderbuffer_set_draw_offset(stencil_irb); } } @@ -256,9 +256,9 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, static void brw_emit_depth_stencil_hiz(struct brw_context *brw, - struct intel_renderbuffer *depth_irb, + struct brw_renderbuffer *depth_irb, struct intel_mipmap_tree *depth_mt, - struct intel_renderbuffer *stencil_irb, + struct brw_renderbuffer *stencil_irb, struct intel_mipmap_tree *stencil_mt) { uint32_t tile_x = brw->depthstencil.tile_x; @@ -325,9 +325,9 @@ brw_emit_depthbuffer(struct brw_context *brw) struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; /* _NEW_BUFFERS */ - struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); - struct intel_mipmap_tree *depth_mt = intel_renderbuffer_get_mt(depth_irb); + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct intel_mipmap_tree *depth_mt = brw_renderbuffer_get_mt(depth_irb); struct intel_mipmap_tree *stencil_mt = get_stencil_miptree(stencil_irb); if (depth_mt) @@ -383,7 +383,7 @@ brw_emit_depthbuffer(struct brw_context *brw) view.format = depth_mt->surf.format; info.hiz_usage = depth_mt->aux_usage; - if (!intel_renderbuffer_has_hiz(depth_irb)) { + if (!brw_renderbuffer_has_hiz(depth_irb)) { /* Just because a miptree has ISL_AUX_USAGE_HIZ does not mean that * all miplevels of that miptree are guaranteed to support HiZ. See * intel_miptree_level_enable_hiz for details. diff --git a/src/mesa/drivers/dri/i965/brw_object_purgeable.c b/src/mesa/drivers/dri/i965/brw_object_purgeable.c index f0531f6c917..a1e63144fe2 100644 --- a/src/mesa/drivers/dri/i965/brw_object_purgeable.c +++ b/src/mesa/drivers/dri/i965/brw_object_purgeable.c @@ -87,12 +87,12 @@ intel_render_object_purgeable(struct gl_context * ctx, struct gl_renderbuffer *obj, GLenum option) { - struct intel_renderbuffer *intel; + struct brw_renderbuffer *intel; (void) ctx; (void) option; - intel = intel_renderbuffer(obj); + intel = brw_renderbuffer(obj); if (intel->mt == NULL) return GL_RELEASED_APPLE; @@ -158,11 +158,11 @@ intel_render_object_unpurgeable(struct gl_context * ctx, struct gl_renderbuffer *obj, GLenum option) { - struct intel_renderbuffer *intel; + struct brw_renderbuffer *intel; (void) ctx; - intel = intel_renderbuffer(obj); + intel = brw_renderbuffer(obj); if (intel->mt == NULL) return GL_UNDEFINED_APPLE; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 28b3cfa20f7..7357b14a351 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -397,7 +397,7 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key) /* Build the index for table lookup */ if (devinfo->gen < 6) { - struct intel_renderbuffer *depth_irb = + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* _NEW_COLOR */ diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index bcc1431a595..1a7b155340d 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -233,7 +233,7 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, uint32_t surf_index) { struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct intel_mipmap_tree *mt = irb->mt; assert(brw_render_target_supported(brw, rb)); @@ -908,7 +908,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw, { const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct intel_mipmap_tree *mt = irb->mt; uint32_t *surf; uint32_t tile_x, tile_y; @@ -919,7 +919,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw, /* BRW_NEW_FS_PROG_DATA */ if (rb->TexImage && !devinfo->has_surface_tile_offset) { - intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y); + brw_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y); if (tile_x != 0 || tile_y != 0) { /* Original gen4 hardware couldn't draw to a non-tile-aligned @@ -928,7 +928,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw, * select the image. So, instead, we just make a new single-level * miptree and render into that. */ - intel_renderbuffer_move_to_temp(brw, irb, false); + brw_renderbuffer_move_to_temp(brw, irb, false); assert(irb->align_wa_mt); mt = irb->align_wa_mt; } @@ -949,7 +949,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw, assert(mt->offset % mt->cpp == 0); surf[1] = brw_state_reloc(&brw->batch, offset + 4, mt->bo, mt->offset + - intel_renderbuffer_get_tile_offsets(irb, + brw_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y), RELOC_WRITE); @@ -1018,7 +1018,7 @@ update_renderbuffer_surfaces(struct brw_context *brw) for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; - if (intel_renderbuffer(rb)) { + if (brw_renderbuffer(rb)) { surf_offsets[rt_start + i] = devinfo->gen >= 6 ? gen6_update_renderbuffer_surface(brw, rb, i, rt_start + i) : gen4_update_renderbuffer_surface(brw, rb, i, rt_start + i); @@ -1081,7 +1081,7 @@ update_renderbuffer_read_surfaces(struct brw_context *brw) for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; - const struct intel_renderbuffer *irb = intel_renderbuffer(rb); + const struct brw_renderbuffer *irb = brw_renderbuffer(rb); const unsigned surf_index = wm_prog_data->binding_table.render_target_read_start + i; uint32_t *surf_offset = &brw->wm.base.surf_offset[surf_index]; diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 1ea5884f818..cb3b630e0ea 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -48,7 +48,7 @@ pma_fix_enable(const struct brw_context *brw) const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(brw->wm.base.prog_data); /* _NEW_BUFFERS */ - struct intel_renderbuffer *depth_irb = + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* 3DSTATE_WM::ForceThreadDispatch is never used. */ @@ -61,7 +61,7 @@ pma_fix_enable(const struct brw_context *brw) * 3DSTATE_DEPTH_BUFFER::SURFACE_TYPE != NULL && * 3DSTATE_DEPTH_BUFFER::HIZ Enable */ - const bool hiz_enabled = depth_irb && intel_renderbuffer_has_hiz(depth_irb); + const bool hiz_enabled = depth_irb && brw_renderbuffer_has_hiz(depth_irb); /* 3DSTATE_WM::Early Depth/Stencil Control != EDSC_PREPS (2). */ const bool edsc_not_preps = !wm_prog_data->early_fragment_tests; diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 49aa197fcb3..5ab28279408 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -1176,7 +1176,7 @@ set_depth_stencil_bits(struct brw_context *brw, DEPTH_STENCIL_GENXML *ds) struct gl_context *ctx = &brw->ctx; /* _NEW_BUFFERS */ - struct intel_renderbuffer *depth_irb = + struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* _NEW_DEPTH */ diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c index f1df377ab1f..91da417dae7 100644 --- a/src/mesa/drivers/dri/i965/intel_copy_image.c +++ b/src/mesa/drivers/dri/i965/intel_copy_image.c @@ -90,7 +90,7 @@ intel_copy_image_sub_data(struct gl_context *ctx, src_z += src_image->TexObject->Attrib.MinLayer; } else { assert(src_renderbuffer); - src_mt = intel_renderbuffer(src_renderbuffer)->mt; + src_mt = brw_renderbuffer(src_renderbuffer)->mt; src_image = src_renderbuffer->TexImage; src_level = 0; } @@ -107,7 +107,7 @@ intel_copy_image_sub_data(struct gl_context *ctx, dst_z += dst_image->TexObject->Attrib.MinLayer; } else { assert(dst_renderbuffer); - dst_mt = intel_renderbuffer(dst_renderbuffer)->mt; + dst_mt = brw_renderbuffer(dst_renderbuffer)->mt; dst_image = dst_renderbuffer->TexImage; dst_level = 0; } diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index a05f3a1e83c..90f220db9d7 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -57,7 +57,7 @@ static void intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) { - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); assert(irb); @@ -73,8 +73,8 @@ intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) * If the miptree needs no downsample, then skip. */ void -intel_renderbuffer_downsample(struct brw_context *brw, - struct intel_renderbuffer *irb) +brw_renderbuffer_downsample(struct brw_context *brw, + struct brw_renderbuffer *irb) { if (!irb->need_downsample) return; @@ -88,8 +88,8 @@ intel_renderbuffer_downsample(struct brw_context *brw, * The upsample is done unconditionally. */ void -intel_renderbuffer_upsample(struct brw_context *brw, - struct intel_renderbuffer *irb) +brw_renderbuffer_upsample(struct brw_context *brw, + struct brw_renderbuffer *irb) { assert(!irb->need_downsample); @@ -110,7 +110,7 @@ intel_map_renderbuffer(struct gl_context *ctx, { struct brw_context *brw = brw_context(ctx); struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct intel_mipmap_tree *mt; void *map; ptrdiff_t stride; @@ -151,7 +151,7 @@ intel_map_renderbuffer(struct gl_context *ctx, irb->need_downsample = true; } - intel_renderbuffer_downsample(brw, irb); + brw_renderbuffer_downsample(brw, irb); mt = irb->singlesample_mt; irb->need_map_upsample = mode & GL_MAP_WRITE_BIT; @@ -197,7 +197,7 @@ intel_unmap_renderbuffer(struct gl_context *ctx, { struct brw_context *brw = brw_context(ctx); struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct intel_mipmap_tree *mt; DBG("%s: rb %d (%s)\n", __func__, @@ -218,7 +218,7 @@ intel_unmap_renderbuffer(struct gl_context *ctx, intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer); if (irb->need_map_upsample) { - intel_renderbuffer_upsample(brw, irb); + brw_renderbuffer_upsample(brw, irb); irb->need_map_upsample = false; } @@ -247,7 +247,7 @@ intel_quantize_num_samples(struct brw_screen *intel, unsigned num_samples) } static mesa_format -intel_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat) +brw_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat) { struct brw_context *brw = brw_context(ctx); ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -285,7 +285,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend { struct brw_context *brw = brw_context(ctx); struct brw_screen *screen = brw->screen; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); assert(rb->Format != MESA_FORMAT_NONE); @@ -324,7 +324,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer GLenum internalFormat, GLuint width, GLuint height) { - rb->Format = intel_renderbuffer_format(ctx, internalFormat); + rb->Format = brw_renderbuffer_format(ctx, internalFormat); return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height); } @@ -363,7 +363,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx, void *image_handle) { struct brw_context *brw = brw_context(ctx); - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; __DRIscreen *dri_screen = brw->screen->driScrnPriv; __DRIimage *image; @@ -391,7 +391,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx, return; } - irb = intel_renderbuffer(rb); + irb = brw_renderbuffer(rb); intel_miptree_release(&irb->mt); /* Disable creation of the miptree's aux buffers because the driver exposes @@ -445,17 +445,17 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, } /** - * Create an intel_renderbuffer for a __DRIdrawable. This function is + * Create an brw_renderbuffer for a __DRIdrawable. This function is * unrelated to GL renderbuffers (that is, those created by * glGenRenderbuffers). * * \param num_samples must be quantized. */ -struct intel_renderbuffer * +struct brw_renderbuffer * intel_create_winsys_renderbuffer(struct brw_screen *screen, mesa_format format, unsigned num_samples) { - struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer); + struct brw_renderbuffer *irb = CALLOC_STRUCT(brw_renderbuffer); if (!irb) return NULL; @@ -484,11 +484,11 @@ intel_create_winsys_renderbuffer(struct brw_screen *screen, * * \param num_samples must be quantized. */ -struct intel_renderbuffer * +struct brw_renderbuffer * intel_create_private_renderbuffer(struct brw_screen *screen, mesa_format format, unsigned num_samples) { - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; irb = intel_create_winsys_renderbuffer(screen, format, num_samples); irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage; @@ -503,10 +503,10 @@ intel_create_private_renderbuffer(struct brw_screen *screen, static struct gl_renderbuffer * intel_new_renderbuffer(struct gl_context * ctx, GLuint name) { - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; struct gl_renderbuffer *rb; - irb = CALLOC_STRUCT(intel_renderbuffer); + irb = CALLOC_STRUCT(brw_renderbuffer); if (!irb) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer"); return NULL; @@ -526,11 +526,11 @@ intel_new_renderbuffer(struct gl_context * ctx, GLuint name) } static bool -intel_renderbuffer_update_wrapper(struct brw_context *brw, - struct intel_renderbuffer *irb, - struct gl_texture_image *image, - uint32_t layer, - bool layered) +brw_renderbuffer_update_wrapper(struct brw_context *brw, + struct brw_renderbuffer *irb, + struct gl_texture_image *image, + uint32_t layer, + bool layered) { struct gl_renderbuffer *rb = &irb->Base.Base; struct brw_texture_image *intel_image = brw_texture_image(image); @@ -559,13 +559,13 @@ intel_renderbuffer_update_wrapper(struct brw_context *brw, intel_miptree_reference(&irb->mt, mt); - intel_renderbuffer_set_draw_offset(irb); + brw_renderbuffer_set_draw_offset(irb); return true; } void -intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb) +brw_renderbuffer_set_draw_offset(struct brw_renderbuffer *irb) { unsigned int dst_x, dst_y; @@ -592,7 +592,7 @@ intel_render_texture(struct gl_context * ctx, { struct brw_context *brw = brw_context(ctx); struct gl_renderbuffer *rb = att->Renderbuffer; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct gl_texture_image *image = rb->TexImage; struct brw_texture_image *intel_image = brw_texture_image(image); struct intel_mipmap_tree *mt = intel_image->mt; @@ -617,7 +617,7 @@ intel_render_texture(struct gl_context * ctx, intel_miptree_check_level_layer(mt, att->TextureLevel, layer); - if (!intel_renderbuffer_update_wrapper(brw, irb, image, layer, att->Layered)) { + if (!brw_renderbuffer_update_wrapper(brw, irb, image, layer, att->Layered)) { _swrast_render_texture(ctx, fb, att); return; } @@ -650,9 +650,9 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) { struct brw_context *brw = brw_context(ctx); const struct gen_device_info *devinfo = &brw->screen->devinfo; - struct intel_renderbuffer *depthRb = + struct brw_renderbuffer *depthRb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct intel_renderbuffer *stencilRb = + struct brw_renderbuffer *stencilRb = intel_get_renderbuffer(fb, BUFFER_STENCIL); struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; unsigned i; @@ -724,7 +724,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) "instead of S8\n", _mesa_get_format_name(stencil_mt->format)); } - if (devinfo->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) { + if (devinfo->gen < 7 && !brw_renderbuffer_has_hiz(depthRb)) { /* Before Gen7, separate depth and stencil buffers can be used * only if HiZ is enabled. From the Sandybridge PRM, Volume 2, * Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable: @@ -739,7 +739,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) for (i = 0; i < ARRAY_SIZE(fb->Attachment); i++) { struct gl_renderbuffer *rb; - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; if (fb->Attachment[i].Type == GL_NONE) continue; @@ -764,7 +764,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) } } - irb = intel_renderbuffer(rb); + irb = brw_renderbuffer(rb); if (irb == NULL) { fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED, "FBO incomplete: software rendering renderbuffer\n"); @@ -815,7 +815,7 @@ intel_blit_framebuffer_with_blitter(struct gl_context *ctx, if (mask & GL_COLOR_BUFFER_BIT) { unsigned i; struct gl_renderbuffer *src_rb = readFb->_ColorReadBuffer; - struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb); + struct brw_renderbuffer *src_irb = brw_renderbuffer(src_rb); if (!src_irb) { perf_debug("glBlitFramebuffer(): missing src renderbuffer. " @@ -851,7 +851,7 @@ intel_blit_framebuffer_with_blitter(struct gl_context *ctx, */ for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) { struct gl_renderbuffer *dst_rb = drawFb->_ColorDrawBuffers[i]; - struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb); + struct brw_renderbuffer *dst_irb = brw_renderbuffer(dst_rb); if (!dst_irb) { perf_debug("glBlitFramebuffer(): missing dst renderbuffer. " @@ -953,14 +953,14 @@ intel_blit_framebuffer(struct gl_context *ctx, * Does the renderbuffer have hiz enabled? */ bool -intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb) +brw_renderbuffer_has_hiz(struct brw_renderbuffer *irb) { return intel_miptree_level_has_hiz(irb->mt, irb->mt_level); } void -intel_renderbuffer_move_to_temp(struct brw_context *brw, - struct intel_renderbuffer *irb, +brw_renderbuffer_move_to_temp(struct brw_context *brw, + struct brw_renderbuffer *irb, bool invalidate) { struct gl_renderbuffer *rb =&irb->Base.Base; diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index ad724f88e87..faf412a4fe7 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -43,7 +43,7 @@ struct intel_mipmap_tree; /** * Intel renderbuffer, derived from gl_renderbuffer. */ -struct intel_renderbuffer +struct brw_renderbuffer { struct swrast_renderbuffer Base; /** @@ -73,7 +73,7 @@ struct intel_renderbuffer * the only option is to use temporary single slice surface which driver * copies after rendering to the full miptree. * - * See intel_renderbuffer_move_to_temp(). + * See brw_renderbuffer_move_to_temp(). */ struct intel_mipmap_tree *align_wa_mt; @@ -106,7 +106,7 @@ struct intel_renderbuffer bool need_downsample; /** - * Set to true when doing an intel_renderbuffer_map()/unmap() that requires + * Set to true when doing an brw_renderbuffer_map()/unmap() that requires * an upsample at the end. */ bool need_map_upsample; @@ -132,14 +132,14 @@ struct intel_renderbuffer /** - * Return a gl_renderbuffer ptr casted to intel_renderbuffer. - * NULL will be returned if the rb isn't really an intel_renderbuffer. + * Return a gl_renderbuffer ptr casted to brw_renderbuffer. + * NULL will be returned if the rb isn't really an brw_renderbuffer. * This is determined by checking the ClassID. */ -static inline struct intel_renderbuffer * -intel_renderbuffer(struct gl_renderbuffer *rb) +static inline struct brw_renderbuffer * +brw_renderbuffer(struct gl_renderbuffer *rb) { - struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; + struct brw_renderbuffer *irb = (struct brw_renderbuffer *) rb; if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) return irb; else @@ -147,7 +147,7 @@ intel_renderbuffer(struct gl_renderbuffer *rb) } static inline struct intel_mipmap_tree * -intel_renderbuffer_get_mt(struct intel_renderbuffer *irb) +brw_renderbuffer_get_mt(struct brw_renderbuffer *irb) { if (!irb) return NULL; @@ -163,7 +163,7 @@ intel_renderbuffer_get_mt(struct intel_renderbuffer *irb) * If the attached renderbuffer is a wrapper, then return wrapped * renderbuffer. */ -static inline struct intel_renderbuffer * +static inline struct brw_renderbuffer * intel_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex) { struct gl_renderbuffer *rb; @@ -174,21 +174,21 @@ intel_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex) if (!rb) return NULL; - return intel_renderbuffer(rb); + return brw_renderbuffer(rb); } static inline mesa_format -intel_rb_format(const struct intel_renderbuffer *rb) +intel_rb_format(const struct brw_renderbuffer *rb) { return rb->Base.Base.Format; } -extern struct intel_renderbuffer * +extern struct brw_renderbuffer * intel_create_winsys_renderbuffer(struct brw_screen *screen, mesa_format format, unsigned num_samples); -struct intel_renderbuffer * +struct brw_renderbuffer * intel_create_private_renderbuffer(struct brw_screen *screen, mesa_format format, unsigned num_samples); @@ -201,12 +201,12 @@ extern void intel_fbo_init(struct brw_context *brw); void -intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb); +brw_renderbuffer_set_draw_offset(struct brw_renderbuffer *irb); static inline uint32_t -intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb, - uint32_t *tile_x, - uint32_t *tile_y) +brw_renderbuffer_get_tile_offsets(struct brw_renderbuffer *irb, + uint32_t *tile_x, + uint32_t *tile_y) { if (irb->align_wa_mt) { *tile_x = 0; @@ -219,20 +219,20 @@ intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb, } bool -intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb); +brw_renderbuffer_has_hiz(struct brw_renderbuffer *irb); -void intel_renderbuffer_move_to_temp(struct brw_context *brw, - struct intel_renderbuffer *irb, +void brw_renderbuffer_move_to_temp(struct brw_context *brw, + struct brw_renderbuffer *irb, bool invalidate); void -intel_renderbuffer_downsample(struct brw_context *brw, - struct intel_renderbuffer *irb); +brw_renderbuffer_downsample(struct brw_context *brw, + struct brw_renderbuffer *irb); void -intel_renderbuffer_upsample(struct brw_context *brw, - struct intel_renderbuffer *irb); +brw_renderbuffer_upsample(struct brw_context *brw, + struct brw_renderbuffer *irb); void brw_cache_sets_clear(struct brw_context *brw); void brw_cache_flush_for_read(struct brw_context *brw, struct brw_bo *bo); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 2af9d122f8f..22e6293251b 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -899,13 +899,13 @@ intel_miptree_create_for_dri_image(struct brw_context *brw, * * For a multisample renderbuffer, this wraps the window system's * (singlesample) BO with a singlesample miptree attached to the - * intel_renderbuffer, then creates a multisample miptree attached to irb->mt + * brw_renderbuffer, then creates a multisample miptree attached to irb->mt * that will contain the actual rendering (which is lazily resolved to * irb->singlesample_mt). */ bool intel_update_winsys_renderbuffer_miptree(struct brw_context *intel, - struct intel_renderbuffer *irb, + struct brw_renderbuffer *irb, struct intel_mipmap_tree *singlesample_mt, uint32_t width, uint32_t height, uint32_t pitch) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 48482b149b8..0609133a0ae 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -58,7 +58,7 @@ extern "C" { #endif struct brw_context; -struct intel_renderbuffer; +struct brw_renderbuffer; struct brw_texture_image; @@ -403,7 +403,7 @@ intel_miptree_create_for_dri_image(struct brw_context *brw, bool intel_update_winsys_renderbuffer_miptree(struct brw_context *intel, - struct intel_renderbuffer *irb, + struct brw_renderbuffer *irb, struct intel_mipmap_tree *singlesample_mt, uint32_t width, uint32_t height, uint32_t pitch); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c index 92ebe7a7d16..5918a8a7ee8 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c @@ -176,7 +176,7 @@ do_blit_bitmap( struct gl_context *ctx, { struct brw_context *brw = brw_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; GLfloat tmpColor[4]; GLubyte ubcolor[4]; GLuint color; @@ -206,7 +206,7 @@ do_blit_bitmap( struct gl_context *ctx, return false; } - irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); + irb = brw_renderbuffer(fb->_ColorDrawBuffers[0]); if (unpack->BufferObj) { bitmap = map_pbo(ctx, width, height, unpack, bitmap); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index dbcd14824e3..1752c2a7a19 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -57,8 +57,8 @@ do_blit_copypixels(struct gl_context * ctx, GLint orig_dsty; GLint orig_srcx; GLint orig_srcy; - struct intel_renderbuffer *draw_irb = NULL; - struct intel_renderbuffer *read_irb = NULL; + struct brw_renderbuffer *draw_irb = NULL; + struct brw_renderbuffer *read_irb = NULL; /* Update draw buffer bounds */ _mesa_update_state(ctx); @@ -72,13 +72,13 @@ do_blit_copypixels(struct gl_context * ctx, return false; } - draw_irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); - read_irb = intel_renderbuffer(read_fb->_ColorReadBuffer); + draw_irb = brw_renderbuffer(fb->_ColorDrawBuffers[0]); + read_irb = brw_renderbuffer(read_fb->_ColorReadBuffer); break; case GL_DEPTH_STENCIL_EXT: - draw_irb = intel_renderbuffer(fb->Attachment[BUFFER_DEPTH].Renderbuffer); + draw_irb = brw_renderbuffer(fb->Attachment[BUFFER_DEPTH].Renderbuffer); read_irb = - intel_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); + brw_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); break; case GL_DEPTH: perf_debug("glCopyPixels() fallback: GL_DEPTH\n"); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c index 8a29fa772e0..1822e56c9cc 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c @@ -72,7 +72,7 @@ do_blit_drawpixels(struct gl_context * ctx, intel_prepare_render(brw); struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); mesa_format src_format = _mesa_format_from_format_and_type(format, type); if (_mesa_format_is_mesa_array_format(src_format)) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 5f40e035535..bb4a93a8249 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -79,7 +79,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, if (rb == NULL) return false; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); int dst_pitch; /* The miptree's buffer. */ @@ -225,7 +225,7 @@ intel_readpixels_blorp(struct gl_context *ctx, if (!rb) return false; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); /* _mesa_get_readpixels_transfer_ops() includes the cases of read * color clamping along with the ctx->_ImageTransferState. diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 93342450e87..75e642f7f48 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -550,7 +550,7 @@ intel_create_image_from_renderbuffer(__DRIcontext *context, struct brw_context *brw = context->driverPrivate; struct gl_context *ctx = &brw->ctx; struct gl_renderbuffer *rb; - struct intel_renderbuffer *irb; + struct brw_renderbuffer *irb; rb = _mesa_lookup_renderbuffer(ctx, renderbuffer); if (!rb) { @@ -558,7 +558,7 @@ intel_create_image_from_renderbuffer(__DRIcontext *context, return NULL; } - irb = intel_renderbuffer(rb); + irb = brw_renderbuffer(rb); intel_miptree_make_shareable(brw, irb->mt); image = calloc(1, sizeof *image); if (image == NULL) @@ -1749,7 +1749,7 @@ intelCreateBuffer(__DRIscreen *dri_screen, __DRIdrawable * driDrawPriv, const struct gl_config * mesaVis, GLboolean isPixmap) { - struct intel_renderbuffer *rb; + struct brw_renderbuffer *rb; struct brw_screen *screen = (struct brw_screen *) dri_screen->driverPrivate; mesa_format rgbFormat; diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index d3ba9934c03..072ab791f0c 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -438,7 +438,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, struct gl_framebuffer *fb = dPriv->driverPrivate; struct brw_context *brw = pDRICtx->driverPrivate; struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *rb; + struct brw_renderbuffer *rb; struct gl_texture_object *texObj; struct gl_texture_image *texImage; mesa_format texFormat = MESA_FORMAT_NONE; @@ -563,7 +563,7 @@ intel_bind_renderbuffer_tex_image(struct gl_context *ctx, struct gl_renderbuffer *rb, struct gl_texture_image *image) { - struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct brw_texture_image *intel_image = brw_texture_image(image); struct gl_texture_object *texobj = image->TexObject; struct brw_texture_object *intel_texobj = brw_texture_object(texobj);