diff --git a/src/intel/compiler/brw_mesh.cpp b/src/intel/compiler/brw_mesh.cpp
index 5faa75ba1fa..4ee76c99a08 100644
--- a/src/intel/compiler/brw_mesh.cpp
+++ b/src/intel/compiler/brw_mesh.cpp
@@ -1563,9 +1563,9 @@ fs_visitor::nir_emit_task_mesh_intrinsic(const fs_builder &bld,
    case nir_intrinsic_load_num_workgroups:
       assert(!nir->info.mesh.nv);
       dest = retype(dest, BRW_REGISTER_TYPE_UD);
-      bld.SHR(offset(dest, bld, 0), retype(brw_vec1_grf(0, 6), dest.type), brw_imm_ud(16));
-      bld.AND(offset(dest, bld, 1), retype(brw_vec1_grf(0, 4), dest.type), brw_imm_ud(0xffff));
-      bld.SHR(offset(dest, bld, 2), retype(brw_vec1_grf(0, 4), dest.type), brw_imm_ud(16));
+      bld.MOV(offset(dest, bld, 0), brw_uw1_grf(0, 13)); /* g0.6 >> 16 */
+      bld.MOV(offset(dest, bld, 1), brw_uw1_grf(0, 8));  /* g0.4 & 0xffff */
+      bld.MOV(offset(dest, bld, 2), brw_uw1_grf(0, 9));  /* g0.4 >> 16 */
       break;
 
    case nir_intrinsic_load_workgroup_index:
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 97869f65d96..47ea456b265 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -807,6 +807,12 @@ brw_vecn_grf(unsigned width, unsigned nr, unsigned subnr)
 }
 
 
+static inline struct brw_reg
+brw_uw1_grf(unsigned nr, unsigned subnr)
+{
+   return brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
+}
+
 static inline struct brw_reg
 brw_uw8_grf(unsigned nr, unsigned subnr)
 {