From 6cd3534676a58e92ac479eee7040df2ad27fdac0 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 3 Jun 2011 15:24:55 +1000 Subject: [PATCH 1/8] r600g: don't need to call the packet dirty function if not dirty. also fix a unneeded dirty check and add a dirty check speedup. Signed-off-by: Dave Airlie --- .../winsys/r600/drm/evergreen_hw_context.c | 7 ++++--- src/gallium/winsys/r600/drm/r600_hw_context.c | 20 +++++++++++-------- 2 files changed, 16 insertions(+), 11 deletions(-) diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index cf8ae5185b4..aa789e69d19 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -1066,8 +1066,8 @@ static inline void evergreen_context_pipe_state_set_sampler(struct r600_context block->reg[i] = state->regs[i].value; } } - - r600_context_dirty_block(ctx, block, dirty, 2); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, 2); } static inline void evergreen_context_ps_partial_flush(struct r600_context *ctx) @@ -1119,7 +1119,8 @@ static inline void evergreen_context_pipe_state_set_sampler_border(struct r600_c if (dirty & R600_BLOCK_STATUS_DIRTY) evergreen_context_ps_partial_flush(ctx); - r600_context_dirty_block(ctx, block, dirty, 4); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, 4); } void evergreen_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id) diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index a3c8945a722..4c21d606723 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -920,13 +920,14 @@ void r600_context_reg(struct r600_context *ctx, dirty |= R600_BLOCK_STATUS_DIRTY; block->reg[id] = new_val; } - r600_context_dirty_block(ctx, block, dirty, id); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, id); } void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, int dirty, int index) { - if (dirty && (index + 1) > block->nreg_dirty) + if ((index + 1) > block->nreg_dirty) block->nreg_dirty = index + 1; if ((dirty != (block->status & R600_BLOCK_STATUS_DIRTY)) || !(block->status & R600_BLOCK_STATUS_ENABLED)) { @@ -970,7 +971,8 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat dirty |= R600_BLOCK_STATUS_DIRTY; } - r600_context_dirty_block(ctx, block, dirty, id); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, id); } } @@ -998,7 +1000,7 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ dirty = block->status & R600_BLOCK_STATUS_DIRTY; for (i = 0; i < num_regs; i++) { - if (block->reg[i] != state->regs[i].value) { + if (dirty || (block->reg[i] != state->regs[i].value)) { dirty |= R600_BLOCK_STATUS_DIRTY; block->reg[i] = state->regs[i].value; } @@ -1045,7 +1047,8 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ state->regs[2].bo->bo->binding |= BO_BOUND_TEXTURE; } } - r600_context_dirty_block(ctx, block, dirty, num_regs - 1); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, num_regs - 1); } void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) @@ -1091,7 +1094,8 @@ static inline void r600_context_pipe_state_set_sampler(struct r600_context *ctx, } } - r600_context_dirty_block(ctx, block, dirty, 2); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, 2); } static inline void r600_context_ps_partial_flush(struct r600_context *ctx) @@ -1135,8 +1139,8 @@ static inline void r600_context_pipe_state_set_sampler_border(struct r600_contex * will end up using the new border color. */ if (dirty & R600_BLOCK_STATUS_DIRTY) r600_context_ps_partial_flush(ctx); - - r600_context_dirty_block(ctx, block, dirty, 3); + if (dirty) + r600_context_dirty_block(ctx, block, dirty, 3); } void r600_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id) From eb4bb48ef41483750fa678ab21ef52accbf4e628 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 6 Jun 2011 11:15:10 +1000 Subject: [PATCH 2/8] r600g: only call bo loop if nbos is positive. we don't need to loop over all the registers unless we have some bos in the block, also avoid setting the ctx flags, and move the optional stuff down below this chunk. Signed-off-by: Dave Airlie --- src/gallium/winsys/r600/drm/r600_hw_context.c | 34 ++++++++++--------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 4c21d606723..1be485400fc 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -1183,31 +1183,33 @@ void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block * { int id; int optional = block->nbo == 0 && !(block->flags & REG_FLAG_DIRTY_ALWAYS); - int cp_dwords = block->pm4_ndwords, start_dword; - int new_dwords; + int cp_dwords = block->pm4_ndwords, start_dword = 0; + int new_dwords = 0; if (block->nreg_dirty == 0 && optional) { goto out; } - optional &= (block->nreg_dirty != block->nreg); + if (block->nbo) { + ctx->flags |= R600_CONTEXT_CHECK_EVENT_FLUSH; - ctx->flags |= R600_CONTEXT_CHECK_EVENT_FLUSH; - for (int j = 0; j < block->nreg; j++) { - if (block->pm4_bo_index[j]) { - /* find relocation */ - id = block->pm4_bo_index[j]; - r600_context_bo_reloc(ctx, - &block->pm4[block->reloc[id].bo_pm4_index], - block->reloc[id].bo); - r600_context_bo_flush(ctx, - block->reloc[id].flush_flags, - block->reloc[id].flush_mask, - block->reloc[id].bo); + for (int j = 0; j < block->nreg; j++) { + if (block->pm4_bo_index[j]) { + /* find relocation */ + id = block->pm4_bo_index[j]; + r600_context_bo_reloc(ctx, + &block->pm4[block->reloc[id].bo_pm4_index], + block->reloc[id].bo); + r600_context_bo_flush(ctx, + block->reloc[id].flush_flags, + block->reloc[id].flush_mask, + block->reloc[id].bo); + } } + ctx->flags &= ~R600_CONTEXT_CHECK_EVENT_FLUSH; } - ctx->flags &= ~R600_CONTEXT_CHECK_EVENT_FLUSH; + optional &= (block->nreg_dirty != block->nreg); if (optional) { new_dwords = block->nreg_dirty; start_dword = ctx->pm4_cdwords; From cf0f02e501eb2eb8edcf2c4f6db826b0cdd31c9b Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 3 Jun 2011 15:34:31 +1000 Subject: [PATCH 3/8] r600g: move resource setting to its own structures. resource setting could be a fair bit more lightweight, this patch just separates the resource structs from the standard reg tracking structs in the driver, later patches will improve the winsys. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/evergreen_state.c | 106 +++++++----------- src/gallium/drivers/r600/r600.h | 18 ++- src/gallium/drivers/r600/r600_pipe.h | 20 ++-- src/gallium/drivers/r600/r600_state.c | 94 +++++++--------- src/gallium/drivers/r600/r600_state_common.c | 16 +-- .../winsys/r600/drm/evergreen_hw_context.c | 6 +- src/gallium/winsys/r600/drm/r600_hw_context.c | 50 +++++---- src/gallium/winsys/r600/drm/r600_priv.h | 2 +- 8 files changed, 140 insertions(+), 172 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 54f5410c324..17abdff49cd 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -380,9 +380,8 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte struct pipe_resource *texture, const struct pipe_sampler_view *state) { - struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_sampler_view *resource = CALLOC_STRUCT(r600_pipe_sampler_view); - struct r600_pipe_state *rstate; + struct r600_pipe_resource_state *rstate; const struct util_format_description *desc; struct r600_resource_texture *tmp; struct r600_resource *rbuffer; @@ -438,35 +437,27 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte array_mode = tmp->array_mode[0]; tile_type = tmp->tile_type; - r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0, - S_030000_DIM(r600_tex_dim(texture->target)) | - S_030000_PITCH((pitch / 8) - 1) | - S_030000_NON_DISP_TILING_ORDER(tile_type) | - S_030000_TEX_WIDTH(texture->width0 - 1), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1, - S_030004_TEX_HEIGHT(texture->height0 - 1) | - S_030004_TEX_DEPTH(texture->depth0 - 1) | - S_030004_ARRAY_MODE(array_mode), - 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2, - (tmp->offset[0] + r600_bo_offset(bo[0])) >> 8, 0xFFFFFFFF, bo[0]); - r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3, - (tmp->offset[1] + r600_bo_offset(bo[1])) >> 8, 0xFFFFFFFF, bo[1]); - r600_pipe_state_add_reg(rstate, R_030010_RESOURCE0_WORD4, - word4 | - S_030010_SRF_MODE_ALL(V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) | - S_030010_ENDIAN_SWAP(endian) | - S_030010_BASE_LEVEL(state->u.tex.first_level), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030014_RESOURCE0_WORD5, - S_030014_LAST_LEVEL(state->u.tex.last_level) | - S_030014_BASE_ARRAY(0) | - S_030014_LAST_ARRAY(0), 0xffffffff, NULL); - r600_pipe_state_add_reg(rstate, R_030018_RESOURCE0_WORD6, - S_030018_MAX_ANISO(4 /* max 16 samples */), - 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_03001C_RESOURCE0_WORD7, - S_03001C_DATA_FORMAT(format) | - S_03001C_TYPE(V_03001C_SQ_TEX_VTX_VALID_TEXTURE), 0xFFFFFFFF, NULL); + rstate->bo[0] = bo[0]; + rstate->bo[1] = bo[1]; + rstate->val[0] = (S_030000_DIM(r600_tex_dim(texture->target)) | + S_030000_PITCH((pitch / 8) - 1) | + S_030000_NON_DISP_TILING_ORDER(tile_type) | + S_030000_TEX_WIDTH(texture->width0 - 1)); + rstate->val[1] = (S_030004_TEX_HEIGHT(texture->height0 - 1) | + S_030004_TEX_DEPTH(texture->depth0 - 1) | + S_030004_ARRAY_MODE(array_mode)); + rstate->val[2] = (tmp->offset[0] + r600_bo_offset(bo[0])) >> 8; + rstate->val[3] = (tmp->offset[1] + r600_bo_offset(bo[1])) >> 8; + rstate->val[4] = (word4 | + S_030010_SRF_MODE_ALL(V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) | + S_030010_ENDIAN_SWAP(endian) | + S_030010_BASE_LEVEL(state->u.tex.first_level)); + rstate->val[5] = (S_030014_LAST_LEVEL(state->u.tex.last_level) | + S_030014_BASE_ARRAY(0) | + S_030014_LAST_ARRAY(0)); + rstate->val[6] = (S_030018_MAX_ANISO(4 /* max 16 samples */)); + rstate->val[7] = (S_03001C_DATA_FORMAT(format) | + S_03001C_TYPE(V_03001C_SQ_TEX_VTX_VALID_TEXTURE)); return &resource->base; } @@ -1769,45 +1760,32 @@ void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx) } void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, - struct r600_pipe_state *rstate, - struct r600_resource *rbuffer, - unsigned offset, unsigned stride) + struct r600_pipe_resource_state *rstate) { rstate->id = R600_PIPE_STATE_RESOURCE; - rstate->nregs = 0; - r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0, - offset, 0xFFFFFFFF, rbuffer->bo); - r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1, - rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2, - S_030008_ENDIAN_SWAP(r600_endian_swap(32)) | - S_030008_STRIDE(stride), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3, - S_03000C_DST_SEL_X(V_03000C_SQ_SEL_X) | - S_03000C_DST_SEL_Y(V_03000C_SQ_SEL_Y) | - S_03000C_DST_SEL_Z(V_03000C_SQ_SEL_Z) | - S_03000C_DST_SEL_W(V_03000C_SQ_SEL_W), - 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030010_RESOURCE0_WORD4, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030014_RESOURCE0_WORD5, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_030018_RESOURCE0_WORD6, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_03001C_RESOURCE0_WORD7, - 0xC0000000, 0xFFFFFFFF, NULL); + + rstate->val[0] = 0; + rstate->bo[0] = NULL; + rstate->val[1] = 0; + rstate->val[2] = S_030008_ENDIAN_SWAP(r600_endian_swap(32)); + rstate->val[3] = S_03000C_DST_SEL_X(V_03000C_SQ_SEL_X) | + S_03000C_DST_SEL_Y(V_03000C_SQ_SEL_Y) | + S_03000C_DST_SEL_Z(V_03000C_SQ_SEL_Z) | + S_03000C_DST_SEL_W(V_03000C_SQ_SEL_W); + rstate->val[4] = 0; + rstate->val[5] = 0; + rstate->val[6] = 0; + rstate->val[7] = 0xc0000000; } -void evergreen_pipe_mod_buffer_resource(struct r600_pipe_state *rstate, +void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, struct r600_resource *rbuffer, unsigned offset, unsigned stride) { - rstate->nregs = 0; - r600_pipe_state_mod_reg_bo(rstate, offset, rbuffer->bo); - r600_pipe_state_mod_reg(rstate, rbuffer->bo_size - offset - 1); - r600_pipe_state_mod_reg(rstate, S_030008_ENDIAN_SWAP(r600_endian_swap(32)) | - S_030008_STRIDE(stride)); - rstate->nregs = 8; - + rstate->bo[0] = rbuffer->bo; + rstate->val[0] = offset; + rstate->val[1] = rbuffer->bo_size - offset - 1; + rstate->val[2] = S_030008_ENDIAN_SWAP(r600_endian_swap(32)) | + S_030008_STRIDE(stride); } diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index 23e7181a86e..5d6240aef24 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -170,6 +170,12 @@ struct r600_pipe_state { struct r600_pipe_reg regs[R600_BLOCK_MAX_REG]; }; +struct r600_pipe_resource_state { + unsigned id; + u32 val[8]; + struct r600_bo *bo[2]; +}; + #define R600_BLOCK_STATUS_ENABLED (1 << 0) #define R600_BLOCK_STATUS_DIRTY (1 << 1) @@ -275,9 +281,9 @@ struct r600_draw { int r600_context_init(struct r600_context *ctx, struct radeon *radeon); void r600_context_fini(struct r600_context *ctx); void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state); -void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); -void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); -void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); +void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); +void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); +void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); void r600_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); void r600_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); void r600_context_flush(struct r600_context *ctx); @@ -303,9 +309,9 @@ void r600_context_flush_dest_caches(struct r600_context *ctx); int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon); void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *draw); void evergreen_context_flush_dest_caches(struct r600_context *ctx); -void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); -void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); -void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); +void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); +void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); +void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid); void evergreen_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 8002d943abd..f40d6fd3fa2 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -82,7 +82,7 @@ struct r600_screen { struct r600_pipe_sampler_view { struct pipe_sampler_view base; - struct r600_pipe_state state; + struct r600_pipe_resource_state state; }; struct r600_pipe_rasterizer { @@ -173,7 +173,7 @@ struct r600_pipe_context { struct r600_pipe_state *states[R600_PIPE_NSTATES]; struct r600_context ctx; struct r600_vertex_element *vertex_elements; - struct r600_pipe_state fs_resource[PIPE_MAX_ATTRIBS]; + struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS]; struct pipe_framebuffer_state framebuffer; struct pipe_index_buffer index_buffer; unsigned cb_target_mask; @@ -185,9 +185,9 @@ struct r600_pipe_context { struct r600_pipe_shader *ps_shader; struct r600_pipe_shader *vs_shader; struct r600_pipe_state vs_const_buffer; - struct r600_pipe_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; + struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; struct r600_pipe_state ps_const_buffer; - struct r600_pipe_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; + struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; struct r600_pipe_rasterizer *rasterizer; struct r600_pipe_state vgt; struct r600_pipe_state spi; @@ -224,10 +224,8 @@ void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, - struct r600_pipe_state *rstate, - struct r600_resource *rbuffer, - unsigned offset, unsigned stride); -void evergreen_pipe_mod_buffer_resource(struct r600_pipe_state *rstate, + struct r600_pipe_resource_state *rstate); +void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, struct r600_resource *rbuffer, unsigned offset, unsigned stride); @@ -268,10 +266,8 @@ void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve) void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); void r600_polygon_offset_update(struct r600_pipe_context *rctx); void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, - struct r600_pipe_state *rstate, - struct r600_resource *rbuffer, - unsigned offset, unsigned stride); -void r600_pipe_mod_buffer_resource(struct r600_pipe_state *rstate, + struct r600_pipe_resource_state *rstate); +void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, struct r600_resource *rbuffer, unsigned offset, unsigned stride); diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index e9011de9fe0..4e62857343e 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -409,7 +409,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c { struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_sampler_view *resource = CALLOC_STRUCT(r600_pipe_sampler_view); - struct r600_pipe_state *rstate; + struct r600_pipe_resource_state *rstate; const struct util_format_description *desc; struct r600_resource_texture *tmp; struct r600_resource *rbuffer; @@ -472,33 +472,29 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c depth = texture->array_size; } - r600_pipe_state_add_reg(rstate, R_038000_RESOURCE0_WORD0, - S_038000_DIM(r600_tex_dim(texture->target)) | - S_038000_TILE_MODE(array_mode) | - S_038000_TILE_TYPE(tile_type) | - S_038000_PITCH((pitch / 8) - 1) | - S_038000_TEX_WIDTH(texture->width0 - 1), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038004_RESOURCE0_WORD1, - S_038004_TEX_HEIGHT(height - 1) | - S_038004_TEX_DEPTH(depth - 1) | - S_038004_DATA_FORMAT(format), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038008_RESOURCE0_WORD2, - (tmp->offset[0] + r600_bo_offset(bo[0])) >> 8, 0xFFFFFFFF, bo[0]); - r600_pipe_state_add_reg(rstate, R_03800C_RESOURCE0_WORD3, - (tmp->offset[1] + r600_bo_offset(bo[1])) >> 8, 0xFFFFFFFF, bo[1]); - r600_pipe_state_add_reg(rstate, R_038010_RESOURCE0_WORD4, - word4 | - S_038010_SRF_MODE_ALL(V_038010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) | - S_038010_REQUEST_SIZE(1) | - S_038010_ENDIAN_SWAP(endian) | - S_038010_BASE_LEVEL(state->u.tex.first_level), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038014_RESOURCE0_WORD5, - S_038014_LAST_LEVEL(state->u.tex.last_level) | - S_038014_BASE_ARRAY(state->u.tex.first_layer) | - S_038014_LAST_ARRAY(state->u.tex.last_layer), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038018_RESOURCE0_WORD6, - S_038018_TYPE(V_038010_SQ_TEX_VTX_VALID_TEXTURE) | - S_038018_MAX_ANISO(4 /* max 16 samples */), 0xFFFFFFFF, NULL); + rstate->bo[0] = bo[0]; + rstate->bo[1] = bo[1]; + + rstate->val[0] = (S_038000_DIM(r600_tex_dim(texture->target)) | + S_038000_TILE_MODE(array_mode) | + S_038000_TILE_TYPE(tile_type) | + S_038000_PITCH((pitch / 8) - 1) | + S_038000_TEX_WIDTH(texture->width0 - 1)); + rstate->val[1] = (S_038004_TEX_HEIGHT(height - 1) | + S_038004_TEX_DEPTH(depth - 1) | + S_038004_DATA_FORMAT(format)); + rstate->val[2] = (tmp->offset[0] + r600_bo_offset(bo[0])) >> 8; + rstate->val[3] = (tmp->offset[1] + r600_bo_offset(bo[1])) >> 8; + rstate->val[4] = (word4 | + S_038010_SRF_MODE_ALL(V_038010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) | + S_038010_REQUEST_SIZE(1) | + S_038010_ENDIAN_SWAP(endian) | + S_038010_BASE_LEVEL(state->u.tex.first_level)); + rstate->val[5] = (S_038014_LAST_LEVEL(state->u.tex.last_level) | + S_038014_BASE_ARRAY(state->u.tex.first_layer) | + S_038014_LAST_ARRAY(state->u.tex.last_layer)); + rstate->val[6] = (S_038018_TYPE(V_038010_SQ_TEX_VTX_VALID_TEXTURE) | + S_038018_MAX_ANISO(4 /* max 16 samples */)); return &resource->base; } @@ -1481,37 +1477,27 @@ void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx) } void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, - struct r600_pipe_state *rstate, - struct r600_resource *rbuffer, - unsigned offset, unsigned stride) + struct r600_pipe_resource_state *rstate) { rstate->id = R600_PIPE_STATE_RESOURCE; - rstate->nregs = 0; - r600_pipe_state_add_reg(rstate, R_038000_RESOURCE0_WORD0, - offset, 0xFFFFFFFF, rbuffer->bo); - r600_pipe_state_add_reg(rstate, R_038004_RESOURCE0_WORD1, - rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038008_RESOURCE0_WORD2, - S_038008_ENDIAN_SWAP(r600_endian_swap(32)) | - S_038008_STRIDE(stride), 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_03800C_RESOURCE0_WORD3, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038010_RESOURCE0_WORD4, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038014_RESOURCE0_WORD5, - 0x00000000, 0xFFFFFFFF, NULL); - r600_pipe_state_add_reg(rstate, R_038018_RESOURCE0_WORD6, - 0xC0000000, 0xFFFFFFFF, NULL); + + rstate->bo[0] = NULL; + rstate->val[0] = 0; + rstate->val[1] = 0; + rstate->val[2] = 0; + rstate->val[3] = 0; + rstate->val[4] = 0; + rstate->val[5] = 0; + rstate->val[6] = 0xc0000000; } -void r600_pipe_mod_buffer_resource(struct r600_pipe_state *rstate, +void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, struct r600_resource *rbuffer, unsigned offset, unsigned stride) { - rstate->nregs = 0; - r600_pipe_state_mod_reg_bo(rstate, offset, rbuffer->bo); - r600_pipe_state_mod_reg(rstate, rbuffer->bo_size - offset - 1); - r600_pipe_state_mod_reg(rstate, S_038008_ENDIAN_SWAP(r600_endian_swap(32)) | - S_038008_STRIDE(stride)); - rstate->nregs = 7; + rstate->val[0] = offset; + rstate->bo[0] = rbuffer->bo; + rstate->val[1] = rbuffer->bo_size - offset - 1; + rstate->val[2] = S_038008_ENDIAN_SWAP(r600_endian_swap(32)) | + S_038008_STRIDE(stride); } diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 48ab15f9323..0928d964dc2 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -388,7 +388,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, { struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_resource_buffer *rbuffer = r600_buffer(buffer); - struct r600_pipe_state *rstate; + struct r600_pipe_resource_state *rstate; uint32_t offset; /* Note that the state tracker can unbind constant buffers by @@ -416,9 +416,9 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, rstate = &rctx->vs_const_buffer_resource[index]; if (!rstate->id) { if (rctx->family >= CHIP_CEDAR) { - evergreen_pipe_init_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16); + evergreen_pipe_init_buffer_resource(rctx, rstate); } else { - r600_pipe_init_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16); + r600_pipe_init_buffer_resource(rctx, rstate); } } @@ -444,9 +444,9 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, rstate = &rctx->ps_const_buffer_resource[index]; if (!rstate->id) { if (rctx->family >= CHIP_CEDAR) { - evergreen_pipe_init_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16); + evergreen_pipe_init_buffer_resource(rctx, rstate); } else { - r600_pipe_init_buffer_resource(rctx, rstate, &rbuffer->r, offset, 16); + r600_pipe_init_buffer_resource(rctx, rstate); } } if (rctx->family >= CHIP_CEDAR) { @@ -468,7 +468,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, static void r600_vertex_buffer_update(struct r600_pipe_context *rctx) { - struct r600_pipe_state *rstate; + struct r600_pipe_resource_state *rstate; struct r600_resource *rbuffer; struct pipe_vertex_buffer *vertex_buffer; unsigned i, count, offset; @@ -503,9 +503,9 @@ static void r600_vertex_buffer_update(struct r600_pipe_context *rctx) if (!rstate->id) { if (rctx->family >= CHIP_CEDAR) { - evergreen_pipe_init_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride); + evergreen_pipe_init_buffer_resource(rctx, rstate); } else { - r600_pipe_init_buffer_resource(rctx, rstate, rbuffer, offset, vertex_buffer->stride); + r600_pipe_init_buffer_resource(rctx, rstate); } } diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index aa789e69d19..701d4e9401f 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -1023,21 +1023,21 @@ out_err: return r; } -void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x20 * rid; r600_context_pipe_state_set_resource(ctx, state, offset); } -void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x1600 + 0x20 * rid; r600_context_pipe_state_set_resource(ctx, state, offset); } -void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x7C00 + 0x20 * rid; diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 1be485400fc..2039e8afdab 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -976,13 +976,14 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat } } -void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset) +void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned offset) { struct r600_range *range; struct r600_block *block; int i; int dirty; int num_regs = ctx->radeon->chip_class >= EVERGREEN ? 8 : 7; + boolean is_vertex; range = &ctx->range[CTX_RANGE_ID(offset)]; block = range->blocks[CTX_BLOCK_ID(offset)]; @@ -997,12 +998,13 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ return; } + is_vertex = ((state->val[num_regs-1] & 0xc0000000) == 0xc0000000); dirty = block->status & R600_BLOCK_STATUS_DIRTY; for (i = 0; i < num_regs; i++) { - if (dirty || (block->reg[i] != state->regs[i].value)) { + if (dirty || (block->reg[i] != state->val[i])) { dirty |= R600_BLOCK_STATUS_DIRTY; - block->reg[i] = state->regs[i].value; + block->reg[i] = state->val[i]; } } @@ -1011,61 +1013,61 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ dirty |= R600_BLOCK_STATUS_DIRTY; if (!dirty) { - if (state->regs[0].bo) { - if ((block->reloc[1].bo->bo->handle != state->regs[0].bo->bo->handle) || - (block->reloc[2].bo->bo->handle != state->regs[0].bo->bo->handle)) + if (is_vertex) { + if ((block->reloc[1].bo->bo->handle != state->bo[0]->bo->handle) || + (block->reloc[2].bo->bo->handle != state->bo[0]->bo->handle)) dirty |= R600_BLOCK_STATUS_DIRTY; } else { - if ((block->reloc[1].bo->bo->handle != state->regs[2].bo->bo->handle) || - (block->reloc[2].bo->bo->handle != state->regs[3].bo->bo->handle)) + if ((block->reloc[1].bo->bo->handle != state->bo[0]->bo->handle) || + (block->reloc[2].bo->bo->handle != state->bo[1]->bo->handle)) dirty |= R600_BLOCK_STATUS_DIRTY; } } if (!dirty) { - if (state->regs[0].bo) - state->regs[0].bo->fence = ctx->radeon->fence; + if (is_vertex) + state->bo[0]->fence = ctx->radeon->fence; else { - state->regs[2].bo->fence = ctx->radeon->fence; - state->regs[3].bo->fence = ctx->radeon->fence; + state->bo[0]->fence = ctx->radeon->fence; + state->bo[1]->fence = ctx->radeon->fence; } } else { r600_bo_reference(ctx->radeon, &block->reloc[1].bo, NULL); r600_bo_reference(ctx->radeon, &block->reloc[2].bo, NULL); - if (state->regs[0].bo) { + if (is_vertex) { /* VERTEX RESOURCE, we preted there is 2 bo to relocate so * we have single case btw VERTEX & TEXTURE resource */ - r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[0].bo); - r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[0].bo); - state->regs[0].bo->fence = ctx->radeon->fence; + r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->bo[0]); + r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->bo[0]); + state->bo[0]->fence = ctx->radeon->fence; } else { /* TEXTURE RESOURCE */ - r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[2].bo); - r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[3].bo); - state->regs[2].bo->fence = ctx->radeon->fence; - state->regs[3].bo->fence = ctx->radeon->fence; - state->regs[2].bo->bo->binding |= BO_BOUND_TEXTURE; + r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->bo[0]); + r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->bo[1]); + state->bo[0]->fence = ctx->radeon->fence; + state->bo[1]->fence = ctx->radeon->fence; + state->bo[0]->bo->binding |= BO_BOUND_TEXTURE; } } if (dirty) r600_context_dirty_block(ctx, block, dirty, num_regs - 1); } -void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x1C * rid; r600_context_pipe_state_set_resource(ctx, state, offset); } -void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x1180 + 0x1C * rid; r600_context_pipe_state_set_resource(ctx, state, offset); } -void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid) +void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x2300 + 0x1C * rid; diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h index 9be5c358f85..1790f770897 100644 --- a/src/gallium/winsys/r600/drm/r600_priv.h +++ b/src/gallium/winsys/r600/drm/r600_priv.h @@ -158,7 +158,7 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg, unsigned opcode, unsigned offset_base); -void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset); +void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned offset); void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block); void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, int dirty, int index); From be7af43f5a725b65701ab1e37a5c373d715be9b0 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 6 Jun 2011 14:33:23 +1000 Subject: [PATCH 4/8] r600g: split out block init This just splits this function up as pre-cursor to reusing the internals of it. Signed-off-by: Dave Airlie --- src/gallium/winsys/r600/drm/r600_hw_context.c | 101 ++++++++++-------- 1 file changed, 55 insertions(+), 46 deletions(-) diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 2039e8afdab..41d32d85776 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -79,6 +79,60 @@ static void INLINE r600_context_fence_wraparound(struct r600_context *ctx, unsig } } +static void r600_init_block(struct r600_context *ctx, + struct r600_block *block, + const struct r600_reg *reg, int index, int nreg, + unsigned opcode, unsigned offset_base) +{ + int i = index; + int j, n = nreg; + + /* initialize block */ + block->status |= R600_BLOCK_STATUS_DIRTY; /* dirty all blocks at start */ + block->start_offset = reg[i].offset; + block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0); + block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2; + block->reg = &block->pm4[block->pm4_ndwords]; + block->pm4_ndwords += n; + block->nreg = n; + block->nreg_dirty = n; + block->flags = 0; + LIST_INITHEAD(&block->list); + + for (j = 0; j < n; j++) { + if (reg[i+j].flags & REG_FLAG_DIRTY_ALWAYS) { + block->flags |= REG_FLAG_DIRTY_ALWAYS; + } + if (reg[i+j].flags & REG_FLAG_NEED_BO) { + block->nbo++; + assert(block->nbo < R600_BLOCK_MAX_BO); + block->pm4_bo_index[j] = block->nbo; + block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0); + block->pm4[block->pm4_ndwords++] = 0x00000000; + if (reg[i+j].flags & REG_FLAG_RV6XX_SBU) { + block->reloc[block->nbo].flush_flags = 0; + block->reloc[block->nbo].flush_mask = 0; + } else { + block->reloc[block->nbo].flush_flags = reg[i+j].flush_flags; + block->reloc[block->nbo].flush_mask = reg[i+j].flush_mask; + } + block->reloc[block->nbo].bo_pm4_index = block->pm4_ndwords - 1; + } + if ((ctx->radeon->family > CHIP_R600) && + (ctx->radeon->family < CHIP_RV770) && reg[i+j].flags & REG_FLAG_RV6XX_SBU) { + block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0); + block->pm4[block->pm4_ndwords++] = reg[i+j].flush_flags; + } + } + for (j = 0; j < n; j++) { + if (reg[i+j].flush_flags) { + block->pm4_flush_ndwords += 7; + } + } + /* check that we stay in limit */ + assert(block->pm4_ndwords < R600_BLOCK_MAX_REG); +} + int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg, unsigned opcode, unsigned offset_base) { @@ -87,8 +141,6 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, int offset; for (unsigned i = 0, n = 0; i < nreg; i += n) { - u32 j; - /* ignore new block balise */ if (reg[i].offset == GROUP_FORCE_NEW_BLOCK) { n = 1; @@ -131,50 +183,7 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, range->blocks[CTX_BLOCK_ID(reg[i + j].offset)] = block; } - /* initialize block */ - block->status |= R600_BLOCK_STATUS_DIRTY; /* dirty all blocks at start */ - block->start_offset = reg[i].offset; - block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0); - block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2; - block->reg = &block->pm4[block->pm4_ndwords]; - block->pm4_ndwords += n; - block->nreg = n; - block->nreg_dirty = n; - block->flags = 0; - LIST_INITHEAD(&block->list); - - for (j = 0; j < n; j++) { - if (reg[i+j].flags & REG_FLAG_DIRTY_ALWAYS) { - block->flags |= REG_FLAG_DIRTY_ALWAYS; - } - if (reg[i+j].flags & REG_FLAG_NEED_BO) { - block->nbo++; - assert(block->nbo < R600_BLOCK_MAX_BO); - block->pm4_bo_index[j] = block->nbo; - block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0); - block->pm4[block->pm4_ndwords++] = 0x00000000; - if (reg[i+j].flags & REG_FLAG_RV6XX_SBU) { - block->reloc[block->nbo].flush_flags = 0; - block->reloc[block->nbo].flush_mask = 0; - } else { - block->reloc[block->nbo].flush_flags = reg[i+j].flush_flags; - block->reloc[block->nbo].flush_mask = reg[i+j].flush_mask; - } - block->reloc[block->nbo].bo_pm4_index = block->pm4_ndwords - 1; - } - if ((ctx->radeon->family > CHIP_R600) && - (ctx->radeon->family < CHIP_RV770) && reg[i+j].flags & REG_FLAG_RV6XX_SBU) { - block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0); - block->pm4[block->pm4_ndwords++] = reg[i+j].flush_flags; - } - } - for (j = 0; j < n; j++) { - if (reg[i+j].flush_flags) { - block->pm4_flush_ndwords += 7; - } - } - /* check that we stay in limit */ - assert(block->pm4_ndwords < R600_BLOCK_MAX_REG); + r600_init_block(ctx, block, reg, i, n, opcode, offset_base); } return 0; } From f356bb74de7ab9ad1085a0fc2f16c1dae4ff171e Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 6 Jun 2011 18:00:36 +1000 Subject: [PATCH 5/8] r600g/winsys: overhaul resource range/blocks. There isn't much point taking the overhead of range/block lookups on resources we aren't going to be getting resource registers at wierd offsets. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/r600.h | 4 + .../winsys/r600/drm/evergreen_hw_context.c | 50 ++++---- src/gallium/winsys/r600/drm/r600_hw_context.c | 118 ++++++++++++------ src/gallium/winsys/r600/drm/r600_priv.h | 3 +- 4 files changed, 110 insertions(+), 65 deletions(-) diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index 5d6240aef24..cc70600610e 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -267,6 +267,10 @@ struct r600_context { unsigned num_dest_buffers; unsigned flags; boolean predicate_drawing; + struct r600_range ps_resources; + struct r600_range vs_resources; + struct r600_range fs_resources; + int num_ps_resources, num_vs_resources, num_fs_resources; }; struct r600_draw { diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index 701d4e9401f..7072461dc59 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -817,7 +817,7 @@ static const struct r600_reg cayman_context_reg_list[] = { }; /* SHADER RESOURCE R600/R700 */ -static int evergreen_state_resource_init(struct r600_context *ctx, u32 offset) +static int r600_resource_range_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride) { struct r600_reg r600_shader_resource[] = { {R_030000_RESOURCE0_WORD0, 0, 0, 0}, @@ -831,10 +831,7 @@ static int evergreen_state_resource_init(struct r600_context *ctx, u32 offset) }; unsigned nreg = Elements(r600_shader_resource); - for (int i = 0; i < nreg; i++) { - r600_shader_resource[i].offset += offset; - } - return r600_context_add_block(ctx, r600_shader_resource, nreg, PKT3_SET_RESOURCE, EVERGREEN_RESOURCE_OFFSET); + return r600_resource_init(ctx, range, offset, nblocks, stride, r600_shader_resource, nreg, EVERGREEN_RESOURCE_OFFSET); } /* SHADER SAMPLER R600/R700 */ @@ -960,24 +957,19 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon) if (r) goto out_err; } - /* PS RESOURCE */ - for (int j = 0, offset = 0; j < 176; j++, offset += 0x20) { - r = evergreen_state_resource_init(ctx, offset); - if (r) - goto out_err; - } - /* VS RESOURCE */ - for (int j = 0, offset = 0x1600; j < 160; j++, offset += 0x20) { - r = evergreen_state_resource_init(ctx, offset); - if (r) - goto out_err; - } - /* FS RESOURCE */ - for (int j = 0, offset = 0x7C00; j < 16; j++, offset += 0x20) { - r = evergreen_state_resource_init(ctx, offset); - if (r) - goto out_err; - } + + ctx->num_ps_resources = 176; + ctx->num_vs_resources = 160; + ctx->num_fs_resources = 16; + r = r600_resource_range_init(ctx, &ctx->ps_resources, 0, 176, 0x20); + if (r) + goto out_err; + r = r600_resource_range_init(ctx, &ctx->vs_resources, 0x1600, 160, 0x20); + if (r) + goto out_err; + r = r600_resource_range_init(ctx, &ctx->fs_resources, 0x7C00, 16, 0x20); + if (r) + goto out_err; /* PS loop const */ evergreen_loop_const_init(ctx, 0); @@ -1025,23 +1017,23 @@ out_err: void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x20 * rid; + struct r600_block *block = ctx->ps_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x1600 + 0x20 * rid; + struct r600_block *block = ctx->vs_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_030000_SQ_TEX_RESOURCE_WORD0_0 + 0x7C00 + 0x20 * rid; + struct r600_block *block = ctx->fs_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } static inline void evergreen_context_pipe_state_set_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset) diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 41d32d85776..1fd6d344798 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -561,7 +561,31 @@ static const struct r600_reg r600_context_reg_list[] = { }; /* SHADER RESOURCE R600/R700 */ -static int r600_state_resource_init(struct r600_context *ctx, u32 offset) +int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base) +{ + int i; + struct r600_block *block; + range->blocks = calloc(nblocks, sizeof(struct r600_block *)); + if (range->blocks == NULL) + return -ENOMEM; + + reg[0].offset += offset; + for (i = 0; i < nblocks; i++) { + block = calloc(1, sizeof(struct r600_block)); + if (block == NULL) { + return -ENOMEM; + } + ctx->nblocks++; + range->blocks[i] = block; + r600_init_block(ctx, block, reg, 0, nreg, PKT3_SET_RESOURCE, offset_base); + + reg[0].offset += stride; + } + return 0; +} + + +static int r600_resource_range_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride) { struct r600_reg r600_shader_resource[] = { {R_038000_RESOURCE0_WORD0, 0, 0, 0}, @@ -574,10 +598,7 @@ static int r600_state_resource_init(struct r600_context *ctx, u32 offset) }; unsigned nreg = Elements(r600_shader_resource); - for (int i = 0; i < nreg; i++) { - r600_shader_resource[i].offset += offset; - } - return r600_context_add_block(ctx, r600_shader_resource, nreg, PKT3_SET_RESOURCE, R600_RESOURCE_OFFSET); + return r600_resource_init(ctx, range, offset, nblocks, stride, r600_shader_resource, nreg, R600_RESOURCE_OFFSET); } /* SHADER SAMPLER R600/R700 */ @@ -639,6 +660,22 @@ static void r600_context_clear_fenced_bo(struct r600_context *ctx) } } +static void r600_free_resource_range(struct r600_context *ctx, struct r600_range *range, int nblocks) +{ + struct r600_block *block; + int i; + for (i = 0; i < nblocks; i++) { + block = range->blocks[i]; + if (block) { + for (int k = 1; k <= block->nbo; k++) + r600_bo_reference(ctx->radeon, &block->reloc[k].bo, NULL); + free(block); + } + } + free(range->blocks); + +} + /* initialize */ void r600_context_fini(struct r600_context *ctx) { @@ -663,6 +700,9 @@ void r600_context_fini(struct r600_context *ctx) } free(ctx->range[i].blocks); } + r600_free_resource_range(ctx, &ctx->ps_resources, ctx->num_ps_resources); + r600_free_resource_range(ctx, &ctx->vs_resources, ctx->num_vs_resources); + r600_free_resource_range(ctx, &ctx->fs_resources, ctx->num_fs_resources); free(ctx->range); free(ctx->blocks); free(ctx->reloc); @@ -673,13 +713,26 @@ void r600_context_fini(struct r600_context *ctx) memset(ctx, 0, sizeof(struct r600_context)); } +static void r600_add_resource_block(struct r600_context *ctx, struct r600_range *range, int num_blocks, int *index) +{ + int c = *index; + for (int j = 0; j < num_blocks; j++) { + if (!range->blocks[j]) + continue; + + ctx->blocks[c++] = range->blocks[j]; + } + *index = c; +} + int r600_setup_block_table(struct r600_context *ctx) { /* setup block table */ + int c = 0; ctx->blocks = calloc(ctx->nblocks, sizeof(void*)); if (!ctx->blocks) return -ENOMEM; - for (int i = 0, c = 0; i < NUM_RANGES; i++) { + for (int i = 0; i < NUM_RANGES; i++) { if (!ctx->range[i].blocks) continue; for (int j = 0, add; j < (1 << HASH_SHIFT); j++) { @@ -700,6 +753,10 @@ int r600_setup_block_table(struct r600_context *ctx) } } } + + r600_add_resource_block(ctx, &ctx->ps_resources, ctx->num_ps_resources, &c); + r600_add_resource_block(ctx, &ctx->vs_resources, ctx->num_vs_resources, &c); + r600_add_resource_block(ctx, &ctx->fs_resources, ctx->num_fs_resources, &c); return 0; } @@ -756,24 +813,19 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon) if (r) goto out_err; } - /* PS RESOURCE */ - for (int j = 0, offset = 0; j < 160; j++, offset += 0x1C) { - r = r600_state_resource_init(ctx, offset); - if (r) - goto out_err; - } - /* VS RESOURCE */ - for (int j = 0, offset = 0x1180; j < 160; j++, offset += 0x1C) { - r = r600_state_resource_init(ctx, offset); - if (r) - goto out_err; - } - /* FS RESOURCE */ - for (int j = 0, offset = 0x2300; j < 16; j++, offset += 0x1C) { - r = r600_state_resource_init(ctx, offset); - if (r) - goto out_err; - } + + ctx->num_ps_resources = 160; + ctx->num_vs_resources = 160; + ctx->num_fs_resources = 16; + r = r600_resource_range_init(ctx, &ctx->ps_resources, 0, 160, 0x1c); + if (r) + goto out_err; + r = r600_resource_range_init(ctx, &ctx->vs_resources, 0x1180, 160, 0x1c); + if (r) + goto out_err; + r = r600_resource_range_init(ctx, &ctx->fs_resources, 0x2300, 16, 0x1c); + if (r) + goto out_err; /* PS loop const */ r600_loop_const_init(ctx, 0); @@ -985,17 +1037,13 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat } } -void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned offset) +void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block) { - struct r600_range *range; - struct r600_block *block; int i; int dirty; int num_regs = ctx->radeon->chip_class >= EVERGREEN ? 8 : 7; boolean is_vertex; - range = &ctx->range[CTX_RANGE_ID(offset)]; - block = range->blocks[CTX_BLOCK_ID(offset)]; if (state == NULL) { block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_DIRTY); if (block->reloc[1].bo) @@ -1064,23 +1112,23 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x1C * rid; + struct r600_block *block = ctx->ps_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x1180 + 0x1C * rid; + struct r600_block *block = ctx->vs_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned rid) { - unsigned offset = R_038000_SQ_TEX_RESOURCE_WORD0_0 + 0x2300 + 0x1C * rid; + struct r600_block *block = ctx->fs_resources.blocks[rid]; - r600_context_pipe_state_set_resource(ctx, state, offset); + r600_context_pipe_state_set_resource(ctx, state, block); } static inline void r600_context_pipe_state_set_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset) diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h index 1790f770897..3e0fd6d7a71 100644 --- a/src/gallium/winsys/r600/drm/r600_priv.h +++ b/src/gallium/winsys/r600/drm/r600_priv.h @@ -158,7 +158,7 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg, unsigned opcode, unsigned offset_base); -void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, unsigned offset); +void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block); void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block); void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, int dirty, int index); @@ -167,6 +167,7 @@ void r600_context_reg(struct r600_context *ctx, unsigned offset, unsigned value, unsigned mask); void r600_init_cs(struct r600_context *ctx); +int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base); /* * r600_bo.c */ From 63184bc8b278ba82f5462798b323774c67a019e6 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 3 Jun 2011 09:59:12 +1000 Subject: [PATCH 6/8] r600g: use an enabled list to track enabled blocks. At the end of flushing we were scanning over 450 blocks with generally about 50 enabled. This reduces the scanning to just the list of enabled blocks. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/r600.h | 2 + .../winsys/r600/drm/evergreen_hw_context.c | 46 ++++++++++--------- src/gallium/winsys/r600/drm/r600_hw_context.c | 42 +++++++++++------ src/gallium/winsys/r600/drm/r600_priv.h | 1 + 4 files changed, 56 insertions(+), 35 deletions(-) diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index cc70600610e..b1444bf94f4 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -188,6 +188,7 @@ struct r600_block_reloc { struct r600_block { struct list_head list; + struct list_head enable_list; unsigned status; unsigned flags; unsigned start_offset; @@ -251,6 +252,7 @@ struct r600_context { unsigned nblocks; struct r600_block **blocks; struct list_head dirty; + struct list_head enable_list; unsigned pm4_ndwords; unsigned pm4_cdwords; unsigned pm4_dirty_cdwords; diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index 7072461dc59..7a1be87f3dc 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -43,31 +43,31 @@ static const struct r600_reg evergreen_config_reg_list[] = { {R_008958_VGT_PRIMITIVE_TYPE, 0, 0, 0}, {R_008A14_PA_CL_ENHANCE, 0, 0, 0}, - {R_008C00_SQ_CONFIG, 0, 0, 0}, - {R_008C04_SQ_GPR_RESOURCE_MGMT_1, 0, 0, 0}, - {R_008C08_SQ_GPR_RESOURCE_MGMT_2, 0, 0, 0}, - {R_008C0C_SQ_THREAD_RESOURCE_MGMT, 0, 0, 0}, - {R_008C18_SQ_THREAD_RESOURCE_MGMT_1, 0, 0, 0}, - {R_008C1C_SQ_THREAD_RESOURCE_MGMT_2, 0, 0, 0}, - {R_008C20_SQ_STACK_RESOURCE_MGMT_1, 0, 0, 0}, - {R_008C24_SQ_STACK_RESOURCE_MGMT_2, 0, 0, 0}, - {R_008C28_SQ_STACK_RESOURCE_MGMT_3, 0, 0, 0}, - {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0, 0, 0}, - {R_009100_SPI_CONFIG_CNTL, 0, 0, 0}, - {R_00913C_SPI_CONFIG_CNTL_1, 0, 0, 0}, + {R_008C00_SQ_CONFIG, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C04_SQ_GPR_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C08_SQ_GPR_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C0C_SQ_THREAD_RESOURCE_MGMT, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C18_SQ_THREAD_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C1C_SQ_THREAD_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C20_SQ_STACK_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C24_SQ_STACK_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C28_SQ_STACK_RESOURCE_MGMT_3, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, }; static const struct r600_reg cayman_config_reg_list[] = { {R_008958_VGT_PRIMITIVE_TYPE, 0, 0, 0}, {R_008A14_PA_CL_ENHANCE, 0, 0, 0}, - {R_008C00_SQ_CONFIG, 0, 0, 0}, - {R_008C04_SQ_GPR_RESOURCE_MGMT_1, 0, 0, 0}, - {CM_R_008C10_SQ_GLOBAL_GPR_RESOURCE_MGMT_1, 0, 0, 0}, - {CM_R_008C14_SQ_GLOBAL_GPR_RESOURCE_MGMT_2, 0, 0, 0}, - {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0, 0, 0}, - {R_009100_SPI_CONFIG_CNTL, 0, 0, 0}, - {R_00913C_SPI_CONFIG_CNTL_1, 0, 0, 0}, + {R_008C00_SQ_CONFIG, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008C04_SQ_GPR_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {CM_R_008C10_SQ_GLOBAL_GPR_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {CM_R_008C14_SQ_GLOBAL_GPR_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS, 0, 0}, + {R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS, 0, 0}, }; static const struct r600_reg evergreen_ctl_const_list[] = { @@ -904,6 +904,10 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon) ctx->radeon = radeon; LIST_INITHEAD(&ctx->query_list); + /* init dirty list */ + LIST_INITHEAD(&ctx->dirty); + LIST_INITHEAD(&ctx->enable_list); + ctx->range = calloc(NUM_RANGES, sizeof(struct r600_range)); if (!ctx->range) { r = -ENOMEM; @@ -1007,8 +1011,6 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon) LIST_INITHEAD(&ctx->fenced_bo); - /* init dirty list */ - LIST_INITHEAD(&ctx->dirty); return 0; out_err: r600_context_fini(ctx); @@ -1048,6 +1050,7 @@ static inline void evergreen_context_pipe_state_set_sampler(struct r600_context if (state == NULL) { block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_DIRTY); LIST_DELINIT(&block->list); + LIST_DELINIT(&block->enable_list); return; } dirty = block->status & R600_BLOCK_STATUS_DIRTY; @@ -1086,6 +1089,7 @@ static inline void evergreen_context_pipe_state_set_sampler_border(struct r600_c if (state == NULL) { block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_DIRTY); LIST_DELINIT(&block->list); + LIST_DELINIT(&block->enable_list); return; } if (state->nregs <= 3) { diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 1fd6d344798..c5551b2674c 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -98,11 +98,17 @@ static void r600_init_block(struct r600_context *ctx, block->nreg_dirty = n; block->flags = 0; LIST_INITHEAD(&block->list); + LIST_INITHEAD(&block->enable_list); for (j = 0; j < n; j++) { if (reg[i+j].flags & REG_FLAG_DIRTY_ALWAYS) { block->flags |= REG_FLAG_DIRTY_ALWAYS; } + if (reg[i+j].flags & REG_FLAG_ENABLE_ALWAYS) { + block->status |= R600_BLOCK_STATUS_ENABLED; + LIST_ADDTAIL(&block->enable_list, &ctx->enable_list); + } + if (reg[i+j].flags & REG_FLAG_NEED_BO) { block->nbo++; assert(block->nbo < R600_BLOCK_MAX_BO); @@ -184,6 +190,7 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, } r600_init_block(ctx, block, reg, i, n, opcode, offset_base); + } return 0; } @@ -768,6 +775,10 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon) ctx->radeon = radeon; LIST_INITHEAD(&ctx->query_list); + /* init dirty list */ + LIST_INITHEAD(&ctx->dirty); + LIST_INITHEAD(&ctx->enable_list); + ctx->range = calloc(NUM_RANGES, sizeof(struct r600_range)); if (!ctx->range) { r = -ENOMEM; @@ -861,9 +872,6 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon) LIST_INITHEAD(&ctx->fenced_bo); - /* init dirty list */ - LIST_INITHEAD(&ctx->dirty); - ctx->max_db = 4; return 0; @@ -985,17 +993,20 @@ void r600_context_reg(struct r600_context *ctx, r600_context_dirty_block(ctx, block, dirty, id); } -void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, +void r600_context_dirty_block(struct r600_context *ctx, + struct r600_block *block, int dirty, int index) { if ((index + 1) > block->nreg_dirty) block->nreg_dirty = index + 1; if ((dirty != (block->status & R600_BLOCK_STATUS_DIRTY)) || !(block->status & R600_BLOCK_STATUS_ENABLED)) { - - block->status |= R600_BLOCK_STATUS_ENABLED; block->status |= R600_BLOCK_STATUS_DIRTY; ctx->pm4_dirty_cdwords += block->pm4_ndwords + block->pm4_flush_ndwords; + if (!(block->status & R600_BLOCK_STATUS_ENABLED)) { + block->status |= R600_BLOCK_STATUS_ENABLED; + LIST_ADDTAIL(&block->enable_list, &ctx->enable_list); + } LIST_ADDTAIL(&block->list,&ctx->dirty); } } @@ -1052,6 +1063,7 @@ void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_ r600_bo_reference(ctx->radeon, &block->reloc[1].bo, NULL); r600_bo_reference(ctx->radeon , &block->reloc[2].bo, NULL); LIST_DELINIT(&block->list); + LIST_DELINIT(&block->enable_list); return; } @@ -1143,6 +1155,7 @@ static inline void r600_context_pipe_state_set_sampler(struct r600_context *ctx, if (state == NULL) { block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_DIRTY); LIST_DELINIT(&block->list); + LIST_DELINIT(&block->enable_list); return; } dirty = block->status & R600_BLOCK_STATUS_DIRTY; @@ -1180,6 +1193,7 @@ static inline void r600_context_pipe_state_set_sampler_border(struct r600_contex if (state == NULL) { block->status &= ~(R600_BLOCK_STATUS_ENABLED | R600_BLOCK_STATUS_DIRTY); LIST_DELINIT(&block->list); + LIST_DELINIT(&block->enable_list); return; } if (state->nregs <= 3) { @@ -1407,6 +1421,7 @@ void r600_context_flush(struct r600_context *ctx) uint64_t chunk_array[2]; unsigned fence; int r; + struct r600_block *enable_block = NULL, *next_block; if (!ctx->pm4_cdwords) return; @@ -1480,15 +1495,14 @@ void r600_context_flush(struct r600_context *ctx) /* set all valid group as dirty so they get reemited on * next draw command */ - for (int i = 0; i < ctx->nblocks; i++) { - if (ctx->blocks[i]->status & R600_BLOCK_STATUS_ENABLED) { - if(!(ctx->blocks[i]->status & R600_BLOCK_STATUS_DIRTY)) { - LIST_ADDTAIL(&ctx->blocks[i]->list,&ctx->dirty); - } - ctx->pm4_dirty_cdwords += ctx->blocks[i]->pm4_ndwords + ctx->blocks[i]->pm4_flush_ndwords; - ctx->blocks[i]->status |= R600_BLOCK_STATUS_DIRTY; - ctx->blocks[i]->nreg_dirty = ctx->blocks[i]->nreg; + LIST_FOR_EACH_ENTRY(enable_block, &ctx->enable_list, enable_list) { + if(!(enable_block->status & R600_BLOCK_STATUS_DIRTY)) { + LIST_ADDTAIL(&enable_block->list,&ctx->dirty); } + ctx->pm4_dirty_cdwords += enable_block->pm4_ndwords + + enable_block->pm4_flush_ndwords; + enable_block->status |= R600_BLOCK_STATUS_DIRTY; + enable_block->nreg_dirty = enable_block->nreg; } } diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h index 3e0fd6d7a71..d9cb52409cd 100644 --- a/src/gallium/winsys/r600/drm/r600_priv.h +++ b/src/gallium/winsys/r600/drm/r600_priv.h @@ -66,6 +66,7 @@ struct radeon { #define REG_FLAG_DIRTY_ALWAYS 2 #define REG_FLAG_RV6XX_SBU 4 #define REG_FLAG_NOT_R600 8 +#define REG_FLAG_ENABLE_ALWAYS 16 struct r600_reg { unsigned offset; From ca01fe007d3962386cb98aef762d5a2ff114e4aa Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 6 Jun 2011 20:03:13 +1000 Subject: [PATCH 7/8] r600g: optimise the draw emission packets for r600/eg This just reduces code size a bit for this chunk. Signed-off-by: Dave Airlie --- .../winsys/r600/drm/evergreen_hw_context.c | 33 ++++++++++-------- src/gallium/winsys/r600/drm/r600_hw_context.c | 34 +++++++++++-------- 2 files changed, 37 insertions(+), 30 deletions(-) diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index 7a1be87f3dc..3cf41c1f9f9 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -1143,6 +1143,7 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr unsigned ndwords = 7; struct r600_block *dirty_block = NULL; struct r600_block *next_block; + uint32_t *pm4; if (draw->indices) { ndwords = 11; @@ -1184,24 +1185,26 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr } /* draw packet */ - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_index_type; - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NUM_INSTANCES, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_instances; + pm4 = &ctx->pm4[ctx->pm4_cdwords]; + pm4[0] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing); + pm4[1] = draw->vgt_index_type; + pm4[2] = PKT3(PKT3_NUM_INSTANCES, 0, ctx->predicate_drawing); + pm4[3] = draw->vgt_num_instances; if (draw->indices) { - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->indices_bo_offset + r600_bo_offset(draw->indices); - ctx->pm4[ctx->pm4_cdwords++] = 0; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator; - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = 0; - r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], draw->indices); + pm4[4] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing); + pm4[5] = draw->indices_bo_offset + r600_bo_offset(draw->indices); + pm4[6] = 0; + pm4[7] = draw->vgt_num_indices; + pm4[8] = draw->vgt_draw_initiator; + pm4[9] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing); + pm4[10] = 0; + r600_context_bo_reloc(ctx, &pm4[10], draw->indices); } else { - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator; + pm4[4] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing); + pm4[5] = draw->vgt_num_indices; + pm4[6] = draw->vgt_draw_initiator; } + ctx->pm4_cdwords += ndwords; ctx->flags |= (R600_CONTEXT_DRAW_PENDING | R600_CONTEXT_DST_CACHES_DIRTY); diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index c5551b2674c..cb244f2b9ee 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -1347,6 +1347,7 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw) unsigned ndwords = 7; struct r600_block *dirty_block = NULL; struct r600_block *next_block; + uint32_t *pm4; if (draw->indices) { ndwords = 11; @@ -1389,24 +1390,27 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw) } /* draw packet */ - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_index_type; - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NUM_INSTANCES, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_instances; + pm4 = &ctx->pm4[ctx->pm4_cdwords]; + + pm4[0] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing); + pm4[1] = draw->vgt_index_type; + pm4[2] = PKT3(PKT3_NUM_INSTANCES, 0, ctx->predicate_drawing); + pm4[3] = draw->vgt_num_instances; if (draw->indices) { - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->indices_bo_offset + r600_bo_offset(draw->indices); - ctx->pm4[ctx->pm4_cdwords++] = 0; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator; - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = 0; - r600_context_bo_reloc(ctx, &ctx->pm4[ctx->pm4_cdwords - 1], draw->indices); + pm4[4] = PKT3(PKT3_DRAW_INDEX, 3, ctx->predicate_drawing); + pm4[5] = draw->indices_bo_offset + r600_bo_offset(draw->indices); + pm4[6] = 0; + pm4[7] = draw->vgt_num_indices; + pm4[8] = draw->vgt_draw_initiator; + pm4[9] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing); + pm4[10] = 0; + r600_context_bo_reloc(ctx, &pm4[10], draw->indices); } else { - ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing); - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_num_indices; - ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator; + pm4[4] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, ctx->predicate_drawing); + pm4[5] = draw->vgt_num_indices; + pm4[6] = draw->vgt_draw_initiator; } + ctx->pm4_cdwords += ndwords; ctx->flags |= (R600_CONTEXT_DST_CACHES_DIRTY | R600_CONTEXT_DRAW_PENDING); From 22c320aa2c459474a0d220a40b849bf7e4864251 Mon Sep 17 00:00:00 2001 From: Jeremy Huddleston Date: Mon, 6 Jun 2011 19:54:55 -0400 Subject: [PATCH 8/8] darwin: Set VG_LIB_{NAME,GLOB} to fix make install Signed-off-by: Jeremy Huddleston --- configs/darwin | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/configs/darwin b/configs/darwin index 9c126ea3db6..3cf1110b40e 100644 --- a/configs/darwin +++ b/configs/darwin @@ -31,18 +31,20 @@ CXXFLAGS = -ggdb3 -Os -Wall -fno-strict-aliasing \ -I$(INSTALL_DIR)/include -I$(X11_DIR)/include $(OPT_FLAGS) $(PIC_FLAGS) $(ARCH_FLAGS) $(ASM_FLAGS) $(DEFINES) # Library names (actual file names) -GL_LIB_NAME = libGL.dylib -GLU_LIB_NAME = libGLU.dylib -GLUT_LIB_NAME = libglut.dylib -GLW_LIB_NAME = libGLw.dylib -OSMESA_LIB_NAME = libOSMesa.dylib +GL_LIB_NAME = lib$(GL_LIB).dylib +GLU_LIB_NAME = lib$(GLU_LIB).dylib +GLUT_LIB_NAME = lib$(GLUT_LIB).dylib +GLW_LIB_NAME = lib$(GLW_LIB).dylib +OSMESA_LIB_NAME = lib$(OSMESA_LIB).dylib +VG_LIB_NAME = lib$(VG_LIB).dylib # globs used to install the lib and all symlinks -GL_LIB_GLOB = libGL.*dylib -GLU_LIB_GLOB = libGLU.*dylib -GLUT_LIB_GLOB = libglut.*dylib -GLW_LIB_GLOB = libGLw.*dylib -OSMESA_LIB_GLOB = libOSMesa.*dylib +GL_LIB_GLOB = lib$(GL_LIB).*dylib +GLU_LIB_GLOB = lib$(GLU_LIB).*dylib +GLUT_LIB_GLOB = lib$(GLUT_LIB).*dylib +GLW_LIB_GLOB = lib$(GLW_LIB).*dylib +OSMESA_LIB_GLOB = lib$(OSMESA_LIB).*dylib +VG_LIB_GLOB = lib$(VG_LIB).*.dylib GL_LIB_DEPS = -L$(INSTALL_DIR)/$(LIB_DIR) -L$(X11_DIR)/$(LIB_DIR) -lX11 -lXext -lm -lpthread OSMESA_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GL_LIB)