From 7c15f86a22bd2b4d52b2418824f69817e36d5032 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= Date: Tue, 15 Jul 2025 12:00:58 +0200 Subject: [PATCH] radv: only vectorize shared2 instructions during late optimizations Totals from 7 (0.01% of 79839) affected shaders: (Navi48) Instrs: 6475 -> 6511 (+0.56%) CodeSize: 37088 -> 37244 (+0.42%) Latency: 17297 -> 17587 (+1.68%) InvThroughput: 5428 -> 5420 (-0.15%) Copies: 278 -> 276 (-0.72%) PreVGPRs: 487 -> 483 (-0.82%) VALU: 4491 -> 4486 (-0.11%) SALU: 267 -> 269 (+0.75%) Part-of: --- src/amd/vulkan/radv_pipeline.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 426b06e4bb2..24d0a024543 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -376,10 +376,8 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat .callback = ac_nir_mem_vectorize_callback, .cb_data = &(struct ac_nir_config){gfx_level, !use_llvm}, .robust_modes = 0, - /* On GFX6, read2/write2 is out-of-bounds if the offset register is negative, even if - * the final offset is not. - */ - .has_shared2_amd = gfx_level >= GFX7, + /* Only vectorize shared2 during late optimizations. */ + .has_shared2_amd = false, }; if (stage->key.uniform_robustness2)