diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 08c8b10d9bd..aaacf8ec70b 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -370,7 +370,7 @@ anv_batch_bo_link(struct anv_cmd_buffer *cmd_buffer,
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
    if (cmd_buffer->device->physical->memory.need_flush &&
        anv_bo_needs_host_cache_flush(prev_bbo->bo->alloc_flags))
-      intel_flush_range(map, sizeof(uint64_t));
+      util_flush_range(map, sizeof(uint64_t));
 #endif
 }
 
@@ -1638,7 +1638,7 @@ anv_cmd_buffer_clflush(struct anv_cmd_buffer **cmd_buffers,
 
    for (uint32_t i = 0; i < num_cmd_buffers; i++) {
       u_vector_foreach(bbo, &cmd_buffers[i]->seen_bbos) {
-         intel_flush_range_no_fence((*bbo)->bo->map, (*bbo)->length);
+         util_flush_range_no_fence((*bbo)->bo->map, (*bbo)->length);
       }
    }
 
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 351719f261e..3ecec4245f2 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1957,9 +1957,9 @@ VkResult anv_FlushMappedMemoryRanges(
       if (map_offset >= mem->map_size)
          continue;
 
-      intel_flush_range(mem->map + map_offset,
-                        MIN2(pMemoryRanges[i].size,
-                             mem->map_size - map_offset));
+      util_flush_range(mem->map + map_offset,
+                       MIN2(pMemoryRanges[i].size,
+                            mem->map_size - map_offset));
    }
 #endif
    return VK_SUCCESS;
@@ -1985,7 +1985,7 @@ VkResult anv_InvalidateMappedMemoryRanges(
       if (map_offset >= mem->map_size)
          continue;
 
-      intel_invalidate_range(mem->map + map_offset,
+      util_flush_inval_range(mem->map + map_offset,
                              MIN2(pMemoryRanges[i].size,
                                   mem->map_size - map_offset));
    }
diff --git a/src/intel/vulkan/anv_image_host_copy.c b/src/intel/vulkan/anv_image_host_copy.c
index 5d8e98a4a6d..46571bae9ed 100644
--- a/src/intel/vulkan/anv_image_host_copy.c
+++ b/src/intel/vulkan/anv_image_host_copy.c
@@ -107,7 +107,7 @@ anv_copy_image_memory(struct anv_device *device,
       (binding->address.bo->flags & ANV_BO_ALLOC_HOST_COHERENT) == 0 &&
       device->physical->memory.need_flush;
    if (need_invalidate_flush && !mem_to_img)
-      intel_invalidate_range(img_ptr + start_tile_B, end_tile_B - start_tile_B);
+      util_flush_inval_range(img_ptr + start_tile_B, end_tile_B - start_tile_B);
 #endif
 
    uint32_t img_depth_or_layer = MAX2(base_img_array_layer + array_layer,
@@ -160,7 +160,7 @@ anv_copy_image_memory(struct anv_device *device,
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
    if (need_invalidate_flush && mem_to_img)
-      intel_flush_range(img_ptr + start_tile_B, end_tile_B - start_tile_B);
+      util_flush_range(img_ptr + start_tile_B, end_tile_B - start_tile_B);
 #endif
 }
 
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 2d31d442966..c70dc866f24 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -46,7 +46,6 @@
 #include "common/intel_gem.h"
 #include "common/intel_l3_config.h"
 #include "common/intel_measure.h"
-#include "common/intel_mem.h"
 #include "common/intel_sample_positions.h"
 #include "decoder/intel_decoder.h"
 #include "dev/intel_device_info.h"
@@ -56,6 +55,7 @@
 #include "ds/intel_driver_ds.h"
 #include "util/bitset.h"
 #include "util/bitscan.h"
+#include "util/cache_ops.h"
 #include "util/detect_os.h"
 #include "util/macros.h"
 #include "util/hash_table.h"
diff --git a/src/intel/vulkan/i915/anv_batch_chain.c b/src/intel/vulkan/i915/anv_batch_chain.c
index 1aa5b0eac22..6fb52448cd3 100644
--- a/src/intel/vulkan/i915/anv_batch_chain.c
+++ b/src/intel/vulkan/i915/anv_batch_chain.c
@@ -593,7 +593,7 @@ setup_async_execbuf(struct anv_execbuf *execbuf,
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
       if (device->physical->memory.need_flush &&
           anv_bo_needs_host_cache_flush(bo->alloc_flags))
-         intel_flush_range(bo->map, bo->size);
+         util_flush_range(bo->map, bo->size);
 #endif
    }
 
diff --git a/src/intel/vulkan/xe/anv_batch_chain.c b/src/intel/vulkan/xe/anv_batch_chain.c
index 4c9c5d294fc..d63d5ad5e3c 100644
--- a/src/intel/vulkan/xe/anv_batch_chain.c
+++ b/src/intel/vulkan/xe/anv_batch_chain.c
@@ -195,7 +195,7 @@ xe_queue_exec_async(struct anv_async_submit *submit,
    if (device->physical->memory.need_flush &&
        anv_bo_needs_host_cache_flush(device->utrace_bo_pool.bo_alloc_flags)) {
       util_dynarray_foreach(&submit->batch_bos, struct anv_bo *, bo)
-         intel_flush_range((*bo)->map, (*bo)->size);
+         util_flush_range((*bo)->map, (*bo)->size);
    }
 #endif