From 7a3e6f5ac2a3773feb156d4e01bc17061baafb98 Mon Sep 17 00:00:00 2001
From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Date: Thu, 7 Jan 2021 16:18:31 +0100
Subject: [PATCH] ac/surface: initialize dcc_slice_size on GFX9+

Will be used by RADV to implement DCC layers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8368>
---
 src/amd/common/ac_surface.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index d9aef6e070d..fc29146d14a 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -1844,6 +1844,7 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
          surf->u.gfx9.dcc_block_height = dout.compressBlkHeight;
          surf->u.gfx9.dcc_block_depth = dout.compressBlkDepth;
          surf->dcc_size = dout.dccRamSize;
+         surf->dcc_slice_size = dout.dccRamSliceSize;
          surf->dcc_alignment = dout.dccRamBaseAlign;
          surf->num_dcc_levels = in->numMipLevels;