diff --git a/src/amd/vulkan/bvh/build_interface.h b/src/amd/vulkan/bvh/build_interface.h index 861d59eb0bb..15a7a2aaf5e 100644 --- a/src/amd/vulkan/bvh/build_interface.h +++ b/src/amd/vulkan/bvh/build_interface.h @@ -18,15 +18,14 @@ #define VOID_REF uint64_t #endif -#define RADV_BUILD_FLAG_COMPACT (1u << (VK_BUILD_FLAG_COUNT + 0)) -#define RADV_BUILD_FLAG_BVH8 (1u << (VK_BUILD_FLAG_COUNT + 1)) -#define RADV_BUILD_FLAG_UPDATE_IN_PLACE (1u << (VK_BUILD_FLAG_COUNT + 2)) -#define RADV_BUILD_FLAG_NO_INFS (1u << (VK_BUILD_FLAG_COUNT + 3)) -#define RADV_BUILD_FLAG_WRITE_LEAF_NODE_OFFSETS (1u << (VK_BUILD_FLAG_COUNT + 4)) -#define RADV_BUILD_FLAG_UPDATE_SINGLE_GEOMETRY (1u << (VK_BUILD_FLAG_COUNT + 5)) -#define RADV_BUILD_FLAG_PAIR_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 6)) -#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 7)) -#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES_RETRY (1u << (VK_BUILD_FLAG_COUNT + 8)) +#define RADV_BUILD_FLAG_BVH8 (1u << (VK_BUILD_FLAG_COUNT + 0)) +#define RADV_BUILD_FLAG_UPDATE_IN_PLACE (1u << (VK_BUILD_FLAG_COUNT + 1)) +#define RADV_BUILD_FLAG_NO_INFS (1u << (VK_BUILD_FLAG_COUNT + 2)) +#define RADV_BUILD_FLAG_WRITE_LEAF_NODE_OFFSETS (1u << (VK_BUILD_FLAG_COUNT + 3)) +#define RADV_BUILD_FLAG_UPDATE_SINGLE_GEOMETRY (1u << (VK_BUILD_FLAG_COUNT + 4)) +#define RADV_BUILD_FLAG_PAIR_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 5)) +#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 6)) +#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES_RETRY (1u << (VK_BUILD_FLAG_COUNT + 7)) #define RADV_COPY_MODE_COPY 0 #define RADV_COPY_MODE_SERIALIZE 1 diff --git a/src/amd/vulkan/bvh/encode.comp b/src/amd/vulkan/bvh/encode.comp index a023940bd3b..53c6f853d2c 100644 --- a/src/amd/vulkan/bvh/encode.comp +++ b/src/amd/vulkan/bvh/encode.comp @@ -164,13 +164,7 @@ main() uint32_t dst_offset; if (type == vk_ir_node_internal) { - if (VK_BUILD_FLAG(RADV_BUILD_FLAG_COMPACT)) { - dst_offset = atomicAdd(DEREF(args.header).dst_node_offset, SIZEOF(radv_bvh_box32_node)); - } else { - uint32_t offset_in_internal_nodes = offset - intermediate_leaf_nodes_size; - uint32_t child_index = offset_in_internal_nodes / SIZEOF(vk_ir_box_node); - dst_offset = dst_internal_offset + child_index * SIZEOF(radv_bvh_box32_node); - } + dst_offset = atomicAdd(DEREF(args.header).dst_node_offset, SIZEOF(radv_bvh_box32_node)); REF(vk_ir_box_node) child_node = REF(vk_ir_box_node)OFFSET(args.intermediate_bvh, offset); DEREF(child_node).bvh_offset = dst_offset; diff --git a/src/amd/vulkan/radv_acceleration_structure.c b/src/amd/vulkan/radv_acceleration_structure.c index 3d8734e5068..c5c48c72667 100644 --- a/src/amd/vulkan/radv_acceleration_structure.c +++ b/src/amd/vulkan/radv_acceleration_structure.c @@ -72,10 +72,9 @@ struct update_scratch_layout { }; enum radv_encode_key_bits { - RADV_ENCODE_KEY_COMPACT = (1 << 0), - RADV_ENCODE_KEY_WRITE_LEAF_NODE_OFFSETS = (1 << 1), - RADV_ENCODE_KEY_PAIR_COMPRESS_GFX12 = (1 << 2), - RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12 = (1 << 3), + RADV_ENCODE_KEY_WRITE_LEAF_NODE_OFFSETS = (1 << 0), + RADV_ENCODE_KEY_PAIR_COMPRESS_GFX12 = (1 << 1), + RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12 = (1 << 2), }; static void @@ -274,8 +273,6 @@ radv_get_build_config(VkDevice _device, struct vk_acceleration_structure_build_s uint32_t encode_key = 0; if (radv_use_bvh8(pdev)) { - encode_key |= RADV_ENCODE_KEY_COMPACT; - /* * Leaf nodes are not written in the order provided by the application when BVH8 encoding is used. * The proper order leaf nodes is used... @@ -296,9 +293,6 @@ radv_get_build_config(VkDevice _device, struct vk_acceleration_structure_build_s encode_key |= RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12; } - if (state->build_info->flags & VK_BUILD_ACCELERATION_STRUCTURE_ALLOW_COMPACTION_BIT_KHR) - encode_key |= RADV_ENCODE_KEY_COMPACT; - state->config.encode_key[0] = encode_key; state->config.encode_key[1] = encode_key; state->config.encode_key[2] = encode_key; @@ -363,8 +357,6 @@ radv_build_flags(VkCommandBuffer commandBuffer, uint32_t key) uint32_t flags = 0; - if (key & RADV_ENCODE_KEY_COMPACT) - flags |= RADV_BUILD_FLAG_COMPACT; if (radv_use_bvh8(pdev)) flags |= RADV_BUILD_FLAG_BVH8; if (!radv_emulate_rt(pdev)) { @@ -418,13 +410,11 @@ radv_encode_as(VkCommandBuffer commandBuffer, const struct vk_acceleration_struc uint64_t intermediate_header_addr = state->build_info->scratchData.deviceAddress + state->scratch.header_offset; uint64_t intermediate_bvh_addr = state->build_info->scratchData.deviceAddress + state->scratch.ir_offset; - if (state->config.encode_key[0] & RADV_ENCODE_KEY_COMPACT) { - uint32_t dst_offset = layout.internal_nodes_offset - layout.bvh_offset; - radv_update_memory_cp(cmd_buffer, intermediate_header_addr + offsetof(struct vk_ir_header, dst_node_offset), - &dst_offset, sizeof(uint32_t)); - if (radv_device_physical(device)->info.cp_sdma_ge_use_system_memory_scope) - cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2; - } + uint32_t dst_offset = layout.internal_nodes_offset - layout.bvh_offset; + radv_update_memory_cp(cmd_buffer, intermediate_header_addr + offsetof(struct vk_ir_header, dst_node_offset), + &dst_offset, sizeof(uint32_t)); + if (radv_device_physical(device)->info.cp_sdma_ge_use_system_memory_scope) + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2; const struct encode_args args = { .intermediate_bvh = intermediate_bvh_addr, @@ -622,9 +612,6 @@ radv_encode_triangles_retry_gfx12(VkCommandBuffer commandBuffer, static VkResult radv_init_header_bind_pipeline(VkCommandBuffer commandBuffer, const struct vk_acceleration_structure_build_state *state) { - if (!(state->config.encode_key[1] & RADV_ENCODE_KEY_COMPACT)) - return VK_SUCCESS; - /* Wait for encoding to finish. */ vk_barrier_compute_w_to_compute_r(commandBuffer); @@ -651,20 +638,18 @@ radv_init_header(VkCommandBuffer commandBuffer, const struct vk_acceleration_str struct acceleration_structure_layout layout; radv_get_acceleration_structure_layout(device, state, &layout); - if (state->config.encode_key[1] & RADV_ENCODE_KEY_COMPACT) { - base = offsetof(struct radv_accel_struct_header, geometry_type); + base = offsetof(struct radv_accel_struct_header, geometry_type); - struct header_args args = { - .src = intermediate_header_addr, - .dst = vk_acceleration_structure_get_va(dst), - .bvh_offset = layout.bvh_offset, - .internal_nodes_offset = layout.internal_nodes_offset - layout.bvh_offset, - .instance_count = instance_count, - }; - radv_bvh_build_set_args(commandBuffer, &args, sizeof(args)); + struct header_args args = { + .src = intermediate_header_addr, + .dst = vk_acceleration_structure_get_va(dst), + .bvh_offset = layout.bvh_offset, + .internal_nodes_offset = layout.internal_nodes_offset - layout.bvh_offset, + .instance_count = instance_count, + }; + radv_bvh_build_set_args(commandBuffer, &args, sizeof(args)); - radv_unaligned_dispatch(cmd_buffer, 1, 1, 1); - } + radv_unaligned_dispatch(cmd_buffer, 1, 1, 1); struct radv_accel_struct_header header;