From 7807d49f8225e3ebc9507095776043bbef5f0a0f Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 2 Apr 2024 08:33:35 +0200 Subject: [PATCH] radv: add radv_pipeline_compute.h Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/meson.build | 1 + src/amd/vulkan/meta/radv_meta.h | 1 + src/amd/vulkan/radv_pipeline_compute.h | 81 ++++++++++++++++++++++++++ src/amd/vulkan/radv_private.h | 43 +------------- 4 files changed, 84 insertions(+), 42 deletions(-) create mode 100644 src/amd/vulkan/radv_pipeline_compute.h diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build index 7b878813099..99b1a110ad5 100644 --- a/src/amd/vulkan/meson.build +++ b/src/amd/vulkan/meson.build @@ -139,6 +139,7 @@ libradv_files = files( 'radv_pipeline_cache.c', 'radv_pipeline_cache.h', 'radv_pipeline_compute.c', + 'radv_pipeline_compute.h', 'radv_pipeline_graphics.c', 'radv_pipeline_rt.c', 'radv_printf.c', diff --git a/src/amd/vulkan/meta/radv_meta.h b/src/amd/vulkan/meta/radv_meta.h index daa3062a67c..0f4e850ea03 100644 --- a/src/amd/vulkan/meta/radv_meta.h +++ b/src/amd/vulkan/meta/radv_meta.h @@ -34,6 +34,7 @@ #include "radv_image_view.h" #include "radv_physical_device.h" #include "radv_pipeline.h" +#include "radv_pipeline_compute.h" #include "radv_private.h" #include "radv_queue.h" #include "radv_shader.h" diff --git a/src/amd/vulkan/radv_pipeline_compute.h b/src/amd/vulkan/radv_pipeline_compute.h new file mode 100644 index 00000000000..ae827486181 --- /dev/null +++ b/src/amd/vulkan/radv_pipeline_compute.h @@ -0,0 +1,81 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_PIPELINE_COMPUTE_H +#define RADV_PIPELINE_COMPUTE_H + +#include "radv_pipeline.h" + +struct radv_physical_device; +struct radv_shader_binary; + +struct radv_compute_pipeline { + struct radv_pipeline base; + + struct { + uint64_t va; + uint64_t size; + } indirect; +}; + +RADV_DECL_PIPELINE_DOWNCAST(compute, RADV_PIPELINE_COMPUTE) + +struct radv_compute_pipeline_metadata { + uint32_t shader_va; + uint32_t rsrc1; + uint32_t rsrc2; + uint32_t rsrc3; + uint32_t compute_resource_limits; + uint32_t block_size_x; + uint32_t block_size_y; + uint32_t block_size_z; + uint32_t wave32; + uint32_t grid_base_sgpr; + uint32_t push_const_sgpr; + uint64_t inline_push_const_mask; +}; + +void radv_get_compute_pipeline_metadata(const struct radv_device *device, const struct radv_compute_pipeline *pipeline, + struct radv_compute_pipeline_metadata *metadata); + +void radv_emit_compute_shader(const struct radv_physical_device *pdev, struct radeon_cmdbuf *cs, + const struct radv_shader *shader); + +void radv_compute_pipeline_init(const struct radv_device *device, struct radv_compute_pipeline *pipeline, + const struct radv_pipeline_layout *layout, struct radv_shader *shader); + +struct radv_shader *radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, + struct radv_shader_stage *cs_stage, bool keep_executable_info, + bool keep_statistic_info, bool is_internal, struct radv_shader_binary **cs_binary); + +VkResult radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache, + const VkComputePipelineCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline); + +void radv_destroy_compute_pipeline(struct radv_device *device, struct radv_compute_pipeline *pipeline); + +#endif /* RADV_PIPELINE_COMPUTE_H */ diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 7650ece938b..0143d9f1cd4 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -81,6 +81,7 @@ #include "radv_device.h" #include "radv_physical_device.h" #include "radv_pipeline.h" +#include "radv_pipeline_compute.h" #include "radv_queue.h" #include "radv_radeon_winsys.h" #include "radv_rra.h" @@ -1144,15 +1145,6 @@ struct radv_graphics_pipeline { struct radv_sqtt_shaders_reloc *sqtt_shaders_reloc; }; -struct radv_compute_pipeline { - struct radv_pipeline base; - - struct { - uint64_t va; - uint64_t size; - } indirect; -}; - struct radv_ray_tracing_group { VkRayTracingShaderGroupTypeKHR type; uint32_t recursive_shader; /* generalShader or closestHitShader */ @@ -1248,7 +1240,6 @@ struct radv_graphics_lib_pipeline { RADV_DECL_PIPELINE_DOWNCAST(graphics, RADV_PIPELINE_GRAPHICS) RADV_DECL_PIPELINE_DOWNCAST(graphics_lib, RADV_PIPELINE_GRAPHICS_LIB) -RADV_DECL_PIPELINE_DOWNCAST(compute, RADV_PIPELINE_COMPUTE) RADV_DECL_PIPELINE_DOWNCAST(ray_tracing, RADV_PIPELINE_RAY_TRACING) static inline bool @@ -1263,9 +1254,6 @@ const struct radv_userdata_info *radv_get_user_sgpr(const struct radv_shader *sh struct radv_shader *radv_get_shader(struct radv_shader *const *shaders, gl_shader_stage stage); -void radv_emit_compute_shader(const struct radv_physical_device *pdev, struct radeon_cmdbuf *cs, - const struct radv_shader *shader); - void radv_emit_vertex_shader(const struct radv_device *device, struct radeon_cmdbuf *ctx_cs, struct radeon_cmdbuf *cs, const struct radv_shader *vs, const struct radv_shader *next_stage); @@ -1314,12 +1302,6 @@ void radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipelin struct radv_shader **shaders, struct radv_shader_binary **binaries, struct radv_shader **gs_copy_shader, struct radv_shader_binary **gs_copy_binary); -void radv_compute_pipeline_init(const struct radv_device *device, struct radv_compute_pipeline *pipeline, - const struct radv_pipeline_layout *layout, struct radv_shader *shader); - -struct radv_shader *radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, - struct radv_shader_stage *cs_stage, bool keep_executable_info, - bool keep_statistic_info, bool is_internal, struct radv_shader_binary **cs_binary); struct radv_graphics_pipeline_create_info { bool use_rectlist; @@ -1337,10 +1319,6 @@ VkResult radv_graphics_pipeline_create(VkDevice device, VkPipelineCache cache, const struct radv_graphics_pipeline_create_info *extra, const VkAllocationCallbacks *alloc, VkPipeline *pPipeline); -VkResult radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache, - const VkComputePipelineCreateInfo *pCreateInfo, - const VkAllocationCallbacks *pAllocator, VkPipeline *pPipeline); - bool radv_pipeline_has_ngg(const struct radv_graphics_pipeline *pipeline); @@ -1915,7 +1893,6 @@ void radv_emit_spm_setup(struct radv_device *device, struct radeon_cmdbuf *cs, e void radv_destroy_graphics_pipeline(struct radv_device *device, struct radv_graphics_pipeline *pipeline); void radv_destroy_graphics_lib_pipeline(struct radv_device *device, struct radv_graphics_lib_pipeline *pipeline); -void radv_destroy_compute_pipeline(struct radv_device *device, struct radv_compute_pipeline *pipeline); void radv_destroy_ray_tracing_pipeline(struct radv_device *device, struct radv_ray_tracing_pipeline *pipeline); void radv_begin_conditional_rendering(struct radv_cmd_buffer *cmd_buffer, uint64_t va, bool draw_visible); @@ -1924,24 +1901,6 @@ void radv_end_conditional_rendering(struct radv_cmd_buffer *cmd_buffer); bool radv_gang_init(struct radv_cmd_buffer *cmd_buffer); void radv_gang_cache_flush(struct radv_cmd_buffer *cmd_buffer); -struct radv_compute_pipeline_metadata { - uint32_t shader_va; - uint32_t rsrc1; - uint32_t rsrc2; - uint32_t rsrc3; - uint32_t compute_resource_limits; - uint32_t block_size_x; - uint32_t block_size_y; - uint32_t block_size_z; - uint32_t wave32; - uint32_t grid_base_sgpr; - uint32_t push_const_sgpr; - uint64_t inline_push_const_mask; -}; - -void radv_get_compute_pipeline_metadata(const struct radv_device *device, const struct radv_compute_pipeline *pipeline, - struct radv_compute_pipeline_metadata *metadata); - #define RADV_FROM_HANDLE(__radv_type, __name, __handle) VK_FROM_HANDLE(__radv_type, __name, __handle) VK_DEFINE_HANDLE_CASTS(radv_cmd_buffer, vk.base, VkCommandBuffer, VK_OBJECT_TYPE_COMMAND_BUFFER)