diff --git a/src/intel/compiler/elk/elk_disasm.c b/src/intel/compiler/elk/elk_disasm.c index fe5bd126cdd..48a40f5c8c0 100644 --- a/src/intel/compiler/elk/elk_disasm.c +++ b/src/intel/compiler/elk/elk_disasm.c @@ -382,16 +382,10 @@ static const char *const dp_rc_msg_type_gfx7[16] = { [GFX7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write" }; -static const char *const dp_rc_msg_type_gfx9[16] = { - [GFX9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", - [GFX9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read" -}; - static const char *const * dp_rc_msg_type(const struct intel_device_info *devinfo) { - return (devinfo->ver >= 9 ? dp_rc_msg_type_gfx9 : - devinfo->ver >= 7 ? dp_rc_msg_type_gfx7 : + return (devinfo->ver >= 7 ? dp_rc_msg_type_gfx7 : devinfo->ver >= 6 ? dp_rc_msg_type_gfx6 : dp_write_port_msg_type); } @@ -446,21 +440,12 @@ static const char *const dp_dc1_msg_type_hsw[32] = { [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] = "DC 4x2 atomic counter op", [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write", - [GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read", [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read", [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP] = "DC A64 untyped atomic op", [GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ] = "DC A64 oword block read", [GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE] = "DC A64 oword block write", [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write", [GFX8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write", - [GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] = - "DC untyped atomic float op", - [GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP] = - "DC A64 untyped atomic float op", - [GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP] = - "DC A64 untyped atomic half-integer op", - [GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP] = - "DC A64 untyped atomic half-float op", }; static const char *const aop[16] = { @@ -481,13 +466,6 @@ static const char *const aop[16] = { [ELK_AOP_PREDEC] = "predec", }; -static const char *const aop_float[5] = { - [ELK_AOP_FMAX] = "fmax", - [ELK_AOP_FMIN] = "fmin", - [ELK_AOP_FCMPWR] = "fcmpwr", - [ELK_AOP_FADD] = "fadd", -}; - static const char * const pixel_interpolator_msg_types[4] = { [GFX7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset", [GFX7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position", @@ -2084,7 +2062,6 @@ elk_disassemble_inst(FILE *file, const struct elk_isa_info *isa, case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2: case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2: case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP: - case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP: control(file, "atomic op", aop, msg_ctrl & 0xf, &space); break; case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ: @@ -2098,13 +2075,6 @@ elk_disassemble_inst(FILE *file, const struct elk_isa_info *isa, simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf); break; } - case GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP: - case GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP: - case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP: - format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16); - control(file, "atomic float op", aop_float, msg_ctrl & 0xf, - &space); - break; case GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE: case GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ: assert(dp_oword_block_rw[msg_ctrl & 7]); diff --git a/src/intel/compiler/elk/elk_eu.h b/src/intel/compiler/elk/elk_eu.h index 8bdd78aa522..c4e119b665f 100644 --- a/src/intel/compiler/elk/elk_eu.h +++ b/src/intel/compiler/elk/elk_eu.h @@ -683,26 +683,6 @@ elk_dp_untyped_atomic_desc(const struct intel_device_info *devinfo, return elk_dp_surface_desc(devinfo, msg_type, msg_control); } -static inline uint32_t -elk_dp_untyped_atomic_float_desc(const struct intel_device_info *devinfo, - unsigned exec_size, - unsigned atomic_op, - bool response_expected) -{ - assert(exec_size <= 8 || exec_size == 16); - assert(devinfo->ver >= 9); - - assert(exec_size > 0); - const unsigned msg_type = GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP; - - const unsigned msg_control = - SET_BITS(atomic_op, 1, 0) | - SET_BITS(exec_size <= 8, 4, 4) | - SET_BITS(response_expected, 5, 5); - - return elk_dp_surface_desc(devinfo, msg_type, msg_control); -} - static inline unsigned elk_mdc_cmask(unsigned num_channels) { @@ -937,12 +917,9 @@ elk_dp_a64_untyped_atomic_desc(const struct intel_device_info *devinfo, { assert(exec_size == 8); assert(devinfo->ver >= 8); - assert(bit_size == 16 || bit_size == 32 || bit_size == 64); - assert(devinfo->ver >= 12 || bit_size >= 32); + assert(bit_size == 32 || bit_size == 64); - const unsigned msg_type = bit_size == 16 ? - GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP : - GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP; + const unsigned msg_type = GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP; const unsigned msg_control = SET_BITS(atomic_op, 3, 0) | @@ -953,31 +930,6 @@ elk_dp_a64_untyped_atomic_desc(const struct intel_device_info *devinfo, msg_type, msg_control); } -static inline uint32_t -elk_dp_a64_untyped_atomic_float_desc(const struct intel_device_info *devinfo, - ASSERTED unsigned exec_size, - unsigned bit_size, - unsigned atomic_op, - bool response_expected) -{ - assert(exec_size == 8); - assert(devinfo->ver >= 9); - assert(bit_size == 16 || bit_size == 32); - assert(devinfo->ver >= 12 || bit_size == 32); - - assert(exec_size > 0); - const unsigned msg_type = bit_size == 32 ? - GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP : - GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP; - - const unsigned msg_control = - SET_BITS(atomic_op, 1, 0) | - SET_BITS(response_expected, 5, 5); - - return elk_dp_desc(devinfo, GFX8_BTI_STATELESS_NON_COHERENT, - msg_type, msg_control); -} - static inline uint32_t elk_dp_typed_atomic_desc(const struct intel_device_info *devinfo, unsigned exec_size, @@ -1109,22 +1061,6 @@ elk_fb_desc_msg_type(const struct intel_device_info *devinfo, uint32_t desc) return GET_BITS(desc, 16, 13); } -static inline uint32_t -elk_fb_read_desc(const struct intel_device_info *devinfo, - unsigned binding_table_index, - unsigned msg_control, - unsigned exec_size, - bool per_sample) -{ - assert(devinfo->ver >= 9); - assert(exec_size == 8 || exec_size == 16); - - return elk_fb_desc(devinfo, binding_table_index, - GFX9_DATAPORT_RC_RENDER_TARGET_READ, msg_control) | - SET_BITS(per_sample, 13, 13) | - SET_BITS(exec_size == 8, 8, 8) /* Render Target Message Subtype */; -} - static inline uint32_t elk_fb_write_desc(const struct intel_device_info *devinfo, unsigned binding_table_index, @@ -1755,14 +1691,6 @@ elk_inst *elk_fb_WRITE(struct elk_codegen *p, bool last_render_target, bool header_present); -elk_inst *elk_gfx9_fb_READ(struct elk_codegen *p, - struct elk_reg dst, - struct elk_reg payload, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool per_sample); - void elk_SAMPLE(struct elk_codegen *p, struct elk_reg dest, unsigned msg_reg_nr, diff --git a/src/intel/compiler/elk/elk_eu_defines.h b/src/intel/compiler/elk/elk_eu_defines.h index 3601673e863..df6f6fc388e 100644 --- a/src/intel/compiler/elk/elk_eu_defines.h +++ b/src/intel/compiler/elk/elk_eu_defines.h @@ -591,13 +591,11 @@ enum elk_message_target { #define ELK_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define ELK_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define ELK_DATAPORT_OWORD_BLOCK_8_OWORDS 4 -#define GFX12_DATAPORT_OWORD_BLOCK_16_OWORDS 5 #define ELK_DATAPORT_OWORD_BLOCK_OWORDS(n) \ ((n) == 1 ? ELK_DATAPORT_OWORD_BLOCK_1_OWORDLOW : \ (n) == 2 ? ELK_DATAPORT_OWORD_BLOCK_2_OWORDS : \ (n) == 4 ? ELK_DATAPORT_OWORD_BLOCK_4_OWORDS : \ (n) == 8 ? ELK_DATAPORT_OWORD_BLOCK_8_OWORDS : \ - (n) == 16 ? GFX12_DATAPORT_OWORD_BLOCK_16_OWORDS : \ (abort(), ~0)) #define ELK_DATAPORT_OWORD_BLOCK_DWORDS(n) \ ((n) == 4 ? ELK_DATAPORT_OWORD_BLOCK_1_OWORDLOW : \ @@ -719,18 +717,10 @@ enum elk_message_target { #define GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ 0x10 #define GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ 0x11 #define GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP 0x12 -#define GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP 0x13 #define GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ 0x14 #define GFX8_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE 0x15 #define GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE 0x19 #define GFX8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE 0x1a -#define GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP 0x1b -#define GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP 0x1d -#define GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP 0x1e - -/* GFX9 */ -#define GFX9_DATAPORT_RC_RENDER_TARGET_WRITE 12 -#define GFX9_DATAPORT_RC_RENDER_TARGET_READ 13 /* A64 scattered message subtype */ #define GFX8_A64_SCATTERED_SUBTYPE_BYTE 0 @@ -775,12 +765,6 @@ enum elk_message_target { */ #define GFX8_BTI_STATELESS_IA_COHERENT 255 #define GFX8_BTI_STATELESS_NON_COHERENT 253 -#define GFX9_BTI_BINDLESS 252 - -/* This ID doesn't map anything HW related value. It exists to inform the - * lowering code to not use the bindless heap. - */ -#define GFX125_NON_BINDLESS (1u << 16) /* Dataport atomic operations for Untyped Atomic Integer Operation message * (and others). diff --git a/src/intel/compiler/elk/elk_eu_emit.c b/src/intel/compiler/elk/elk_eu_emit.c index 1ea83db4dc8..295c916c568 100644 --- a/src/intel/compiler/elk/elk_eu_emit.c +++ b/src/intel/compiler/elk/elk_eu_emit.c @@ -2306,32 +2306,6 @@ elk_fb_WRITE(struct elk_codegen *p, return insn; } -elk_inst * -elk_gfx9_fb_READ(struct elk_codegen *p, - struct elk_reg dst, - struct elk_reg payload, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool per_sample) -{ - const struct intel_device_info *devinfo = p->devinfo; - assert(devinfo->ver >= 9); - elk_inst *insn = next_insn(p, ELK_OPCODE_SENDC); - - elk_inst_set_sfid(devinfo, insn, GFX6_SFID_DATAPORT_RENDER_CACHE); - elk_set_dest(p, insn, dst); - elk_set_src0(p, insn, payload); - elk_set_desc( - p, insn, - elk_message_desc(devinfo, msg_length, response_length, true) | - elk_fb_read_desc(devinfo, binding_table_index, 0 /* msg_control */, - 1 << elk_get_default_exec_size(p), per_sample)); - elk_inst_set_rt_slot_group(devinfo, insn, elk_get_default_group(p) / 16); - - return insn; -} - /** * Texture sample instruction. * Note: the msg_type plus msg_length values determine exactly what kind diff --git a/src/intel/compiler/elk/elk_fs.h b/src/intel/compiler/elk/elk_fs.h index 97482aba9a3..5d5593b8be1 100644 --- a/src/intel/compiler/elk/elk_fs.h +++ b/src/intel/compiler/elk/elk_fs.h @@ -471,8 +471,6 @@ private: struct elk_reg payload, struct elk_reg payload2); void generate_fb_write(elk_fs_inst *inst, struct elk_reg payload); - void generate_fb_read(elk_fs_inst *inst, struct elk_reg dst, - struct elk_reg payload); void generate_cs_terminate(elk_fs_inst *inst, struct elk_reg payload); void generate_barrier(elk_fs_inst *inst, struct elk_reg src); bool generate_linterp(elk_fs_inst *inst, struct elk_reg dst, diff --git a/src/intel/compiler/elk/elk_fs_generator.cpp b/src/intel/compiler/elk/elk_fs_generator.cpp index 000466de4bf..28d6ae267a8 100644 --- a/src/intel/compiler/elk/elk_fs_generator.cpp +++ b/src/intel/compiler/elk/elk_fs_generator.cpp @@ -434,20 +434,6 @@ elk_fs_generator::generate_fb_write(elk_fs_inst *inst, struct elk_reg payload) } } -void -elk_fs_generator::generate_fb_read(elk_fs_inst *inst, struct elk_reg dst, - struct elk_reg payload) -{ - assert(inst->size_written % REG_SIZE == 0); - struct elk_wm_prog_data *prog_data = elk_wm_prog_data(this->prog_data); - /* We assume that render targets start at binding table index 0. */ - const unsigned surf_index = inst->target; - - elk_gfx9_fb_READ(p, dst, payload, surf_index, - inst->header_size, inst->size_written / REG_SIZE, - prog_data->persample_dispatch); -} - void elk_fs_generator::generate_mov_indirect(elk_fs_inst *inst, struct elk_reg dst, @@ -2050,11 +2036,6 @@ elk_fs_generator::generate_code(const elk_cfg_t *cfg, int dispatch_width, send_count++; break; - case ELK_FS_OPCODE_FB_READ: - generate_fb_read(inst, dst, src[0]); - send_count++; - break; - case ELK_OPCODE_HALT: generate_halt(inst); break; diff --git a/src/intel/compiler/elk/elk_fs_nir.cpp b/src/intel/compiler/elk/elk_fs_nir.cpp index fcaf79829ae..2bd627d98c5 100644 --- a/src/intel/compiler/elk/elk_fs_nir.cpp +++ b/src/intel/compiler/elk/elk_fs_nir.cpp @@ -5961,14 +5961,7 @@ fs_nir_emit_intrinsic(nir_to_elk_state &ntb, const unsigned bit_size = instr->def.bit_size; elk_fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; - if (devinfo->verx10 >= 125) { - const fs_builder ubld = bld.exec_all().group(1, 0); - elk_fs_reg handle = component(ubld.vgrf(ELK_REGISTER_TYPE_UD), 0); - ubld.AND(handle, retype(elk_vec1_grf(0, 5), ELK_REGISTER_TYPE_UD), - elk_imm_ud(INTEL_MASK(31, 10))); - srcs[SURFACE_LOGICAL_SRC_SURFACE] = elk_imm_ud(GFX125_NON_BINDLESS); - srcs[SURFACE_LOGICAL_SRC_SURFACE_HANDLE] = handle; - } else if (devinfo->ver >= 8) { + if (devinfo->ver >= 8) { srcs[SURFACE_LOGICAL_SRC_SURFACE] = elk_imm_ud(GFX8_BTI_STATELESS_NON_COHERENT); } else { @@ -6028,14 +6021,7 @@ fs_nir_emit_intrinsic(nir_to_elk_state &ntb, const unsigned bit_size = nir_src_bit_size(instr->src[0]); elk_fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; - if (devinfo->verx10 >= 125) { - const fs_builder ubld = bld.exec_all().group(1, 0); - elk_fs_reg handle = component(ubld.vgrf(ELK_REGISTER_TYPE_UD), 0); - ubld.AND(handle, retype(elk_vec1_grf(0, 5), ELK_REGISTER_TYPE_UD), - elk_imm_ud(INTEL_MASK(31, 10))); - srcs[SURFACE_LOGICAL_SRC_SURFACE] = elk_imm_ud(GFX125_NON_BINDLESS); - srcs[SURFACE_LOGICAL_SRC_SURFACE_HANDLE] = handle; - } else if (devinfo->ver >= 8) { + if (devinfo->ver >= 8) { srcs[SURFACE_LOGICAL_SRC_SURFACE] = elk_imm_ud(GFX8_BTI_STATELESS_NON_COHERENT); } else { diff --git a/src/intel/compiler/elk/elk_lower_logical_sends.cpp b/src/intel/compiler/elk/elk_lower_logical_sends.cpp index 4178f232dee..a9e5bd8a24c 100644 --- a/src/intel/compiler/elk/elk_lower_logical_sends.cpp +++ b/src/intel/compiler/elk/elk_lower_logical_sends.cpp @@ -1314,34 +1314,9 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, elk_fs_inst *inst, elk_op 0 /* return_format unused on gfx7+ */); inst->src[0] = elk_imm_ud(0); inst->src[1] = elk_imm_ud(0); - } else if (surface_handle.file != BAD_FILE) { - /* Bindless surface */ - assert(devinfo->ver >= 9); - inst->desc = elk_sampler_desc(devinfo, - GFX9_BTI_BINDLESS, - sampler.file == IMM ? sampler.ud % 16 : 0, - msg_type, - simd_mode, - 0 /* return_format unused on gfx7+ */); - - /* For bindless samplers, the entire address is included in the message - * header so we can leave the portion in the message descriptor 0. - */ - if (sampler_handle.file != BAD_FILE || sampler.file == IMM) { - inst->src[0] = elk_imm_ud(0); - } else { - const fs_builder ubld = bld.group(1, 0).exec_all(); - elk_fs_reg desc = ubld.vgrf(ELK_REGISTER_TYPE_UD); - ubld.SHL(desc, sampler, elk_imm_ud(8)); - inst->src[0] = component(desc, 0); - } - - /* We assume that the driver provided the handle in the top 20 bits so - * we can use the surface handle directly as the extended descriptor. - */ - inst->src[1] = retype(surface_handle, ELK_REGISTER_TYPE_UD); - inst->send_ex_bso = compiler->extended_bindless_surface_offset; } else { + assert(surface_handle.file == BAD_FILE); + /* Immediate portion of the descriptor */ inst->desc = elk_sampler_desc(devinfo, 0, /* surface */ @@ -1538,9 +1513,6 @@ static void setup_surface_descriptors(const fs_builder &bld, elk_fs_inst *inst, uint32_t desc, const elk_fs_reg &surface, const elk_fs_reg &surface_handle) { - const ASSERTED intel_device_info *devinfo = bld.shader->devinfo; - const elk_compiler *compiler = bld.shader->compiler; - /* We must have exactly one of surface and surface_handle */ assert((surface.file == BAD_FILE) != (surface_handle.file == BAD_FILE)); @@ -1548,18 +1520,9 @@ setup_surface_descriptors(const fs_builder &bld, elk_fs_inst *inst, uint32_t des inst->desc = desc | (surface.ud & 0xff); inst->src[0] = elk_imm_ud(0); inst->src[1] = elk_imm_ud(0); /* ex_desc */ - } else if (surface_handle.file != BAD_FILE) { - /* Bindless surface */ - assert(devinfo->ver >= 9); - inst->desc = desc | GFX9_BTI_BINDLESS; - inst->src[0] = elk_imm_ud(0); - - /* We assume that the driver provided the handle in the top 20 bits so - * we can use the surface handle directly as the extended descriptor. - */ - inst->src[1] = retype(surface_handle, ELK_REGISTER_TYPE_UD); - inst->send_ex_bso = compiler->extended_bindless_surface_offset; } else { + assert(surface_handle.file == BAD_FILE); + inst->desc = desc; const fs_builder ubld = bld.exec_all().group(1, 0); elk_fs_reg tmp = ubld.vgrf(ELK_REGISTER_TYPE_UD); @@ -1764,15 +1727,10 @@ lower_surface_logical_send(const fs_builder &bld, elk_fs_inst *inst) break; case ELK_SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL: - if (elk_lsc_opcode_is_atomic_float((enum elk_lsc_opcode) arg.ud)) { - desc = elk_dp_untyped_atomic_float_desc(devinfo, inst->exec_size, - lsc_op_to_legacy_atomic(arg.ud), - !inst->dst.is_null()); - } else { - desc = elk_dp_untyped_atomic_desc(devinfo, inst->exec_size, - lsc_op_to_legacy_atomic(arg.ud), - !inst->dst.is_null()); - } + assert(!elk_lsc_opcode_is_atomic_float((enum elk_lsc_opcode) arg.ud)); + desc = elk_dp_untyped_atomic_desc(devinfo, inst->exec_size, + lsc_op_to_legacy_atomic(arg.ud), + !inst->dst.is_null()); break; case ELK_SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL: @@ -2034,18 +1992,11 @@ lower_a64_logical_send(const fs_builder &bld, elk_fs_inst *inst) break; case ELK_SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL: - if (elk_lsc_opcode_is_atomic_float((enum elk_lsc_opcode) arg)) { - desc = - elk_dp_a64_untyped_atomic_float_desc(devinfo, inst->exec_size, - type_sz(inst->dst.type) * 8, - lsc_op_to_legacy_atomic(arg), - !inst->dst.is_null()); - } else { - desc = elk_dp_a64_untyped_atomic_desc(devinfo, inst->exec_size, - type_sz(inst->dst.type) * 8, - lsc_op_to_legacy_atomic(arg), - !inst->dst.is_null()); - } + assert(!elk_lsc_opcode_is_atomic_float((enum elk_lsc_opcode) arg)); + desc = elk_dp_a64_untyped_atomic_desc(devinfo, inst->exec_size, + type_sz(inst->dst.type) * 8, + lsc_op_to_legacy_atomic(arg), + !inst->dst.is_null()); break; default: diff --git a/src/intel/compiler/elk/elk_schedule_instructions.cpp b/src/intel/compiler/elk/elk_schedule_instructions.cpp index b68b5cfcee8..7ab81c3877a 100644 --- a/src/intel/compiler/elk/elk_schedule_instructions.cpp +++ b/src/intel/compiler/elk/elk_schedule_instructions.cpp @@ -553,11 +553,7 @@ elk_schedule_node::set_latency_gfx7(const struct elk_isa_info *isa) case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2: case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2: case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP: - case GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP: case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP: - case GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP: - case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP: - case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP: /* See also GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP */ latency = 14000; break;