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aco: implement a workaround for gl_FragCoord.z with VRS on GFX10.3

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Without it, FragCoord.z will have the value of one of the fine pixels
instead of the center of the coarse pixel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7837>
This commit is contained in:
Samuel Pitoiset
2020-12-10 21:47:23 +01:00
committed by Marge Bot
parent 45524afe95
commit 77343576eb
2 changed files with 36 additions and 1 deletions
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src/amd/compiler/aco_instruction_selection_setup.cpp
+9
View File
@@ -909,6 +909,15 @@ void init_context(isel_context *ctx, nir_shader *shader)
spi_ps_inputs |= S_0286CC_POS_X_FLOAT_ENA(1) << i;
}
if (ctx->options->adjust_frag_coord_z &&
intrinsic->intrinsic == nir_intrinsic_load_frag_coord &&
G_0286CC_POS_Z_FLOAT_ENA(spi_ps_inputs)) {
/* Enable ancillary for adjusting gl_FragCoord.z for
* VRS due to a hw bug on some GFX10.3 chips.
*/
spi_ps_inputs |= S_0286CC_ANCILLARY_ENA(1);
}
break;
}
case nir_intrinsic_load_sample_id: