From 766508f56a416aec14c0fa1cedda18d8ea270999 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Iv=C3=A1n=20Briano?= Date: Thu, 15 Dec 2022 21:25:13 -0800 Subject: [PATCH] Revert "anv: Refactor anv_pipeline to use the anv_pipeline_type" This reverts commit b1126abb38a5ff4a10c4c3240d01c22c1fb90c1b. This breaks all hell at least on DG2, as there are several cases left where current_pipeline gets checked against GPGPU to decide what to do, and the value doesn't match that of ANV_HW_PIPELINE_STATE_COMPUTE. On top of that, it also misses checking for ANV_HW_PIPELINE_STATE_RAYTRACING. Then there's the fact that in some cases, current_pipeline will be UINT32_MAX, because it's the original undefined state and also used after executing a secondary command buffer because we are not tracking on which pipeline did the secondary left us. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7910 Part-of: --- src/intel/vulkan/anv_genX.h | 2 +- src/intel/vulkan/anv_pipeline.c | 26 +++++++++++----------- src/intel/vulkan/anv_private.h | 25 +++++++++++---------- src/intel/vulkan/genX_cmd_buffer.c | 35 +++++++++--------------------- src/intel/vulkan/genX_gpu_memcpy.c | 6 ++--- 5 files changed, 39 insertions(+), 55 deletions(-) diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h index c7b1a634cd6..084671ae263 100644 --- a/src/intel/vulkan/anv_genX.h +++ b/src/intel/vulkan/anv_genX.h @@ -85,7 +85,7 @@ void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer); enum anv_pipe_bits genX(emit_apply_pipe_flushes)(struct anv_batch *batch, struct anv_device *device, - enum anv_hw_pipeline_state current_pipeline, + uint32_t current_pipeline, enum anv_pipe_bits bits); void genX(emit_so_memcpy_init)(struct anv_memcpy_state *state, diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 73e95e7d345..1c4d4b99cdd 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -273,7 +273,7 @@ anv_shader_stage_to_nir(struct anv_device *device, VkResult anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device, - enum anv_hw_pipeline_state type, + enum anv_pipeline_type type, VkPipelineCreateFlags flags, const VkAllocationCallbacks *pAllocator) { @@ -330,7 +330,7 @@ void anv_DestroyPipeline( return; switch (pipeline->type) { - case ANV_HW_PIPELINE_STATE_GRAPHICS: { + case ANV_PIPELINE_GRAPHICS: { struct anv_graphics_pipeline *gfx_pipeline = anv_pipeline_to_graphics(pipeline); @@ -341,7 +341,7 @@ void anv_DestroyPipeline( break; } - case ANV_HW_PIPELINE_STATE_COMPUTE: { + case ANV_PIPELINE_COMPUTE: { struct anv_compute_pipeline *compute_pipeline = anv_pipeline_to_compute(pipeline); @@ -351,7 +351,7 @@ void anv_DestroyPipeline( break; } - case ANV_HW_PIPELINE_STATE_RAY_TRACING: { + case ANV_PIPELINE_RAY_TRACING: { struct anv_ray_tracing_pipeline *rt_pipeline = anv_pipeline_to_ray_tracing(pipeline); @@ -849,7 +849,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, NIR_PASS(_, nir, anv_nir_lower_ycbcr_textures, layout); - if (pipeline->type == ANV_HW_PIPELINE_STATE_GRAPHICS) { + if (pipeline->type == ANV_PIPELINE_GRAPHICS) { struct anv_graphics_pipeline *gfx_pipeline = anv_pipeline_to_graphics(pipeline); NIR_PASS(_, nir, anv_nir_lower_multiview, gfx_pipeline->view_mask, @@ -2137,7 +2137,7 @@ anv_compute_pipeline_create(struct anv_device *device, return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); result = anv_pipeline_init(&pipeline->base, device, - ANV_HW_PIPELINE_STATE_COMPUTE, pCreateInfo->flags, + ANV_PIPELINE_COMPUTE, pCreateInfo->flags, pAllocator); if (result != VK_SUCCESS) { vk_free2(&device->vk.alloc, pAllocator, pipeline); @@ -2231,7 +2231,7 @@ anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline, VkResult result; result = anv_pipeline_init(&pipeline->base, device, - ANV_HW_PIPELINE_STATE_GRAPHICS, pCreateInfo->flags, + ANV_PIPELINE_GRAPHICS, pCreateInfo->flags, alloc); if (result != VK_SUCCESS) return result; @@ -3079,7 +3079,7 @@ anv_ray_tracing_pipeline_create( return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); result = anv_pipeline_init(&pipeline->base, device, - ANV_HW_PIPELINE_STATE_RAY_TRACING, pCreateInfo->flags, + ANV_PIPELINE_RAY_TRACING, pCreateInfo->flags, pAllocator); if (result != VK_SUCCESS) { vk_free2(&device->vk.alloc, pAllocator, pipeline); @@ -3286,15 +3286,15 @@ VkResult anv_GetPipelineExecutableStatisticsKHR( const struct brw_stage_prog_data *prog_data; switch (pipeline->type) { - case ANV_HW_PIPELINE_STATE_GRAPHICS: { + case ANV_PIPELINE_GRAPHICS: { prog_data = anv_pipeline_to_graphics(pipeline)->shaders[exe->stage]->prog_data; break; } - case ANV_HW_PIPELINE_STATE_COMPUTE: { + case ANV_PIPELINE_COMPUTE: { prog_data = anv_pipeline_to_compute(pipeline)->cs->prog_data; break; } - case ANV_HW_PIPELINE_STATE_RAY_TRACING: { + case ANV_PIPELINE_RAY_TRACING: { struct anv_shader_bin **shader = util_dynarray_element(&anv_pipeline_to_ray_tracing(pipeline)->shaders, struct anv_shader_bin *, @@ -3463,7 +3463,7 @@ anv_GetRayTracingShaderGroupHandlesKHR( ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline); - if (pipeline->type != ANV_HW_PIPELINE_STATE_RAY_TRACING) + if (pipeline->type != ANV_PIPELINE_RAY_TRACING) return vk_error(device, VK_ERROR_FEATURE_NOT_PRESENT); struct anv_ray_tracing_pipeline *rt_pipeline = @@ -3501,7 +3501,7 @@ anv_GetRayTracingShaderGroupStackSizeKHR( VkShaderGroupShaderKHR groupShader) { ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline); - assert(pipeline->type == ANV_HW_PIPELINE_STATE_RAY_TRACING); + assert(pipeline->type == ANV_PIPELINE_RAY_TRACING); struct anv_ray_tracing_pipeline *rt_pipeline = anv_pipeline_to_ray_tracing(pipeline); diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 2cc4a85de33..294897c1584 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2581,15 +2581,10 @@ struct anv_cmd_ray_tracing_state { } scratch; }; -enum anv_hw_pipeline_state { - ANV_HW_PIPELINE_STATE_GRAPHICS, - ANV_HW_PIPELINE_STATE_COMPUTE, - ANV_HW_PIPELINE_STATE_RAY_TRACING, -}; - /** State required while building cmd buffer */ struct anv_cmd_state { - enum anv_hw_pipeline_state current_pipeline; + /* PIPELINE_SELECT.PipelineSelection */ + uint32_t current_pipeline; const struct intel_l3_config * current_l3_config; uint32_t last_aux_map_state; @@ -2989,6 +2984,12 @@ struct anv_pipeline_executable { char *disasm; }; +enum anv_pipeline_type { + ANV_PIPELINE_GRAPHICS, + ANV_PIPELINE_COMPUTE, + ANV_PIPELINE_RAY_TRACING, +}; + struct anv_pipeline { struct vk_object_base base; @@ -2999,7 +3000,7 @@ struct anv_pipeline { void * mem_ctx; - enum anv_hw_pipeline_state type; + enum anv_pipeline_type type; VkPipelineCreateFlags flags; uint32_t ray_queries; @@ -3114,9 +3115,9 @@ struct anv_ray_tracing_pipeline { return (struct anv_##pipe_type##_pipeline *) pipeline; \ } -ANV_DECL_PIPELINE_DOWNCAST(graphics, ANV_HW_PIPELINE_STATE_GRAPHICS) -ANV_DECL_PIPELINE_DOWNCAST(compute, ANV_HW_PIPELINE_STATE_COMPUTE) -ANV_DECL_PIPELINE_DOWNCAST(ray_tracing, ANV_HW_PIPELINE_STATE_RAY_TRACING) +ANV_DECL_PIPELINE_DOWNCAST(graphics, ANV_PIPELINE_GRAPHICS) +ANV_DECL_PIPELINE_DOWNCAST(compute, ANV_PIPELINE_COMPUTE) +ANV_DECL_PIPELINE_DOWNCAST(ray_tracing, ANV_PIPELINE_RAY_TRACING) static inline bool anv_pipeline_has_stage(const struct anv_graphics_pipeline *pipeline, @@ -3205,7 +3206,7 @@ anv_device_finish_rt_shaders(struct anv_device *device); VkResult anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device, - enum anv_hw_pipeline_state type, + enum anv_pipeline_type type, VkPipelineCreateFlags flags, const VkAllocationCallbacks *pAllocator); diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 848d713ea1c..7929c1f535a 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -56,7 +56,7 @@ #include "genX_cmd_draw_helpers.h" static void genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer, - enum anv_hw_pipeline_state pipeline); + uint32_t pipeline); static enum anv_pipe_bits convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) { @@ -156,8 +156,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) * Workaround the non pipelined state not applying in MEDIA/GPGPU pipeline * mode by putting the pipeline temporarily in 3D mode. */ - enum anv_hw_pipeline_state gfx12_wa_pipeline = - cmd_buffer->state.current_pipeline; + uint32_t gfx12_wa_pipeline = cmd_buffer->state.current_pipeline; genX(flush_pipeline_select_3d)(cmd_buffer); #endif @@ -1518,7 +1517,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, ALWAYS_INLINE enum anv_pipe_bits genX(emit_apply_pipe_flushes)(struct anv_batch *batch, struct anv_device *device, - enum anv_hw_pipeline_state current_pipeline, + uint32_t current_pipeline, enum anv_pipe_bits bits) { #if GFX_VER >= 12 @@ -1619,7 +1618,7 @@ genX(emit_apply_pipe_flushes)(struct anv_batch *batch, * The same text exists a few rows below for Post Sync Op. */ if (bits & ANV_PIPE_POST_SYNC_BIT) { - if (GFX_VER == 9 && current_pipeline == ANV_HW_PIPELINE_STATE_COMPUTE) + if (GFX_VER == 9 && current_pipeline == GPGPU) bits |= ANV_PIPE_CS_STALL_BIT; bits &= ~ANV_PIPE_POST_SYNC_BIT; } @@ -6146,23 +6145,9 @@ genX(CmdTraceRaysIndirect2KHR)( #endif /* GFX_VERx10 >= 125 */ -static uint32_t -anv_pipeline_selection_from_type(enum anv_hw_pipeline_state pipeline) -{ - switch (pipeline) { - case ANV_HW_PIPELINE_STATE_GRAPHICS: - return _3D; - case ANV_HW_PIPELINE_STATE_COMPUTE: - case ANV_HW_PIPELINE_STATE_RAY_TRACING: - return GPGPU; - default: - unreachable("Unsupported pipeline"); - } -} - static void genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer, - enum anv_hw_pipeline_state pipeline) + uint32_t pipeline) { UNUSED const struct intel_device_info *devinfo = cmd_buffer->device->info; @@ -6179,10 +6164,10 @@ genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer, * The internal hardware docs recommend the same workaround for Gfx9 * hardware too. */ - if (pipeline == ANV_HW_PIPELINE_STATE_COMPUTE) + if (pipeline == GPGPU) anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), t); - if (pipeline == ANV_HW_PIPELINE_STATE_GRAPHICS) { + if (pipeline == _3D) { /* There is a mid-object preemption workaround which requires you to * re-emit MEDIA_VFE_STATE after switching from GPGPU to 3D. However, * even without preemption, we have issues with geometry flickering when @@ -6234,7 +6219,7 @@ genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer, anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), ps) { ps.MaskBits = GFX_VER >= 12 ? 0x13 : 3; ps.MediaSamplerDOPClockGateEnable = GFX_VER >= 12; - ps.PipelineSelection = anv_pipeline_selection_from_type(pipeline); + ps.PipelineSelection = pipeline; } #if GFX_VER == 9 @@ -6260,13 +6245,13 @@ genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer, void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer) { - genX(flush_pipeline_select)(cmd_buffer, ANV_HW_PIPELINE_STATE_GRAPHICS); + genX(flush_pipeline_select)(cmd_buffer, _3D); } void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer) { - genX(flush_pipeline_select)(cmd_buffer, ANV_HW_PIPELINE_STATE_COMPUTE); + genX(flush_pipeline_select)(cmd_buffer, GPGPU); } void diff --git a/src/intel/vulkan/genX_gpu_memcpy.c b/src/intel/vulkan/genX_gpu_memcpy.c index 6c84fbdce7b..b43eeeb6539 100644 --- a/src/intel/vulkan/genX_gpu_memcpy.c +++ b/src/intel/vulkan/genX_gpu_memcpy.c @@ -252,8 +252,7 @@ genX(emit_so_memcpy_init)(struct anv_memcpy_state *state, void genX(emit_so_memcpy_fini)(struct anv_memcpy_state *state) { - genX(emit_apply_pipe_flushes)(state->batch, state->device, - ANV_HW_PIPELINE_STATE_GRAPHICS, + genX(emit_apply_pipe_flushes)(state->batch, state->device, _3D, ANV_PIPE_END_OF_PIPE_SYNC_BIT); anv_batch_emit(state->batch, GENX(MI_BATCH_BUFFER_END), end); @@ -271,8 +270,7 @@ genX(emit_so_memcpy)(struct anv_memcpy_state *state, anv_gfx8_9_vb_cache_range_needs_workaround(&state->vb_bound, &state->vb_dirty, src, size)) { - genX(emit_apply_pipe_flushes)(state->batch, state->device, - ANV_HW_PIPELINE_STATE_GRAPHICS, + genX(emit_apply_pipe_flushes)(state->batch, state->device, _3D, ANV_PIPE_CS_STALL_BIT | ANV_PIPE_VF_CACHE_INVALIDATE_BIT); memset(&state->vb_dirty, 0, sizeof(state->vb_dirty));