From 765fb3e1589c4807c2c2cfcf1e4454f726989df5 Mon Sep 17 00:00:00 2001 From: Jianxun Zhang Date: Mon, 14 Aug 2023 11:58:27 -0700 Subject: [PATCH] isl: Add a heading 4KB to MCS surface (xe2) Signed-off-by: Jianxun Zhang Reviewed-by: Nanley Chery Part-of: --- src/intel/isl/isl.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 3222f4baba3..4ed7a9c40cf 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -2607,6 +2607,20 @@ isl_calc_size(const struct isl_device *dev, size_B = (uint64_t) total_h_tl * tile_info->phys_extent_B.height * row_pitch_B; + + /* Bspec 57340 (r59562): + * + * When allocating memory, MCS buffer size is extended by 4KB over + * its original calculated size. First 4KB page of the MCS is + * reserved for internal HW usage. + * + * Allocate an extra 4KB page reserved for hardware at the beginning of + * MCS buffer on Xe2. The start address of MCS is the head of the 4KB + * page. Any manipulation on the content of MCS should start after 4KB + * from the start address. + */ + if (dev->info->ver >= 20 && info->usage & ISL_SURF_USAGE_MCS_BIT) + size_B += 4096; } /* If for some reason we can't support the appropriate tiling format and