diff --git a/src/gallium/drivers/radeonsi/si_barrier.c b/src/gallium/drivers/radeonsi/si_barrier.c
index 08f5d1d7566..5c8cddbfd51 100644
--- a/src/gallium/drivers/radeonsi/si_barrier.c
+++ b/src/gallium/drivers/radeonsi/si_barrier.c
@@ -639,16 +639,7 @@ void si_barrier_after_simple_buffer_op(struct si_context *sctx, unsigned flags,
 
 static void si_texture_barrier(struct pipe_context *ctx, unsigned flags)
 {
-   struct si_context *sctx = (struct si_context *)ctx;
-
-   si_fb_barrier_after_rendering(sctx);
-
-   /* Multisample surfaces are flushed in si_decompress_textures. */
-   if (sctx->framebuffer.uncompressed_cb_mask) {
-      si_make_CB_shader_coherent(sctx, sctx->framebuffer.nr_samples,
-                                 sctx->framebuffer.CB_has_shader_readable_metadata,
-                                 sctx->framebuffer.all_DCC_pipe_aligned);
-   }
+   si_fb_barrier_after_rendering((struct si_context *)ctx, SI_FB_BARRIER_SYNC_CB);
 }
 
 /* This enforces coherency between shader stores and any past and future access. */
@@ -735,9 +726,12 @@ static void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct
    }
 }
 
-void si_fb_barrier_after_rendering(struct si_context *sctx)
+void si_fb_barrier_after_rendering(struct si_context *sctx, unsigned flags)
 {
    if (sctx->gfx_level < GFX12 && !sctx->decompression_enabled) {
+      /* Setting dirty_level_mask should ignore SI_FB_BARRIER_SYNC_* because it triggers
+       * decompression, which is not syncing.
+       */
       if (sctx->framebuffer.state.zsbuf) {
          struct pipe_surface *surf = sctx->framebuffer.state.zsbuf;
          struct si_texture *tex = (struct si_texture *)surf->texture;
@@ -762,6 +756,18 @@ void si_fb_barrier_after_rendering(struct si_context *sctx)
          }
       }
    }
+
+   if (flags & SI_FB_BARRIER_SYNC_CB) {
+      /* Compressed images (MSAA with FMASK) are flushed on demand in si_decompress_textures.
+       *
+       * Synchronize CB only if there is actually a bound color buffer.
+       */
+      if (sctx->framebuffer.uncompressed_cb_mask) {
+         si_make_CB_shader_coherent(sctx, sctx->framebuffer.nr_samples,
+                                    sctx->framebuffer.CB_has_shader_readable_metadata,
+                                    sctx->framebuffer.all_DCC_pipe_aligned);
+      }
+   }
 }
 
 void si_init_barrier_functions(struct si_context *sctx)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 3b9527017cb..b8e3f78074b 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -933,7 +933,7 @@ void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *t
        */
       if (sctx->framebuffer.state.zsbuf && sctx->framebuffer.state.zsbuf->u.tex.level == level &&
           sctx->framebuffer.state.zsbuf->texture == tex)
-         si_fb_barrier_after_rendering(sctx);
+         si_fb_barrier_after_rendering(sctx, 0);
 
       si_decompress_depth(sctx, stex, planes, level, level, first_layer, last_layer);
    } else if (stex->surface.fmask_size || stex->cmask_buffer ||
@@ -946,7 +946,7 @@ void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *t
          if (sctx->framebuffer.state.cbufs[i] &&
              sctx->framebuffer.state.cbufs[i]->u.tex.level == level &&
              sctx->framebuffer.state.cbufs[i]->texture == tex) {
-            si_fb_barrier_after_rendering(sctx);
+            si_fb_barrier_after_rendering(sctx, SI_FB_BARRIER_SYNC_CB);
             break;
          }
       }
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 33c1cb4e20c..b81784d0ae0 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -1193,14 +1193,10 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
                         (sctx->force_shader_coherency.with_db ||
                          si_check_needs_implicit_sync(sctx, RADEON_USAGE_DB_NEEDS_IMPLICIT_SYNC));
 
-         si_fb_barrier_after_rendering(sctx);
+         si_fb_barrier_after_rendering(sctx, sync_cb ? SI_FB_BARRIER_SYNC_CB : 0);
 
-         if (sync_cb) {
+         if (sync_cb)
             sctx->num_draw_calls_sh_coherent.with_cb = sctx->num_draw_calls;
-            si_make_CB_shader_coherent(sctx, 0,
-                                       sctx->framebuffer.CB_has_shader_readable_metadata,
-                                       sctx->framebuffer.all_DCC_pipe_aligned);
-         }
 
          if (sync_db) {
             sctx->num_draw_calls_sh_coherent.with_db = sctx->num_draw_calls;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 4dbddeb9d09..b5feae5d739 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1364,6 +1364,8 @@ struct si_context {
 };
 
 /* si_barrier.c */
+#define SI_FB_BARRIER_SYNC_CB      BITFIELD_BIT(0)
+
 void si_barrier_before_internal_op(struct si_context *sctx, unsigned flags,
                                    unsigned num_buffers,
                                    const struct pipe_shader_buffer *buffers,
@@ -1380,7 +1382,7 @@ void si_barrier_before_simple_buffer_op(struct si_context *sctx, unsigned flags,
                                         struct pipe_resource *dst, struct pipe_resource *src);
 void si_barrier_after_simple_buffer_op(struct si_context *sctx, unsigned flags,
                                        struct pipe_resource *dst, struct pipe_resource *src);
-void si_fb_barrier_after_rendering(struct si_context *sctx);
+void si_fb_barrier_after_rendering(struct si_context *sctx, unsigned flags);
 void si_init_barrier_functions(struct si_context *sctx);
 
 /* si_blit.c */
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 03f27d5454c..eabcc536009 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2547,7 +2547,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
       return;
    }
 
-   si_fb_barrier_after_rendering(sctx);
+   si_fb_barrier_after_rendering(sctx, SI_FB_BARRIER_SYNC_CB);
 
    /* Disable DCC if the formats are incompatible. */
    if (sctx->gfx_level >= GFX8 && sctx->gfx_level < GFX11) {
@@ -2569,19 +2569,6 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
       }
    }
 
-   /* When MSAA is enabled, CB and L2 caches are flushed on demand
-    * (after FMASK decompression). Shader write -> FB read transitions
-    * cannot happen for MSAA textures, because MSAA shader images are
-    * not supported.
-    *
-    * Only flush and wait for CB if there is actually a bound color buffer.
-    */
-   if (sctx->framebuffer.uncompressed_cb_mask) {
-      si_make_CB_shader_coherent(sctx, sctx->framebuffer.nr_samples,
-                                 sctx->framebuffer.CB_has_shader_readable_metadata,
-                                 sctx->framebuffer.all_DCC_pipe_aligned);
-   }
-
    /* Wait for CS because: shader write -> FB read
     * Wait for PS because: texture -> render (eg: glBlitFramebuffer(with src=dst) then glDraw*)
     */