diff --git a/src/freedreno/vulkan/tu_knl.cc b/src/freedreno/vulkan/tu_knl.cc index 365b94aa394..61eb09bbe0e 100644 --- a/src/freedreno/vulkan/tu_knl.cc +++ b/src/freedreno/vulkan/tu_knl.cc @@ -221,6 +221,22 @@ tu_physical_device_try_create(struct vk_instance *vk_instance, assert(device); +#ifdef _SC_LEVEL1_DCACHE_LINESIZE + if (DETECT_ARCH_AARCH64 || DETECT_ARCH_X86 || DETECT_ARCH_X86_64) { + long l1_dcache; +#if defined(ANDROID) && DETECT_ARCH_AARCH64 + /* Bionic does not implement _SC_LEVEL1_DCACHE_LINESIZE properly: */ + uint64_t ctr_el0; + asm("mrs\t%x0, ctr_el0" : "=r"(ctr_el0)); + l1_dcache = 4 << ((ctr_el0 >> 16) & 0xf); +#else + l1_dcache = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); +#endif + device->has_cached_non_coherent_memory = l1_dcache > 0; + device->level1_dcache_size = l1_dcache; + } +#endif + if (instance->vk.enabled_extensions.KHR_display) { master_fd = open(primary_path, O_RDWR | O_CLOEXEC); } diff --git a/src/freedreno/vulkan/tu_knl_drm_msm.cc b/src/freedreno/vulkan/tu_knl_drm_msm.cc index 02542cd2b77..2d7f83808ea 100644 --- a/src/freedreno/vulkan/tu_knl_drm_msm.cc +++ b/src/freedreno/vulkan/tu_knl_drm_msm.cc @@ -1098,13 +1098,6 @@ tu_knl_drm_msm_load(struct tu_instance *instance, device->has_cached_coherent_memory = (device->msm_minor_version >= 8) && tu_drm_is_memory_type_supported(fd, MSM_BO_CACHED_COHERENT); -#ifdef _SC_LEVEL1_DCACHE_LINESIZE - if (DETECT_ARCH_AARCH64 || DETECT_ARCH_X86 || DETECT_ARCH_X86_64) { - long l1_dcache = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); - device->has_cached_non_coherent_memory = l1_dcache > 0; - device->level1_dcache_size = l1_dcache; - } -#endif device->submitqueue_priority_count = tu_drm_get_priorities(device); diff --git a/src/freedreno/vulkan/tu_knl_drm_virtio.cc b/src/freedreno/vulkan/tu_knl_drm_virtio.cc index bc128afee68..b4a4ee659f9 100644 --- a/src/freedreno/vulkan/tu_knl_drm_virtio.cc +++ b/src/freedreno/vulkan/tu_knl_drm_virtio.cc @@ -1579,13 +1579,6 @@ tu_knl_drm_virtio_load(struct tu_instance *instance, device->gmem_size = debug_get_num_option("TU_GMEM", device->gmem_size); device->has_cached_coherent_memory = caps.u.msm.has_cached_coherent; -#ifdef _SC_LEVEL1_DCACHE_LINESIZE - if (DETECT_ARCH_AARCH64 || DETECT_ARCH_X86 || DETECT_ARCH_X86_64) { - long l1_dcache = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); - device->has_cached_non_coherent_memory = l1_dcache > 0; - device->level1_dcache_size = l1_dcache; - } -#endif device->submitqueue_priority_count = caps.u.msm.priorities;