diff --git a/src/compiler/nir/nir_lower_double_ops.c b/src/compiler/nir/nir_lower_double_ops.c index 695927f1695..69ceaa71c7a 100644 --- a/src/compiler/nir/nir_lower_double_ops.c +++ b/src/compiler/nir/nir_lower_double_ops.c @@ -545,14 +545,14 @@ lower_doubles_instr_to_soft(nir_builder *b, nir_alu_instr *instr, switch (instr->op) { case nir_op_f2i64: if (instr->src[0].src.ssa->bit_size != 64) - return false; + return NULL; name = "__fp64_to_int64"; mangled_name = "__fp64_to_int64(u641;"; return_type = glsl_int64_t_type(); break; case nir_op_f2u64: if (instr->src[0].src.ssa->bit_size != 64) - return false; + return NULL; name = "__fp64_to_uint64"; mangled_name = "__fp64_to_uint64(u641;"; break; @@ -675,7 +675,7 @@ lower_doubles_instr_to_soft(nir_builder *b, nir_alu_instr *instr, return_type = glsl_bool_type(); break; default: - return false; + return NULL; } assert(softfp64 != NULL); diff --git a/src/compiler/nir/nir_opt_intrinsics.c b/src/compiler/nir/nir_opt_intrinsics.c index 11f9edc6105..a277aaf5a29 100644 --- a/src/compiler/nir/nir_opt_intrinsics.c +++ b/src/compiler/nir/nir_opt_intrinsics.c @@ -64,7 +64,7 @@ try_opt_bcsel_of_shuffle(nir_builder *b, nir_alu_instr *alu, * now and subgroup ops in the presence of discard aren't common. */ if (block_has_discard) - return false; + return NULL; if (!nir_alu_src_is_trivial_ssa(alu, 0)) return NULL; diff --git a/src/compiler/nir/nir_opt_varyings.c b/src/compiler/nir/nir_opt_varyings.c index fc77076751c..bff93bcf1a5 100644 --- a/src/compiler/nir/nir_opt_varyings.c +++ b/src/compiler/nir/nir_opt_varyings.c @@ -2814,12 +2814,12 @@ check_tes_input_load_get_single_use_alu(nir_intrinsic_instr *load, /* Check the vertex index. Each vertex can be loaded only once. */ if (!nir_src_is_const(load->src[0])) - return false; + return NULL; *vertex_index = nir_src_as_uint(load->src[0]); if (*vertex_index >= max_vertices || *vertices_used & BITFIELD_BIT(*vertex_index)) - return false; + return NULL; *vertices_used |= BITFIELD_BIT(*vertex_index);