From 74a884f73c3df76a77d4cd26639175bcbe40e398 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sun, 23 Oct 2022 20:45:25 -0400 Subject: [PATCH] agx: Implement nir_op_unpack_64_2x32_split_{x,y} Used in the umul_extended lowering. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 31e59ae355e..83fe5b056c5 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -1020,6 +1020,19 @@ agx_emit_alu(agx_builder *b, nir_alu_instr *instr) return agx_convert_to(b, dst, agx_immediate(mode), s0, AGX_ROUND_RTE); } + /* Split a 64-bit word into 32-bit parts. Do not use null destinations to + * let us CSE (and coalesce) the splits when both x and y are split. + */ + case nir_op_unpack_64_2x32_split_x: + case nir_op_unpack_64_2x32_split_y: + { + agx_instr *split = agx_split(b, 2, s0); + unsigned comp = instr->op == nir_op_unpack_64_2x32_split_y ? 1 : 0; + split->dest[comp] = dst; + split->dest[1 - comp] = agx_temp(b->shader, dst.size); + return split; + } + case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: