From 745ad42bb062ed49e3669b562fdb0083ef58af74 Mon Sep 17 00:00:00 2001 From: Karmjit Mahil Date: Fri, 26 Jul 2024 09:53:27 +0200 Subject: [PATCH] freedreno: Enable the A735 Signed-off-by: Karmjit Mahil Part-of: --- src/freedreno/common/freedreno_devices.py | 89 +++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py index 79c69e42c66..1dbe7fc7b7e 100644 --- a/src/freedreno/common/freedreno_devices.py +++ b/src/freedreno/common/freedreno_devices.py @@ -834,6 +834,15 @@ a7xx_730 = A7XXProps( enable_tp_ubwc_flag_hint = True, ) +a7xx_735 = A7XXProps( + stsc_duplication_quirk = True, + has_event_write_sample_count = True, + ubwc_unorm_snorm_int_compatible = True, + supports_ibo_ubwc = True, + fs_must_have_non_zero_constlen_quirk = True, + enable_tp_ubwc_flag_hint = True, + ) + a7xx_740 = A7XXProps( stsc_duplication_quirk = True, has_event_write_sample_count = True, @@ -970,6 +979,86 @@ add_gpus([ raw_magic_regs = a730_raw_magic_regs, )) +add_gpus([ + GPUId(chip_id=0x43030B00, name="FD735") + ], A6xxGPUInfo( + CHIP.A7XX, + [a7xx_base, a7xx_735], + num_ccu = 3, + tile_align_w = 96, + tile_align_h = 32, + num_vsc_pipes = 32, + cs_shared_mem_size = 32 * 1024, + wave_granularity = 2, + fibers_per_sp = 128 * 2 * 16, + magic_regs = dict( + TPL1_DBG_ECO_CNTL = 0x11100000, + GRAS_DBG_ECO_CNTL = 0x00004800, + SP_CHICKEN_BITS = 0x10001400, + UCHE_CLIENT_PF = 0x00000084, + PC_MODE_CNTL = 0x0000001f, + SP_DBG_ECO_CNTL = 0x10000000, + RB_DBG_ECO_CNTL = 0x00000001, + RB_DBG_ECO_CNTL_blit = 0x00000001, # is it even needed? + RB_UNKNOWN_8E01 = 0x0, + VPC_DBG_ECO_CNTL = 0x02000000, + UCHE_UNKNOWN_0E12 = 0x00000000, + + RB_UNKNOWN_8E06 = 0x02080000, + ), + raw_magic_regs = [ + [A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00000000], + [A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00040724], + + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE08, 0x00000400], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE09, 0x00430800], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE0A, 0x00000000], + [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000], + [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E11, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6C, 0x00000000], + [A6XXRegs.REG_A6XX_PC_DBG_ECO_CNTL, 0x00100000], + [A6XXRegs.REG_A7XX_PC_UNKNOWN_9E24, 0x01585600], + [A6XXRegs.REG_A7XX_VFD_UNKNOWN_A600, 0x00008000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE06, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6A, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6B, 0x00000080], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE73, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB02, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB01, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB22, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_B310, 0x00000000], + + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8120, 0x09510840], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8121, 0x00000a62], + + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8009, 0x00000000], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_800A, 0x00000000], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_800B, 0x00000000], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_800C, 0x00000000], + + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE2, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE2+1, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE4, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE4+1, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE6, 0x00000000], + [A6XXRegs.REG_A7XX_SP_UNKNOWN_0CE6+1, 0x00000000], + + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_80A7, 0x00000000], + + [A6XXRegs.REG_A7XX_HLSQ_UNKNOWN_A9AC, 0x00000000], + [A6XXRegs.REG_A7XX_RB_UNKNOWN_8E79, 0x00000000], + [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899, 0x00000000], + [A6XXRegs.REG_A7XX_RB_UNKNOWN_88F5, 0x00000000], + [A6XXRegs.REG_A7XX_RB_UNKNOWN_8C34, 0x00000000], + + # Shading rate group + [A6XXRegs.REG_A6XX_RB_UNKNOWN_88F4, 0x00000000], + [A6XXRegs.REG_A7XX_HLSQ_UNKNOWN_A9AD, 0x00000000], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8008, 0x00000000], + [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_80F4, 0x00000000], + ], + )) + add_gpus([ GPUId(740), # Deprecated, used for dev kernels. GPUId(chip_id=0x43050a01, name="FD740"), # KGSL, no speedbin data