From 71c4943c3752e6865b4e887dc9e4c14897e211ba Mon Sep 17 00:00:00 2001 From: Mary Guillemard Date: Sun, 5 Oct 2025 23:40:28 +0200 Subject: [PATCH] compiler: rename vs.tes_agx bit to vs.tes_poly Preparing to move AGX's GS/TESS lowering code. Signed-off-by: Mary Guillemard Reviewed-by: Alyssa Rosenzweig Part-of: --- src/asahi/lib/agx_nir_lower_gs.c | 2 +- src/asahi/lib/agx_nir_lower_tess.c | 2 +- src/compiler/shader_info.h | 2 +- src/gallium/drivers/asahi/agx_nir_lower_sysvals.c | 2 +- src/gallium/drivers/asahi/agx_state.c | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/asahi/lib/agx_nir_lower_gs.c b/src/asahi/lib/agx_nir_lower_gs.c index 83c16aed688..81ec57d6f08 100644 --- a/src/asahi/lib/agx_nir_lower_gs.c +++ b/src/asahi/lib/agx_nir_lower_gs.c @@ -1425,7 +1425,7 @@ lower_vs_before_gs(nir_builder *b, nir_intrinsic_instr *intr, void *data) } if (b->shader->info.stage == MESA_SHADER_VERTEX && - !b->shader->info.vs.tes_agx) { + !b->shader->info.vs.tes_poly) { primitive_id = nir_load_vertex_id_zero_base(b); instance_id = nir_load_instance_id(b); } else { diff --git a/src/asahi/lib/agx_nir_lower_tess.c b/src/asahi/lib/agx_nir_lower_tess.c index ba01e9662d4..d765d10dda1 100644 --- a/src/asahi/lib/agx_nir_lower_tess.c +++ b/src/asahi/lib/agx_nir_lower_tess.c @@ -255,7 +255,7 @@ agx_nir_lower_tes(nir_shader *tes, bool to_hw_vs) */ tes->info.stage = MESA_SHADER_VERTEX; memset(&tes->info.vs, 0, sizeof(tes->info.vs)); - tes->info.vs.tes_agx = true; + tes->info.vs.tes_poly = true; } else { /* If we're running as a compute shader, we need to load from the index * buffer manually. Fortunately, this doesn't require a shader key: diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h index d2b273fcb58..db7fc2fc21e 100644 --- a/src/compiler/shader_info.h +++ b/src/compiler/shader_info.h @@ -353,7 +353,7 @@ typedef struct shader_info { uint8_t blit_sgprs_amd:4; /* Software TES executing as HW VS */ - bool tes_agx:1; + bool tes_poly:1; /* True if the shader writes position in window space coordinates pre-transform */ bool window_space_position:1; diff --git a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c index 677e19f0588..5061ecde35d 100644 --- a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c +++ b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c @@ -96,7 +96,7 @@ static unsigned stage_table(nir_builder *b) { mesa_shader_stage stage = b->shader->info.stage; - if (stage == MESA_SHADER_VERTEX && b->shader->info.vs.tes_agx) + if (stage == MESA_SHADER_VERTEX && b->shader->info.vs.tes_poly) stage = MESA_SHADER_TESS_EVAL; assert(stage < MESA_SHADER_STAGES); diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index bec5b7a8172..6ad71bc1231 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -1563,7 +1563,7 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx, if (nir->info.stage == MESA_SHADER_VERTEX) { struct asahi_vs_shader_key *key = &key_->vs; - if (nir->info.vs.tes_agx) { + if (nir->info.vs.tes_poly) { NIR_PASS(_, nir, agx_nir_lower_tes, key->hw); } else { NIR_PASS(_, nir, agx_nir_gather_vs_inputs, attrib_components_read); @@ -1865,7 +1865,7 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so, if (nir->info.stage == MESA_SHADER_TESS_EVAL) { nir->info.stage = MESA_SHADER_VERTEX; - nir->info.vs.tes_agx = true; + nir->info.vs.tes_poly = true; } blob_init(&so->serialized_nir);