diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index ff191276d37..3ca1ed889a4 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -2585,12 +2585,12 @@ zink_binding(gl_shader_stage stage, VkDescriptorType type, int index, bool compa return (stage * PIPE_MAX_SAMPLERS) + index; case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: - return stage + (compact_descriptors * (ZINK_SHADER_COUNT * 2)); + return stage + (compact_descriptors * (ZINK_GFX_SHADER_COUNT * 2)); case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: assert(index < ZINK_MAX_SHADER_IMAGES); - return (stage * ZINK_MAX_SHADER_IMAGES) + index + (compact_descriptors * (ZINK_SHADER_COUNT * PIPE_MAX_SAMPLERS)); + return (stage * ZINK_MAX_SHADER_IMAGES) + index + (compact_descriptors * (ZINK_GFX_SHADER_COUNT * PIPE_MAX_SAMPLERS)); default: unreachable("unexpected type"); @@ -3167,7 +3167,7 @@ zink_shader_free(struct zink_context *ctx, struct zink_shader *shader) } else { struct zink_gfx_program *prog = (void*)entry->key; enum pipe_shader_type pstage = pipe_shader_type_from_mesa(shader->nir->info.stage); - assert(pstage < ZINK_SHADER_COUNT); + assert(pstage < ZINK_GFX_SHADER_COUNT); if (!prog->base.removed && (shader->nir->info.stage != MESA_SHADER_TESS_CTRL || !shader->is_generated)) { unsigned stages_present = prog->stages_present; if (prog->shaders[PIPE_SHADER_TESS_CTRL] && prog->shaders[PIPE_SHADER_TESS_CTRL]->is_generated) diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index b993471bdd4..92fd54d24a3 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -1489,7 +1489,7 @@ update_binds_for_samplerviews(struct zink_context *ctx, struct zink_resource *re } } } else { - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) { + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) { u_foreach_bit(slot, res->sampler_binds[i]) { if (ctx->di.textures[i][slot].imageLayout != layout) { update_descriptor_state_sampler(ctx, i, slot, res); @@ -2659,7 +2659,7 @@ zink_update_descriptor_refs(struct zink_context *ctx, bool compute) if (ctx->curr_compute) zink_batch_reference_program(batch, &ctx->curr_compute->base); } else { - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) update_resource_refs_for_stage(ctx, i); unsigned vertex_buffers_enabled_mask = ctx->gfx_pipeline_state.vertex_buffers_enabled_mask; unsigned last_vbo = util_last_bit(vertex_buffers_enabled_mask); diff --git a/src/gallium/drivers/zink/zink_descriptors.c b/src/gallium/drivers/zink/zink_descriptors.c index 3da4f9b419a..65612a48e17 100644 --- a/src/gallium/drivers/zink/zink_descriptors.c +++ b/src/gallium/drivers/zink/zink_descriptors.c @@ -230,14 +230,14 @@ create_gfx_layout(struct zink_context *ctx, struct zink_descriptor_layout_key ** VkDescriptorSetLayoutBinding bindings[PIPE_SHADER_TYPES]; enum zink_descriptor_type dsl_type; VkDescriptorType vktype = get_push_types(screen, &dsl_type); - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) init_push_binding(&bindings[i], i, vktype); if (fbfetch) { - bindings[ZINK_SHADER_COUNT].binding = ZINK_FBFETCH_BINDING; - bindings[ZINK_SHADER_COUNT].descriptorType = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT; - bindings[ZINK_SHADER_COUNT].descriptorCount = 1; - bindings[ZINK_SHADER_COUNT].stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT; - bindings[ZINK_SHADER_COUNT].pImmutableSamplers = NULL; + bindings[ZINK_GFX_SHADER_COUNT].binding = ZINK_FBFETCH_BINDING; + bindings[ZINK_GFX_SHADER_COUNT].descriptorType = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT; + bindings[ZINK_GFX_SHADER_COUNT].descriptorCount = 1; + bindings[ZINK_GFX_SHADER_COUNT].stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT; + bindings[ZINK_GFX_SHADER_COUNT].pImmutableSamplers = NULL; } return create_layout(ctx, dsl_type, bindings, fbfetch ? ARRAY_SIZE(bindings) : ARRAY_SIZE(bindings) - 1, layout_key); } @@ -408,7 +408,7 @@ zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg) unsigned entry_idx[ZINK_DESCRIPTOR_TYPES] = {0}; - unsigned num_shaders = pg->is_compute ? 1 : ZINK_SHADER_COUNT; + unsigned num_shaders = pg->is_compute ? 1 : ZINK_GFX_SHADER_COUNT; bool have_push = screen->info.have_KHR_push_descriptor; for (int i = 0; i < num_shaders; i++) { struct zink_shader *shader = stages[i]; @@ -527,7 +527,7 @@ zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg) /* number of descriptors in template */ unsigned wd_count[ZINK_DESCRIPTOR_TYPES + 1]; if (push_count) - wd_count[0] = pg->is_compute ? 1 : (ZINK_SHADER_COUNT + !!ctx->dd.has_fbfetch); + wd_count[0] = pg->is_compute ? 1 : (ZINK_GFX_SHADER_COUNT + !!ctx->dd.has_fbfetch); for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) wd_count[i + 1] = pg->dd.pool_key[i] ? pg->dd.pool_key[i]->layout->num_bindings : 0; @@ -630,7 +630,7 @@ create_push_pool(struct zink_screen *screen, struct zink_batch_state *bs, bool i if (is_compute) sizes[0].descriptorCount = MAX_LAZY_DESCRIPTORS; else { - sizes[0].descriptorCount = ZINK_SHADER_COUNT * MAX_LAZY_DESCRIPTORS; + sizes[0].descriptorCount = ZINK_GFX_SHADER_COUNT * MAX_LAZY_DESCRIPTORS; sizes[1].type = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT; sizes[1].descriptorCount = MAX_LAZY_DESCRIPTORS; } @@ -926,12 +926,12 @@ init_push_template_entry(VkDescriptorUpdateTemplateEntry *entry, unsigned i) bool zink_descriptors_init(struct zink_context *ctx) { - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) { + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) { VkDescriptorUpdateTemplateEntry *entry = &ctx->dd.push_entries[i]; init_push_template_entry(entry, i); } init_push_template_entry(&ctx->dd.compute_push_entry, PIPE_SHADER_COMPUTE); - VkDescriptorUpdateTemplateEntry *entry = &ctx->dd.push_entries[ZINK_SHADER_COUNT]; //fbfetch + VkDescriptorUpdateTemplateEntry *entry = &ctx->dd.push_entries[ZINK_GFX_SHADER_COUNT]; //fbfetch entry->dstBinding = ZINK_FBFETCH_BINDING; entry->descriptorCount = 1; entry->descriptorType = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT; diff --git a/src/gallium/drivers/zink/zink_draw.cpp b/src/gallium/drivers/zink/zink_draw.cpp index 58e7902187c..293e78ce3ec 100644 --- a/src/gallium/drivers/zink/zink_draw.cpp +++ b/src/gallium/drivers/zink/zink_draw.cpp @@ -1131,7 +1131,7 @@ equals_gfx_program(const void *a, const void *b) !memcmp(a, b, sizeof(void*) * 2); /* all stages */ - return !memcmp(a, b, sizeof(void*) * ZINK_SHADER_COUNT); + return !memcmp(a, b, sizeof(void*) * ZINK_GFX_SHADER_COUNT); } extern "C" diff --git a/src/gallium/drivers/zink/zink_pipeline.c b/src/gallium/drivers/zink/zink_pipeline.c index a6b6b8e6a77..69619c11b2e 100644 --- a/src/gallium/drivers/zink/zink_pipeline.c +++ b/src/gallium/drivers/zink/zink_pipeline.c @@ -355,9 +355,9 @@ zink_create_gfx_pipeline(struct zink_screen *screen, tdci.domainOrigin = VK_TESSELLATION_DOMAIN_ORIGIN_LOWER_LEFT; } - VkPipelineShaderStageCreateInfo shader_stages[ZINK_SHADER_COUNT]; + VkPipelineShaderStageCreateInfo shader_stages[ZINK_GFX_SHADER_COUNT]; uint32_t num_stages = 0; - for (int i = 0; i < ZINK_SHADER_COUNT; ++i) { + for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) { if (!prog->modules[i]) continue; @@ -763,9 +763,9 @@ zink_create_gfx_pipeline_library(struct zink_screen *screen, struct zink_gfx_pro tdci.domainOrigin = VK_TESSELLATION_DOMAIN_ORIGIN_LOWER_LEFT; } - VkPipelineShaderStageCreateInfo shader_stages[ZINK_SHADER_COUNT]; + VkPipelineShaderStageCreateInfo shader_stages[ZINK_GFX_SHADER_COUNT]; uint32_t num_stages = 0; - for (int i = 0; i < ZINK_SHADER_COUNT; ++i) { + for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) { if (!prog->modules[i]) continue; diff --git a/src/gallium/drivers/zink/zink_program.c b/src/gallium/drivers/zink/zink_program.c index 03a32ce339c..8aef76a90f7 100644 --- a/src/gallium/drivers/zink/zink_program.c +++ b/src/gallium/drivers/zink/zink_program.c @@ -466,17 +466,17 @@ zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg, } static void -assign_io(struct zink_gfx_program *prog, struct zink_shader *stages[ZINK_SHADER_COUNT]) +assign_io(struct zink_gfx_program *prog, struct zink_shader *stages[ZINK_GFX_SHADER_COUNT]) { struct zink_shader *shaders[PIPE_SHADER_TYPES]; /* build array in pipeline order */ - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) shaders[tgsi_processor_to_shader_stage(i)] = stages[i]; for (unsigned i = 0; i < MESA_SHADER_FRAGMENT;) { nir_shader *producer = shaders[i]->nir; - for (unsigned j = i + 1; j < ZINK_SHADER_COUNT; i++, j++) { + for (unsigned j = i + 1; j < ZINK_GFX_SHADER_COUNT; i++, j++) { struct zink_shader *consumer = shaders[j]; if (!consumer) continue; @@ -504,7 +504,7 @@ zink_create_gfx_program(struct zink_context *ctx, pipe_reference_init(&prog->base.reference, 1); util_queue_fence_init(&prog->base.cache_fence); - for (int i = 0; i < ZINK_SHADER_COUNT; ++i) { + for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) { list_inithead(&prog->shader_cache[i][0][0]); list_inithead(&prog->shader_cache[i][0][1]); list_inithead(&prog->shader_cache[i][1][0]); @@ -543,7 +543,7 @@ zink_create_gfx_program(struct zink_context *ctx, struct mesa_sha1 sctx; _mesa_sha1_init(&sctx); - for (int i = 0; i < ZINK_SHADER_COUNT; ++i) { + for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) { if (prog->shaders[i]) { simple_mtx_lock(&prog->shaders[i]->lock); _mesa_set_add(prog->shaders[i]->programs, prog); @@ -731,7 +731,7 @@ zink_program_num_bindings_typed(const struct zink_program *pg, enum zink_descrip return get_num_bindings(comp->shader, type); } struct zink_gfx_program *prog = (void*)pg; - for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) { + for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) { if (prog->shaders[i]) num_bindings += get_num_bindings(prog->shaders[i], type); } @@ -756,7 +756,7 @@ zink_destroy_gfx_program(struct zink_context *ctx, if (prog->base.layout) VKSCR(DestroyPipelineLayout)(screen->dev, prog->base.layout, NULL); - for (int i = 0; i < ZINK_SHADER_COUNT; ++i) { + for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) { if (prog->shaders[i]) { _mesa_set_remove_key(prog->shaders[i]->programs, prog); prog->shaders[i] = NULL; diff --git a/src/gallium/drivers/zink/zink_types.h b/src/gallium/drivers/zink/zink_types.h index c650077a85f..5b06eee95b4 100644 --- a/src/gallium/drivers/zink/zink_types.h +++ b/src/gallium/drivers/zink/zink_types.h @@ -61,7 +61,7 @@ #define ZINK_FBFETCH_BINDING 6 //COMPUTE+1 -#define ZINK_SHADER_COUNT (PIPE_SHADER_TYPES - 1) +#define ZINK_GFX_SHADER_COUNT (PIPE_SHADER_TYPES - 1) #define ZINK_DEFAULT_MAX_DESCS 5000 #define MAX_LAZY_DESCRIPTORS (ZINK_DEFAULT_MAX_DESCS / 10) @@ -70,7 +70,7 @@ #define ZINK_MAX_BINDLESS_HANDLES 1024 #define ZINK_MAX_DESCRIPTOR_SETS 6 -#define ZINK_MAX_DESCRIPTORS_PER_TYPE (32 * ZINK_SHADER_COUNT) +#define ZINK_MAX_DESCRIPTORS_PER_TYPE (32 * ZINK_GFX_SHADER_COUNT) #define NUM_SLAB_ALLOCATORS 3 #define MIN_SLAB_ORDER 8 @@ -732,7 +732,7 @@ struct zink_program { struct zink_gfx_library_key { uint32_t hw_rast_state; - VkShaderModule modules[ZINK_SHADER_COUNT]; + VkShaderModule modules[ZINK_GFX_SHADER_COUNT]; VkPipeline pipeline; }; @@ -766,16 +766,16 @@ struct zink_gfx_program { struct zink_program base; uint32_t stages_present; //mask of stages present in this program - struct nir_shader *nir[ZINK_SHADER_COUNT]; + struct nir_shader *nir[ZINK_GFX_SHADER_COUNT]; - struct zink_shader_module *modules[ZINK_SHADER_COUNT]; // compute stage doesn't belong here + struct zink_shader_module *modules[ZINK_GFX_SHADER_COUNT]; // compute stage doesn't belong here struct zink_shader *last_vertex_stage; - struct list_head shader_cache[ZINK_SHADER_COUNT][2][2]; //normal, nonseamless cubes, inline uniforms - unsigned inlined_variant_count[ZINK_SHADER_COUNT]; + struct list_head shader_cache[ZINK_GFX_SHADER_COUNT][2][2]; //normal, nonseamless cubes, inline uniforms + unsigned inlined_variant_count[ZINK_GFX_SHADER_COUNT]; - struct zink_shader *shaders[ZINK_SHADER_COUNT]; + struct zink_shader *shaders[ZINK_GFX_SHADER_COUNT]; struct hash_table pipelines[11]; // number of draw modes we support uint32_t default_variant_hash; uint32_t last_variant_hash; @@ -1341,7 +1341,7 @@ struct zink_context { struct set desc_pool_keys[ZINK_DESCRIPTOR_TYPES]; bool pipeline_changed[2]; //gfx, compute - struct zink_shader *gfx_stages[ZINK_SHADER_COUNT]; + struct zink_shader *gfx_stages[ZINK_GFX_SHADER_COUNT]; struct zink_shader *last_vertex_stage; bool shader_reads_drawid; bool shader_reads_basevertex; @@ -1362,7 +1362,7 @@ struct zink_context { struct hash_table compute_program_cache; struct zink_compute_program *curr_compute; - unsigned shader_stages : ZINK_SHADER_COUNT; /* mask of bound gfx shader stages */ + unsigned shader_stages : ZINK_GFX_SHADER_COUNT; /* mask of bound gfx shader stages */ unsigned dirty_shader_stages : 6; /* mask of changed shader stages */ bool last_vertex_stage_dirty;