i965: Move the back-end compiler to src/intel/compiler
Mostly a dummy git mv with a couple of noticable parts: - With the earlier header cleanups, nothing in src/intel depends files from src/mesa/drivers/dri/i965/ - Both Autoconf and Android builds are addressed. Thanks to Mauro and Tapani for the fixups in the latter - brw_util.[ch] is not really compiler specific, so it's moved to i965. v2: - move brw_eu_defines.h instead of brw_defines.h - remove no-longer applicable includes - add missing vulkan/ prefix in the Android build (thanks Tapani) v3: - don't list brw_defines.h in src/intel/Makefile.sources (Jason) - rebase on top of the oa patches [Emil Velikov: commit message, various small fixes througout] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Jason Ekstrand
committed by
Emil Velikov
Emil Velikov
parent
d0d4a5f43b
commit
700bebb958
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/*
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* Copyright © 2013 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "brw_vec4_vs.h"
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#include "common/gen_debug.h"
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namespace brw {
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void
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vec4_vs_visitor::emit_prolog()
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{
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}
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dst_reg *
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vec4_vs_visitor::make_reg_for_system_value(int location)
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{
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/* VertexID is stored by the VF as the last vertex element, but
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* we don't represent it with a flag in inputs_read, so we call
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* it VERT_ATTRIB_MAX, which setup_attributes() picks up on.
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*/
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dst_reg *reg = new(mem_ctx) dst_reg(ATTR, VERT_ATTRIB_MAX);
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switch (location) {
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case SYSTEM_VALUE_BASE_VERTEX:
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reg->writemask = WRITEMASK_X;
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vs_prog_data->uses_basevertex = true;
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break;
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case SYSTEM_VALUE_BASE_INSTANCE:
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reg->writemask = WRITEMASK_Y;
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vs_prog_data->uses_baseinstance = true;
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break;
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case SYSTEM_VALUE_VERTEX_ID:
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case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
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reg->writemask = WRITEMASK_Z;
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vs_prog_data->uses_vertexid = true;
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break;
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case SYSTEM_VALUE_INSTANCE_ID:
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reg->writemask = WRITEMASK_W;
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vs_prog_data->uses_instanceid = true;
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break;
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case SYSTEM_VALUE_DRAW_ID:
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reg = new(mem_ctx) dst_reg(ATTR, VERT_ATTRIB_MAX + 1);
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reg->writemask = WRITEMASK_X;
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vs_prog_data->uses_drawid = true;
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break;
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default:
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unreachable("not reached");
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}
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return reg;
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}
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void
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vec4_vs_visitor::emit_urb_write_header(int mrf)
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{
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/* No need to do anything for VS; an implied write to this MRF will be
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* performed by VS_OPCODE_URB_WRITE.
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*/
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(void) mrf;
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}
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vec4_instruction *
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vec4_vs_visitor::emit_urb_write_opcode(bool complete)
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{
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/* For VS, the URB writes end the thread. */
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if (complete) {
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if (INTEL_DEBUG & DEBUG_SHADER_TIME)
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emit_shader_time_end();
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}
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vec4_instruction *inst = emit(VS_OPCODE_URB_WRITE);
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inst->urb_write_flags = complete ?
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BRW_URB_WRITE_EOT_COMPLETE : BRW_URB_WRITE_NO_FLAGS;
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return inst;
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}
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void
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vec4_vs_visitor::emit_urb_slot(dst_reg reg, int varying)
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{
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reg.type = BRW_REGISTER_TYPE_F;
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output_reg[varying][0].type = reg.type;
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switch (varying) {
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case VARYING_SLOT_COL0:
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case VARYING_SLOT_COL1:
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case VARYING_SLOT_BFC0:
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case VARYING_SLOT_BFC1: {
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/* These built-in varyings are only supported in compatibility mode,
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* and we only support GS in core profile. So, this must be a vertex
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* shader.
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*/
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vec4_instruction *inst = emit_generic_urb_slot(reg, varying, 0);
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if (inst && key->clamp_vertex_color)
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inst->saturate = true;
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break;
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}
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default:
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return vec4_visitor::emit_urb_slot(reg, varying);
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}
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}
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void
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vec4_vs_visitor::emit_clip_distances(dst_reg reg, int offset)
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{
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/* From the GLSL 1.30 spec, section 7.1 (Vertex Shader Special Variables):
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*
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* "If a linked set of shaders forming the vertex stage contains no
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* static write to gl_ClipVertex or gl_ClipDistance, but the
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* application has requested clipping against user clip planes through
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* the API, then the coordinate written to gl_Position is used for
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* comparison against the user clip planes."
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*
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* This function is only called if the shader didn't write to
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* gl_ClipDistance. Accordingly, we use gl_ClipVertex to perform clipping
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* if the user wrote to it; otherwise we use gl_Position.
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*/
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gl_varying_slot clip_vertex = VARYING_SLOT_CLIP_VERTEX;
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if (!(prog_data->vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) {
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clip_vertex = VARYING_SLOT_POS;
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}
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for (int i = 0; i + offset < key->nr_userclip_plane_consts && i < 4;
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++i) {
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reg.writemask = 1 << i;
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emit(DP4(reg,
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src_reg(output_reg[clip_vertex][0]),
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src_reg(this->userplane[i + offset])));
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}
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}
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void
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vec4_vs_visitor::setup_uniform_clipplane_values()
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{
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for (int i = 0; i < key->nr_userclip_plane_consts; ++i) {
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this->userplane[i] = dst_reg(UNIFORM, this->uniforms);
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this->userplane[i].type = BRW_REGISTER_TYPE_F;
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for (int j = 0; j < 4; ++j) {
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stage_prog_data->param[this->uniforms * 4 + j] =
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(gl_constant_value *) &clip_planes[i][j];
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}
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++this->uniforms;
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}
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}
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void
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vec4_vs_visitor::emit_thread_end()
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{
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setup_uniform_clipplane_values();
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/* Lower legacy ff and ClipVertex clipping to clip distances */
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if (key->nr_userclip_plane_consts > 0) {
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current_annotation = "user clip distances";
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output_reg[VARYING_SLOT_CLIP_DIST0][0] =
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dst_reg(this, glsl_type::vec4_type);
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output_reg[VARYING_SLOT_CLIP_DIST1][0] =
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dst_reg(this, glsl_type::vec4_type);
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output_num_components[VARYING_SLOT_CLIP_DIST0][0] = 4;
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output_num_components[VARYING_SLOT_CLIP_DIST1][0] = 4;
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emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST0][0], 0);
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emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST1][0], 4);
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}
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/* For VS, we always end the thread by emitting a single vertex.
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* emit_urb_write_opcode() will take care of setting the eot flag on the
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* SEND instruction.
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*/
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emit_vertex();
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}
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vec4_vs_visitor::vec4_vs_visitor(const struct brw_compiler *compiler,
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void *log_data,
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const struct brw_vs_prog_key *key,
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struct brw_vs_prog_data *vs_prog_data,
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const nir_shader *shader,
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gl_clip_plane *clip_planes,
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void *mem_ctx,
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int shader_time_index,
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bool use_legacy_snorm_formula)
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: vec4_visitor(compiler, log_data, &key->tex, &vs_prog_data->base, shader,
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mem_ctx, false /* no_spills */, shader_time_index),
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key(key),
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vs_prog_data(vs_prog_data),
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clip_planes(clip_planes),
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use_legacy_snorm_formula(use_legacy_snorm_formula)
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{
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}
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} /* namespace brw */
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