diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 6190704c6cb..0051a3e3d3f 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -27,7 +27,6 @@
 
 #include "nir/nir.h"
 #include "nir/nir_builder.h"
-#include "nir/nir_xfb_info.h"
 #include "spirv/nir_spirv.h"
 #include "util/disk_cache.h"
 #include "util/mesa-sha1.h"
@@ -2809,20 +2808,6 @@ get_vs_output_info(const struct radv_graphics_pipeline *pipeline)
       return &pipeline->base.shaders[MESA_SHADER_VERTEX]->info.vs.outinfo;
 }
 
-static bool
-radv_nir_stage_uses_xfb(const nir_shader *nir)
-{
-   /* Mesh shaders don't support XFB. */
-   if (nir->info.stage == MESA_SHADER_MESH)
-      return false;
-
-   nir_xfb_info *xfb = nir_shader_get_xfb_info(nir, NULL);
-   bool uses_xfb = !!xfb;
-
-   ralloc_free(xfb);
-   return uses_xfb;
-}
-
 static bool
 radv_lower_viewport_to_zero(nir_shader *nir)
 {
@@ -3091,7 +3076,7 @@ radv_link_shaders(struct radv_pipeline *pipeline,
 
    if (!optimize_conservatively) {
       bool uses_xfb = last_vgt_api_stage != -1 &&
-                      radv_nir_stage_uses_xfb(stages[last_vgt_api_stage].nir);
+                      stages[last_vgt_api_stage].nir->xfb_info;
 
       for (unsigned i = 0; i < shader_count; ++i) {
          shader_info *info = &ordered_shaders[i]->info;
@@ -3559,7 +3544,7 @@ radv_fill_shader_info_ngg(struct radv_pipeline *pipeline,
       }
 
       bool uses_xfb = stages[last_xfb_stage].nir &&
-                      radv_nir_stage_uses_xfb(stages[last_xfb_stage].nir);
+                      stages[last_xfb_stage].nir->xfb_info;
 
       if (!device->physical_device->use_ngg_streamout && uses_xfb) {
          /* GFX11+ requires NGG. */
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 27b35f98b3f..3125e250da2 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -28,6 +28,7 @@
 #include "radv_shader.h"
 #include "nir/nir.h"
 #include "nir/nir_builder.h"
+#include "nir/nir_xfb_info.h"
 #include "spirv/nir_spirv.h"
 #include "util/memstream.h"
 #include "util/mesa-sha1.h"
@@ -959,6 +960,11 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_
       radv_optimize_nir(nir, false, false);
    }
 
+   if (nir->info.stage == MESA_SHADER_VERTEX ||
+       nir->info.stage == MESA_SHADER_TESS_EVAL ||
+       nir->info.stage == MESA_SHADER_GEOMETRY)
+      NIR_PASS_V(nir, nir_shader_gather_xfb_info);
+
    return nir;
 }
 
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 64f9d781ba7..58cb5eaf1ba 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -399,12 +399,12 @@ gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
 static void
 gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info)
 {
-   nir_xfb_info *xfb = nir_shader_get_xfb_info(nir, NULL);
    struct radv_streamout_info *so = &info->so;
 
-   if (!xfb)
+   if (!nir->xfb_info)
       return;
 
+   const nir_xfb_info *xfb = nir->xfb_info;
    assert(xfb->output_count <= MAX_SO_OUTPUTS);
    so->num_outputs = xfb->output_count;
 
@@ -423,8 +423,6 @@ gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info)
    for (unsigned i = 0; i < NIR_MAX_XFB_BUFFERS; i++) {
       so->strides[i] = xfb->buffers[i].stride / 4;
    }
-
-   ralloc_free(xfb);
 }
 
 static void