From 6f7a76e9d95374c87d6ca914647f65ec82273779 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Fri, 14 Feb 2025 21:54:37 -0800 Subject: [PATCH] intel/compiler: Zero out the header for texel fetch It looks like even if we pass the header not present in the sampler descriptor, it's not helping with the correct behavior of texelFetch. Experiment on real HW shows that if we just zero out the header and include it in the message, it helps with the correct behavior. I'm not sure if there is a valid HW workaround for this one. We can skip masking the sampler message header bits 4:0 but masking them out doesn't hurt in this case. Increasing number of parameter impact sampler performance, For example, a sample message using 5 parameters will not be able to sustain the same throughput as a sample message with only 4 valid parameters. We should look out for any perf impact with respect to texel fetch. This patch fixes ~3k tests involving texelFetch instruction on Xe3+ Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_lower_logical_sends.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index c4fefa75a4d..d16077f2574 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -706,7 +706,8 @@ emit_load_payload_with_padding(const brw_builder &bld, const brw_reg &dst, } static bool -shader_opcode_needs_header(opcode op) +shader_opcode_needs_header(opcode op, + const struct intel_device_info *devinfo) { switch (op) { case SHADER_OPCODE_TG4_LOGICAL: @@ -718,6 +719,9 @@ shader_opcode_needs_header(opcode op) case SHADER_OPCODE_TG4_IMPLICIT_LOD_LOGICAL: case SHADER_OPCODE_SAMPLEINFO_LOGICAL: return true; + case SHADER_OPCODE_TXF_LOGICAL: + /* Xe3 HW does not seem to work unless we force a header. */ + return devinfo->ver >= 30; default: break; } @@ -764,7 +768,7 @@ lower_sampler_logical_send(const brw_builder &bld, brw_inst *inst, assert((surface.file == BAD_FILE) != (surface_handle.file == BAD_FILE)); assert((sampler.file == BAD_FILE) != (sampler_handle.file == BAD_FILE)); - if (shader_opcode_needs_header(op) || inst->offset != 0 || + if (shader_opcode_needs_header(op, devinfo) || inst->offset != 0 || sampler_handle.file != BAD_FILE || is_high_sampler(devinfo, sampler) || residency) {