From 6d83389a398410938935d433836d7c22c01fbd98 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 20 Jun 2024 17:11:23 +0200 Subject: [PATCH] ac/nir/esgs: Add gs_inputs_read to ES output lowering. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit just adds the field, it will be taken into use in a following commit. Signed-off-by: Timur Kristóf Reviewed-by: Alyssa Rosenzweig Reviewed-by: Marek Olšák Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_nir.h | 3 ++- src/amd/common/ac_nir_lower_esgs_io_to_mem.c | 10 +++++++++- src/amd/vulkan/nir/radv_nir_lower_io.c | 4 ++-- src/gallium/drivers/radeonsi/si_shader.c | 4 ++-- 4 files changed, 15 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_nir.h b/src/amd/common/ac_nir.h index d896bebb2c7..7cbf287e159 100644 --- a/src/amd/common/ac_nir.h +++ b/src/amd/common/ac_nir.h @@ -103,7 +103,8 @@ void ac_nir_lower_es_outputs_to_mem(nir_shader *shader, ac_nir_map_io_driver_location map, enum amd_gfx_level gfx_level, - unsigned esgs_itemsize); + unsigned esgs_itemsize, + uint64_t gs_inputs_read); void ac_nir_lower_gs_inputs_to_mem(nir_shader *shader, diff --git a/src/amd/common/ac_nir_lower_esgs_io_to_mem.c b/src/amd/common/ac_nir_lower_esgs_io_to_mem.c index 6453b23c6de..28fc30e67e6 100644 --- a/src/amd/common/ac_nir_lower_esgs_io_to_mem.c +++ b/src/amd/common/ac_nir_lower_esgs_io_to_mem.c @@ -35,6 +35,11 @@ typedef struct { /* Enable fix for triangle strip adjacency in geometry shader. */ bool gs_triangle_strip_adjacency_fix; + + /* Bit mask of inputs read by the GS, + * this is used for linking ES outputs to GS inputs. + */ + uint64_t gs_inputs_read; } lower_esgs_io_state; static nir_def * @@ -314,12 +319,14 @@ void ac_nir_lower_es_outputs_to_mem(nir_shader *shader, ac_nir_map_io_driver_location map, enum amd_gfx_level gfx_level, - unsigned esgs_itemsize) + unsigned esgs_itemsize, + uint64_t gs_inputs_read) { lower_esgs_io_state state = { .gfx_level = gfx_level, .esgs_itemsize = esgs_itemsize, .map_io = map, + .gs_inputs_read = gs_inputs_read, }; nir_shader_intrinsics_pass(shader, lower_es_output_store, @@ -337,6 +344,7 @@ ac_nir_lower_gs_inputs_to_mem(nir_shader *shader, .gfx_level = gfx_level, .map_io = map, .gs_triangle_strip_adjacency_fix = triangle_strip_adjacency_fix, + .gs_inputs_read = shader->info.inputs_read, }; nir_shader_lower_instructions(shader, diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c index 46fc1a37c0e..d5f945d4236 100644 --- a/src/amd/vulkan/nir/radv_nir_lower_io.c +++ b/src/amd/vulkan/nir/radv_nir_lower_io.c @@ -137,7 +137,7 @@ radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *s info->vs.hs_inputs_read, info->vs.tcs_temp_only_input_mask); return true; } else if (info->vs.as_es) { - NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, pdev->info.gfx_level, info->esgs_itemsize); + NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, pdev->info.gfx_level, info->esgs_itemsize, info->gs_inputs_read); return true; } } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) { @@ -150,7 +150,7 @@ radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *s NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, map_input); if (info->tes.as_es) { - NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, pdev->info.gfx_level, info->esgs_itemsize); + NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, pdev->info.gfx_level, info->esgs_itemsize, info->gs_inputs_read); } return true; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 647735f1f41..9bac34f6ba3 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1845,7 +1845,7 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir, return true; } else if (key->ge.as_es) { NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location, - sel->screen->info.gfx_level, sel->info.esgs_vertex_stride); + sel->screen->info.gfx_level, sel->info.esgs_vertex_stride, ~0ULL); return true; } } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) { @@ -1869,7 +1869,7 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir, if (key->ge.as_es) { NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location, - sel->screen->info.gfx_level, sel->info.esgs_vertex_stride); + sel->screen->info.gfx_level, sel->info.esgs_vertex_stride, ~0ULL); } return true;