From 6b1fd20780450b4afbf1ac94507cba0d95ccf261 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 23 Jan 2024 20:16:51 +0800 Subject: [PATCH] radeonsi: split RADEON_USAGE_NEEDS_IMPLICIT_SYNC into CB and DB flags it will be required in the future Signed-off-by: Qiang Yu Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_compute.c | 11 +++++------ src/gallium/drivers/radeonsi/si_gfx_cs.c | 5 +++-- src/gallium/drivers/radeonsi/si_pipe.h | 8 ++++++-- src/gallium/drivers/radeonsi/si_state.c | 8 ++++---- src/gallium/include/winsys/radeon_winsys.h | 9 +++++---- 5 files changed, 23 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index e7964601a84..264fe53d1ec 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -897,7 +897,7 @@ static void si_emit_dispatch_packets(struct si_context *sctx, const struct pipe_ radeon_end(); } -static bool si_check_needs_implicit_sync(struct si_context *sctx) +static bool si_check_needs_implicit_sync(struct si_context *sctx, uint32_t usage) { /* If the compute shader is going to read from a texture/image written by a * previous draw, we must wait for its completion before continuing. @@ -920,8 +920,7 @@ static bool si_check_needs_implicit_sync(struct si_context *sctx) struct si_sampler_view *sview = (struct si_sampler_view *)samplers->views[i]; struct si_resource *res = si_resource(sview->base.texture); - if (sctx->ws->cs_is_buffer_referenced(&sctx->gfx_cs, res->buf, - RADEON_USAGE_NEEDS_IMPLICIT_SYNC)) + if (sctx->ws->cs_is_buffer_referenced(&sctx->gfx_cs, res->buf, usage)) return true; } @@ -933,8 +932,7 @@ static bool si_check_needs_implicit_sync(struct si_context *sctx) struct pipe_image_view *sview = &images->views[i]; struct si_resource *res = si_resource(sview->resource); - if (sctx->ws->cs_is_buffer_referenced(&sctx->gfx_cs, res->buf, - RADEON_USAGE_NEEDS_IMPLICIT_SYNC)) + if (sctx->ws->cs_is_buffer_referenced(&sctx->gfx_cs, res->buf, usage)) return true; } return false; @@ -965,7 +963,8 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info si_update_fb_dirtiness_after_rendering(sctx); sctx->last_num_draw_calls = sctx->num_draw_calls; - if (sctx->force_cb_shader_coherent || si_check_needs_implicit_sync(sctx)) + if (sctx->force_shader_coherency.with_cb || + si_check_needs_implicit_sync(sctx, RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC)) si_make_CB_shader_coherent(sctx, 0, sctx->framebuffer.CB_has_shader_readable_metadata, sctx->framebuffer.all_DCC_pipe_aligned); diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index f4e93d8b4ec..48aa91688e3 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -581,10 +581,11 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) /* All buffer references are removed on a flush, so si_check_needs_implicit_sync * cannot determine if si_make_CB_shader_coherent() needs to be called. - * ctx->force_cb_shader_coherent will be cleared by the first call to + * ctx->force_shader_coherency.with_cb will be cleared by the first call to * si_make_CB_shader_coherent. */ - ctx->force_cb_shader_coherent = true; + ctx->force_shader_coherency.with_cb = true; + ctx->force_shader_coherency.with_db = true; } void si_trace_emit(struct si_context *sctx) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 384f6de691e..4adff076481 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1352,7 +1352,10 @@ struct si_context { struct list_head shader_query_buffers; unsigned num_active_shader_queries; - bool force_cb_shader_coherent; + struct { + bool with_cb; + bool with_db; + } force_shader_coherency; struct si_tracked_regs tracked_regs; @@ -1890,7 +1893,7 @@ static inline void si_make_CB_shader_coherent(struct si_context *sctx, unsigned bool shaders_read_metadata, bool dcc_pipe_aligned) { sctx->flags |= SI_CONTEXT_FLUSH_AND_INV_CB | SI_CONTEXT_INV_VCACHE; - sctx->force_cb_shader_coherent = false; + sctx->force_shader_coherency.with_cb = false; if (sctx->gfx_level >= GFX10) { if (sctx->screen->info.tcc_rb_non_coherent) @@ -1918,6 +1921,7 @@ static inline void si_make_DB_shader_coherent(struct si_context *sctx, unsigned bool include_stencil, bool shaders_read_metadata) { sctx->flags |= SI_CONTEXT_FLUSH_AND_INV_DB | SI_CONTEXT_INV_VCACHE; + sctx->force_shader_coherency.with_db = false; if (sctx->gfx_level >= GFX10) { if (sctx->screen->info.tcc_rb_non_coherent) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 70926b35f67..b44123c1715 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3341,12 +3341,12 @@ static void si_emit_framebuffer_state(struct si_context *sctx, unsigned index) tex = (struct si_texture *)cb->base.texture; radeon_add_to_buffer_list( - sctx, &sctx->gfx_cs, &tex->buffer, RADEON_USAGE_READWRITE | RADEON_USAGE_NEEDS_IMPLICIT_SYNC | + sctx, &sctx->gfx_cs, &tex->buffer, RADEON_USAGE_READWRITE | RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC | (tex->buffer.b.b.nr_samples > 1 ? RADEON_PRIO_COLOR_BUFFER_MSAA : RADEON_PRIO_COLOR_BUFFER)); if (tex->cmask_buffer && tex->cmask_buffer != &tex->buffer) { radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, tex->cmask_buffer, - RADEON_USAGE_READWRITE | RADEON_USAGE_NEEDS_IMPLICIT_SYNC | + RADEON_USAGE_READWRITE | RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC | RADEON_PRIO_SEPARATE_META); } @@ -3799,12 +3799,12 @@ static void gfx11_dgpu_emit_framebuffer_state(struct si_context *sctx, unsigned tex = (struct si_texture *)cb->base.texture; radeon_add_to_buffer_list( - sctx, &sctx->gfx_cs, &tex->buffer, RADEON_USAGE_READWRITE | RADEON_USAGE_NEEDS_IMPLICIT_SYNC | + sctx, &sctx->gfx_cs, &tex->buffer, RADEON_USAGE_READWRITE | RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC | (tex->buffer.b.b.nr_samples > 1 ? RADEON_PRIO_COLOR_BUFFER_MSAA : RADEON_PRIO_COLOR_BUFFER)); if (tex->cmask_buffer && tex->cmask_buffer != &tex->buffer) { radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, tex->cmask_buffer, - RADEON_USAGE_READWRITE | RADEON_USAGE_NEEDS_IMPLICIT_SYNC | + RADEON_USAGE_READWRITE | RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC | RADEON_PRIO_SEPARATE_META); } diff --git a/src/gallium/include/winsys/radeon_winsys.h b/src/gallium/include/winsys/radeon_winsys.h index 30554e1ebcb..6f7faef41ae 100644 --- a/src/gallium/include/winsys/radeon_winsys.h +++ b/src/gallium/include/winsys/radeon_winsys.h @@ -189,19 +189,20 @@ enum radeon_ctx_pstate #define RADEON_ALL_PRIORITIES (RADEON_USAGE_READ - 1) /* Upper bits of priorities are used by usage flags. */ -#define RADEON_USAGE_READ (1 << 28) -#define RADEON_USAGE_WRITE (1 << 29) +#define RADEON_USAGE_READ (1 << 27) +#define RADEON_USAGE_WRITE (1 << 28) #define RADEON_USAGE_READWRITE (RADEON_USAGE_READ | RADEON_USAGE_WRITE) /* The winsys ensures that the CS submission will be scheduled after * previously flushed CSs referencing this BO in a conflicting way. */ -#define RADEON_USAGE_SYNCHRONIZED (1 << 30) +#define RADEON_USAGE_SYNCHRONIZED (1 << 29) /* When used, an implicit sync is done to make sure a compute shader * will read the written values from a previous draw. */ -#define RADEON_USAGE_NEEDS_IMPLICIT_SYNC (1u << 31) +#define RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC (1u << 30) +#define RADEON_USAGE_DB_NEEDS_IMPLICIT_SYNC (1u << 31) struct winsys_handle; struct radeon_winsys_ctx;