diff --git a/src/amd/common/nir/ac_nir.h b/src/amd/common/nir/ac_nir.h
index c3abe33bdec..81f01649517 100644
--- a/src/amd/common/nir/ac_nir.h
+++ b/src/amd/common/nir/ac_nir.h
@@ -166,6 +166,11 @@ typedef struct {
    unsigned max_workgroup_size;
    unsigned wave_size;
    uint8_t clip_cull_dist_mask;
+   /* The mask of clip and cull distances that the shader should cull against.
+    * If no clip and cull distance outputs are present, it will load clip planes and cull
+    * either against CLIP_VERTEX or POS.
+    */
+   uint8_t cull_clipdist_mask;
    bool write_pos_to_clipvertex;
    /* Remove clip/cull distance components that are missing in clip_cull_dist_mask, improving
     * throughput by up to 50% (3 pos exports -> 2 pos exports). The caller shouldn't set no-op
@@ -201,7 +206,6 @@ typedef struct {
    bool export_primitive_id;
    bool export_primitive_id_per_prim;
    uint32_t instance_rate_inputs;
-   uint32_t user_clip_plane_enable_mask;
 } ac_nir_lower_ngg_options;
 
 bool
diff --git a/src/amd/common/nir/ac_nir_lower_ngg.c b/src/amd/common/nir/ac_nir_lower_ngg.c
index 7e812d9dfdf..aa8b3722f91 100644
--- a/src/amd/common/nir/ac_nir_lower_ngg.c
+++ b/src/amd/common/nir/ac_nir_lower_ngg.c
@@ -881,7 +881,7 @@ clipdist_culling_es_part(nir_builder *b, lower_ngg_nogs_state *s,
                          nir_def *es_vertex_lds_addr)
 {
    /* no gl_ClipDistance used but we have user defined clip plane */
-   if (s->options->user_clip_plane_enable_mask && !s->has_clipdist) {
+   if (s->options->cull_clipdist_mask && !s->has_clipdist) {
       /* use gl_ClipVertex if defined */
       nir_variable *clip_vertex_var =
          b->shader->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_CLIP_VERTEX) ?
@@ -889,10 +889,7 @@ clipdist_culling_es_part(nir_builder *b, lower_ngg_nogs_state *s,
       nir_def *clip_vertex = nir_load_var(b, clip_vertex_var);
 
       /* clip against user defined clip planes */
-      for (unsigned i = 0; i < 8; i++) {
-         if (!(s->options->user_clip_plane_enable_mask & BITFIELD_BIT(i)))
-            continue;
-
+      u_foreach_bit(i, s->options->cull_clipdist_mask) {
          nir_def *plane = nir_load_user_clip_plane(b, .ucp_id = i);
          nir_def *dist = nir_fdot(b, clip_vertex, plane);
          add_clipdist_bit(b, dist, i, s->clipdist_neg_mask_var);
@@ -1045,7 +1042,7 @@ add_deferred_attribute_culling(nir_builder *b, nir_cf_list *original_extracted_c
    s->repacked_rel_patch_id = nir_local_variable_create(impl, glsl_uint_type(), "repacked_rel_patch_id");
 
    if (s->options->clip_cull_dist_mask ||
-       s->options->user_clip_plane_enable_mask) {
+       s->options->cull_clipdist_mask) {
       s->clip_vertex_var =
          nir_local_variable_create(impl, glsl_vec4_type(), "clip_vertex");
       s->clipdist_neg_mask_var =
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 3d3cb489182..f7dff13181a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1170,7 +1170,7 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir,
          sel->screen->info.gfx_level >= GFX11 && !nir->info.vs.blit_sgprs_amd;
       options.export_primitive_id = key->ge.mono.u.vs_export_prim_id;
       options.instance_rate_inputs = instance_rate_inputs;
-      options.user_clip_plane_enable_mask = clip_plane_enable;
+      options.cull_clipdist_mask = clip_plane_enable;
 
       NIR_PASS_V(nir, ac_nir_lower_ngg_nogs, &options, &shader->info.ngg_lds_vertex_size);
    } else {