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radeonsi: never set DISABLE_WR_CONFIRM for CP DMA clears and copies

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Only prefetches set it. Unsynchronized clears and copies shouldn't set it
because syncing later wouldn't wait for the writes.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
This commit is contained in:
Marek Olšák
2021-03-19 18:48:04 -04:00
committed by Marge Bot
parent 28d065d3e5
commit 69ff9c16bb
1 changed files with 0 additions and 6 deletions
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src/gallium/drivers/radeonsi/si_cp_dma.c
-6
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@@ -70,12 +70,6 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
/* Sync flags. */ /* Sync flags. */
if (flags & CP_DMA_SYNC) if (flags & CP_DMA_SYNC)
header |= S_411_CP_SYNC(1); header |= S_411_CP_SYNC(1);
else {
if (sctx->chip_class >= GFX9)
command |= S_414_DISABLE_WR_CONFIRM_GFX9(1);
else
command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
}
if (flags & CP_DMA_RAW_WAIT) if (flags & CP_DMA_RAW_WAIT)
command |= S_414_RAW_WAIT(1); command |= S_414_RAW_WAIT(1);