intel/ds: reuse intel_ioctl()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

src/intel/common/intel_gem.h

@@ -76,6 +76,19 @@ intel_ioctl(int fd, unsigned long request, void *arg)
     return ret;
 }
 
+static inline uint64_t
+intel_read_gpu_timestamp(int fd)
+{
+   struct drm_i915_reg_read reg_read = {};
+   const uint64_t render_ring_timestamp = 0x2358;
+   reg_read.offset = render_ring_timestamp | I915_REG_READ_8B_WA;
+
+   if (intel_ioctl(fd, DRM_IOCTL_I915_REG_READ, &reg_read) < 0)
+      return 0;
+
+   return reg_read.val;
+}
+
 /**
  * A wrapper around DRM_IOCTL_I915_QUERY
  *

src/intel/ds/intel_pps_driver.cc

@@ -18,6 +18,7 @@
 
 #include <i915_drm.h>
 
+#include "common/intel_gem.h"
 #include "dev/intel_device_info.h"
 #include "perf/intel_perf.h"
 #include "perf/intel_perf_query.h"
@@ -40,21 +41,6 @@ uint64_t IntelDriver::get_min_sampling_period_ns()
    return (2.f * perf->devinfo.timestamp_frequency) / 1000000000ull;
 }
 
-uint64_t read_gpu_timestamp(int drm_fd)
-{
-   drm_i915_reg_read reg_read = {};
-   const uint64_t render_ring_timestamp = 0x2358;
-   reg_read.offset = render_ring_timestamp | I915_REG_READ_8B_WA;
-
-   if (perf_ioctl(drm_fd, DRM_IOCTL_I915_REG_READ, &reg_read) < 0) {
-      PPS_LOG_ERROR("Unable to read GPU clock");
-      return 0;
-   }
-
-   return reg_read.val;
-
-}
-
 IntelDriver::IntelDriver()
 {
    /* Note: clock_id's below 128 are reserved.. for custom clock sources,
@@ -219,7 +205,7 @@ std::vector<PerfRecord> IntelDriver::parse_perf_records(const std::vector<uint8_
           * again.
           */
          if (gpu_timestamp_udw == 0 || (gpu_timestamp_udw + gpu_timestamp_ldw) < last_gpu_timestamp)
-            gpu_timestamp_udw = read_gpu_timestamp(drm_device.fd) & 0xffffffff00000000;
+            gpu_timestamp_udw = intel_read_gpu_timestamp(drm_device.fd) & 0xffffffff00000000;
 
          uint64_t gpu_timestamp = gpu_timestamp_udw + gpu_timestamp_ldw;
 
@@ -336,7 +322,7 @@ uint32_t IntelDriver::gpu_clock_id() const
 uint64_t IntelDriver::gpu_timestamp() const
 {
    return intel_device_info_timebase_scale(&perf->devinfo,
-                                           read_gpu_timestamp(drm_device.fd));
+                                           intel_read_gpu_timestamp(drm_device.fd));
 }
 
 } // namespace pps

src/intel/ds/intel_pps_perf.cc

@@ -18,17 +18,6 @@
 
 namespace pps
 {
-int perf_ioctl(int fd, unsigned long request, void *arg)
-{
-   int ret;
-
-   do {
-      ret = ioctl(fd, request, arg);
-   } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
-
-   return ret;
-}
-
 IntelPerf::IntelPerf(const int drm_fd)
    : drm_fd {drm_fd}
    , ralloc_ctx {ralloc_context(nullptr)}

src/intel/ds/intel_pps_perf.h

@@ -17,8 +17,6 @@
 
 namespace pps
 {
-int perf_ioctl(int fd, unsigned long request, void *arg);
-
 class IntelPerf
 {
    public: