From 69982e6f2f3c4c94961f8b394d9a1373712e9e2d Mon Sep 17 00:00:00 2001 From: Lorenzo Rossi Date: Wed, 5 Mar 2025 18:40:55 +0100 Subject: [PATCH] nak: Flatten AttrAccess into instructions The AttrAccess structure provided inputs for similar instructions, some inputs were used only in a subset of instructions, needing asserts and dummy values. This commit flattens the struct directly in the instructions removing the unused fields and cleaning up the code. Signed-off-by: Lorenzo Rossi Part-of: --- src/nouveau/compiler/nak/from_nir.rs | 62 +++++++++++++--------------- src/nouveau/compiler/nak/ir.rs | 44 ++++++++++---------- src/nouveau/compiler/nak/sm50.rs | 30 +++++++------- src/nouveau/compiler/nak/sm70.rs | 24 +++++------ 4 files changed, 74 insertions(+), 86 deletions(-) diff --git a/src/nouveau/compiler/nak/from_nir.rs b/src/nouveau/compiler/nak/from_nir.rs index c8f78ec1f6f..22d96ee11ad 100644 --- a/src/nouveau/compiler/nak/from_nir.rs +++ b/src/nouveau/compiler/nak/from_nir.rs @@ -2053,19 +2053,15 @@ impl<'a> ShaderFromNir<'a> { let flags: nak_nir_attr_io_flags = unsafe { std::mem::transmute_copy(&flags) }; - let access = AttrAccess { - addr: addr, - comps: 1, - patch: flags.patch(), - output: flags.output(), - phys: false, - }; + assert!(!flags.patch()); let dst = b.alloc_ssa(RegFile::GPR, 1); b.push_op(OpAL2P { dst: dst.into(), - offset: offset, - access: access, + offset, + addr, + output: flags.output(), + comps: 1, }); self.set_dst(&intrin.def, dst); } @@ -2107,25 +2103,23 @@ impl<'a> ShaderFromNir<'a> { panic!("Must be a VTG stage"); } - let access = AttrAccess { - addr: addr, - comps: intrin.num_components, - patch: flags.patch(), - output: flags.output(), - phys: flags.phys(), - }; + let comps = intrin.num_components; if intrin.intrinsic == nir_intrinsic_ald_nv { let vtx = self.get_src(&srcs[0]); let offset = self.get_src(&srcs[1]); assert!(intrin.def.bit_size() == 32); - let dst = b.alloc_ssa(RegFile::GPR, access.comps); + let dst = b.alloc_ssa(RegFile::GPR, comps); b.push_op(OpALd { dst: dst.into(), - vtx: vtx, - offset: offset, - access: access, + vtx, + addr, + offset, + comps, + patch: flags.patch(), + output: flags.output(), + phys: flags.phys(), }); self.set_dst(&intrin.def, dst); } else if intrin.intrinsic == nir_intrinsic_ast_nv { @@ -2135,10 +2129,13 @@ impl<'a> ShaderFromNir<'a> { let offset = self.get_src(&srcs[2]); b.push_op(OpASt { - data: data, - vtx: vtx, - offset: offset, - access: access, + data, + vtx, + addr, + offset, + comps, + patch: flags.patch(), + phys: flags.phys(), }); } else { panic!("Invalid VTG I/O intrinsic"); @@ -2737,24 +2734,21 @@ impl<'a> ShaderFromNir<'a> { idx: 0, }); - let access = AttrAccess { - addr: NAK_ATTR_TESS_COORD, - comps: 2, - patch: false, - output: true, - phys: false, - }; - // This is recorded as a patch output in parse_shader() because // the hardware requires it be in the SPH, whether we use it or // not. - let dst = b.alloc_ssa(RegFile::GPR, access.comps); + let comps = 2; + let dst = b.alloc_ssa(RegFile::GPR, comps); b.push_op(OpALd { dst: dst.into(), vtx: vtx.into(), + addr: NAK_ATTR_TESS_COORD, offset: 0.into(), - access: access, + comps, + patch: false, + output: true, + phys: false, }); self.set_dst(&intrin.def, dst); } diff --git a/src/nouveau/compiler/nak/ir.rs b/src/nouveau/compiler/nak/ir.rs index 103a8881953..db68f18c22e 100644 --- a/src/nouveau/compiler/nak/ir.rs +++ b/src/nouveau/compiler/nak/ir.rs @@ -2595,14 +2595,6 @@ impl fmt::Display for InterpLoc { } } -pub struct AttrAccess { - pub addr: u16, - pub comps: u8, - pub patch: bool, - pub output: bool, - pub phys: bool, -} - #[repr(C)] #[derive(SrcsAsSlice, DstsAsSlice)] pub struct OpFAdd { @@ -5296,19 +5288,18 @@ pub struct OpAL2P { #[src_type(GPR)] pub offset: Src, - pub access: AttrAccess, + pub addr: u16, + pub comps: u8, + pub output: bool, } impl DisplayOp for OpAL2P { fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "al2p")?; - if self.access.output { + if self.output { write!(f, ".o")?; } - if self.access.patch { - write!(f, ".p")?; - } - write!(f, " a[{:#x}", self.access.addr)?; + write!(f, " a[{:#x}", self.addr)?; if !self.offset.is_zero() { write!(f, "+{}", self.offset)?; } @@ -5328,26 +5319,30 @@ pub struct OpALd { #[src_type(GPR)] pub offset: Src, - pub access: AttrAccess, + pub addr: u16, + pub comps: u8, + pub patch: bool, + pub output: bool, + pub phys: bool, } impl DisplayOp for OpALd { fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "ald")?; - if self.access.output { + if self.output { write!(f, ".o")?; } - if self.access.patch { + if self.patch { write!(f, ".p")?; } - if self.access.phys { + if self.phys { write!(f, ".phys")?; } write!(f, " a")?; if !self.vtx.is_zero() { write!(f, "[{}]", self.vtx)?; } - write!(f, "[{:#x}", self.access.addr)?; + write!(f, "[{:#x}", self.addr)?; if !self.offset.is_zero() { write!(f, "+{}", self.offset)?; } @@ -5368,23 +5363,26 @@ pub struct OpASt { #[src_type(SSA)] pub data: Src, - pub access: AttrAccess, + pub addr: u16, + pub comps: u8, + pub patch: bool, + pub phys: bool, } impl DisplayOp for OpASt { fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "ast")?; - if self.access.patch { + if self.patch { write!(f, ".p")?; } - if self.access.phys { + if self.phys { write!(f, ".phys")?; } write!(f, " a")?; if !self.vtx.is_zero() { write!(f, "[{}]", self.vtx)?; } - write!(f, "[{:#x}", self.access.addr)?; + write!(f, "[{:#x}", self.addr)?; if !self.offset.is_zero() { write!(f, "+{}", self.offset)?; } diff --git a/src/nouveau/compiler/nak/sm50.rs b/src/nouveau/compiler/nak/sm50.rs index 44e318bbfc9..021ff52d072 100644 --- a/src/nouveau/compiler/nak/sm50.rs +++ b/src/nouveau/compiler/nak/sm50.rs @@ -2692,9 +2692,8 @@ impl SM50Op for OpAL2P { e.set_dst(self.dst); e.set_reg_src(8..16, self.offset); - e.set_field(20..31, self.access.addr); - assert!(!self.access.patch); - e.set_bit(32, self.access.output); + e.set_field(20..31, self.addr); + e.set_bit(32, self.output); e.set_field(47..49, 0_u8); // comps e.set_pred_dst(44..47, Dst::None); @@ -2710,19 +2709,19 @@ impl SM50Op for OpALd { e.set_opcode(0xefd8); e.set_dst(self.dst); - if self.access.phys { - assert!(!self.access.patch); + if self.phys { + assert!(!self.patch); assert!(self.offset.src_ref.as_reg().is_some()); - } else if !self.access.patch { + } else if !self.patch { assert!(self.offset.is_zero()); } e.set_reg_src(8..16, self.offset); e.set_reg_src(39..47, self.vtx); - e.set_field(20..30, self.access.addr); - e.set_bit(31, self.access.patch); - e.set_bit(32, self.access.output); - e.set_field(47..49, self.access.comps - 1); + e.set_field(20..30, self.addr); + e.set_bit(31, self.patch); + e.set_bit(32, self.output); + e.set_field(47..49, self.comps - 1); } } @@ -2738,12 +2737,11 @@ impl SM50Op for OpASt { e.set_reg_src(8..16, self.offset); e.set_reg_src(39..47, self.vtx); - assert!(!self.access.phys); - assert!(self.access.output); - e.set_field(20..30, self.access.addr); - e.set_bit(31, self.access.patch); - e.set_bit(32, self.access.output); - e.set_field(47..49, self.access.comps - 1); + assert!(!self.phys); + e.set_field(20..30, self.addr); + e.set_bit(31, self.patch); + e.set_bit(32, true); // output + e.set_field(47..49, self.comps - 1); } } diff --git a/src/nouveau/compiler/nak/sm70.rs b/src/nouveau/compiler/nak/sm70.rs index 03429be8ed5..1177052f7db 100644 --- a/src/nouveau/compiler/nak/sm70.rs +++ b/src/nouveau/compiler/nak/sm70.rs @@ -3128,10 +3128,9 @@ impl SM70Op for OpAL2P { e.set_dst(self.dst); e.set_reg_src(24..32, self.offset); - e.set_field(40..50, self.access.addr); + e.set_field(40..50, self.addr); e.set_field(74..76, 0_u8); // comps - assert!(!self.access.patch); - e.set_bit(79, self.access.output); + e.set_bit(79, self.output); } } @@ -3147,11 +3146,11 @@ impl SM70Op for OpALd { e.set_reg_src(32..40, self.vtx); e.set_reg_src(24..32, self.offset); - e.set_field(40..50, self.access.addr); - e.set_field(74..76, self.access.comps - 1); - e.set_field(76..77, self.access.patch); - e.set_field(77..78, self.access.phys); - e.set_field(79..80, self.access.output); + e.set_field(40..50, self.addr); + e.set_field(74..76, self.comps - 1); + e.set_field(76..77, self.patch); + e.set_field(77..78, self.phys); + e.set_field(79..80, self.output); } } @@ -3167,11 +3166,10 @@ impl SM70Op for OpASt { e.set_reg_src(64..72, self.vtx); e.set_reg_src(24..32, self.offset); - e.set_field(40..50, self.access.addr); - e.set_field(74..76, self.access.comps - 1); - e.set_field(76..77, self.access.patch); - e.set_field(77..78, self.access.phys); - assert!(self.access.output); + e.set_field(40..50, self.addr); + e.set_field(74..76, self.comps - 1); + e.set_field(76..77, self.patch); + e.set_field(77..78, self.phys); } }