diff --git a/src/compiler/nir/nir_builder.c b/src/compiler/nir/nir_builder.c index 2934e2de700..484a65e3c07 100644 --- a/src/compiler/nir/nir_builder.c +++ b/src/compiler/nir/nir_builder.c @@ -347,7 +347,7 @@ nir_vec_scalars(nir_builder *build, nir_ssa_scalar *comp, unsigned num_component nir_ssa_def * nir_ssa_for_src(nir_builder *build, nir_src src, int num_components) { - if (src.is_ssa && src.ssa->num_components == num_components) + if (src.ssa->num_components == num_components) return src.ssa; assert((unsigned)num_components <= nir_src_num_components(src)); diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 2719cafac88..cb74c635aaf 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -498,7 +498,7 @@ nir_vec_scalars(nir_builder *build, nir_ssa_scalar *comp, unsigned num_component static inline nir_ssa_def * nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components) { - if (src.src.is_ssa && src.src.ssa->num_components == num_components) { + if (src.src.ssa->num_components == num_components) { bool any_swizzles = false; for (unsigned i = 0; i < num_components; i++) { if (src.swizzle[i] != i) diff --git a/src/compiler/nir/nir_control_flow.c b/src/compiler/nir/nir_control_flow.c index ad2fca98067..d04026a7f00 100644 --- a/src/compiler/nir/nir_control_flow.c +++ b/src/compiler/nir/nir_control_flow.c @@ -567,13 +567,8 @@ update_if_uses(nir_cf_node *node) nir_if *if_stmt = nir_cf_node_as_if(node); nir_src_set_parent_if(&if_stmt->condition, if_stmt); - if (if_stmt->condition.is_ssa) { - list_addtail(&if_stmt->condition.use_link, - &if_stmt->condition.ssa->uses); - } else { - list_addtail(&if_stmt->condition.use_link, - &if_stmt->condition.reg.reg->uses); - } + list_addtail(&if_stmt->condition.use_link, + &if_stmt->condition.ssa->uses); } /** diff --git a/src/compiler/nir/nir_gather_ssa_types.c b/src/compiler/nir/nir_gather_ssa_types.c index c07f303f039..fcfac1ee268 100644 --- a/src/compiler/nir/nir_gather_ssa_types.c +++ b/src/compiler/nir/nir_gather_ssa_types.c @@ -77,10 +77,8 @@ copy_types(nir_src src, nir_dest *dest, BITSET_WORD *float_types, BITSET_WORD *int_types, bool *progress) { bool src_is_sink = nir_src_is_const(src) || nir_src_is_undef(src); - if (src.is_ssa && dest->is_ssa) { - copy_type(src.ssa->index, dest->ssa.index, src_is_sink, float_types, progress); - copy_type(src.ssa->index, dest->ssa.index, src_is_sink, int_types, progress); - } + copy_type(src.ssa->index, dest->ssa.index, src_is_sink, float_types, progress); + copy_type(src.ssa->index, dest->ssa.index, src_is_sink, int_types, progress); } /** Gather up ALU types for SSA values diff --git a/src/compiler/nir/nir_liveness.c b/src/compiler/nir/nir_liveness.c index 43f0594bc94..b5e999a2df2 100644 --- a/src/compiler/nir/nir_liveness.c +++ b/src/compiler/nir/nir_liveness.c @@ -258,7 +258,7 @@ nir_get_live_ssa_defs(nir_cursor cursor, void *mem_ctx) static bool src_does_not_use_def(nir_src *src, void *def) { - return !src->is_ssa || src->ssa != (nir_ssa_def *)def; + return src->ssa != (nir_ssa_def *)def; } static bool @@ -277,8 +277,7 @@ search_for_use_after_instr(nir_instr *start, nir_ssa_def *def) * so we need to also check the following if condition, if any. */ nir_if *following_if = nir_block_get_following_if(start->block); - if (following_if && following_if->condition.is_ssa && - following_if->condition.ssa == def) + if (following_if && following_if->condition.ssa == def) return true; return false; diff --git a/src/compiler/nir/nir_opt_dce.c b/src/compiler/nir/nir_opt_dce.c index eff84d565ac..6d79464b0bd 100644 --- a/src/compiler/nir/nir_opt_dce.c +++ b/src/compiler/nir/nir_opt_dce.c @@ -30,13 +30,13 @@ static bool is_dest_live(const nir_dest *dest, BITSET_WORD *defs_live) { - return !dest->is_ssa || BITSET_TEST(defs_live, dest->ssa.index); + return BITSET_TEST(defs_live, dest->ssa.index); } static bool mark_src_live(const nir_src *src, BITSET_WORD *defs_live) { - if (src->is_ssa && !BITSET_TEST(defs_live, src->ssa->index)) { + if (!BITSET_TEST(defs_live, src->ssa->index)) { BITSET_SET(defs_live, src->ssa->index); return true; } else { diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index 304edeabb01..0b4735e404b 100644 --- a/src/compiler/nir/nir_opt_if.c +++ b/src/compiler/nir/nir_opt_if.c @@ -1467,11 +1467,11 @@ opt_if_merge(nir_if *nif) bool progress = false; nir_block *next_blk = nir_cf_node_cf_tree_next(&nif->cf_node); - if (!next_blk || !nif->condition.is_ssa) + if (!next_blk) return false; nir_if *next_if = nir_block_get_following_if(next_blk); - if (!next_if || !next_if->condition.is_ssa) + if (!next_if) return false; /* Here we merge two consecutive ifs that have the same condition e.g: diff --git a/src/compiler/nir/nir_opt_move.c b/src/compiler/nir/nir_opt_move.c index e30df42e7b2..76fc2d9da39 100644 --- a/src/compiler/nir/nir_opt_move.c +++ b/src/compiler/nir/nir_opt_move.c @@ -51,18 +51,6 @@ * lower register pressure. */ -static inline bool -src_is_ssa(nir_src *src, void *state) -{ - return src->is_ssa; -} - -static inline bool -instr_reads_register(nir_instr *instr) -{ - return !nir_foreach_src(instr, src_is_ssa, NULL); -} - static bool nir_opt_move_block(nir_block *block, nir_move_options options) { @@ -80,16 +68,9 @@ nir_opt_move_block(nir_block *block, nir_move_options options) * the original order is kept. */ unsigned index = 1; - unsigned last_reg_def_index = 0; nir_foreach_instr_reverse_safe(instr, block) { instr->index = index++; - /* Don't move register defs */ - if (nir_instr_def_is_register(instr)) { - last_reg_def_index = instr->index; - continue; - } - /* Check if this instruction can be moved downwards */ if (!nir_can_move_instr(instr, options)) continue; @@ -114,12 +95,6 @@ nir_opt_move_block(nir_block *block, nir_move_options options) if (nir_instr_prev(first_user) == instr) continue; - /* Don't move register reads past register defs */ - if (first_user->index < last_reg_def_index && - instr_reads_register(instr)) { - continue; - } - /* Insert the instruction before it's first user */ exec_node_remove(&instr->node); instr->index = first_user->index; diff --git a/src/compiler/nir/nir_opt_offsets.c b/src/compiler/nir/nir_opt_offsets.c index ff35958d52d..20e5af5840d 100644 --- a/src/compiler/nir/nir_opt_offsets.c +++ b/src/compiler/nir/nir_opt_offsets.c @@ -43,9 +43,7 @@ try_extract_const_addition(nir_builder *b, nir_ssa_scalar val, opt_offsets_state return val; nir_alu_instr *alu = nir_instr_as_alu(val.def->parent_instr); - if (alu->op != nir_op_iadd || - !alu->src[0].src.is_ssa || - !alu->src[1].src.is_ssa) + if (alu->op != nir_op_iadd) return val; nir_ssa_scalar src[2] = { @@ -115,7 +113,7 @@ try_fold_load_store(nir_builder *b, nir_src *off_src = &intrin->src[offset_src_idx]; nir_ssa_def *replace_src = NULL; - if (!off_src->is_ssa || off_src->ssa->bit_size != 32) + if (off_src->ssa->bit_size != 32) return false; if (!nir_src_is_const(*off_src)) { diff --git a/src/compiler/nir/nir_opt_shrink_stores.c b/src/compiler/nir/nir_opt_shrink_stores.c index 43fac98c467..288e58337f6 100644 --- a/src/compiler/nir/nir_opt_shrink_stores.c +++ b/src/compiler/nir/nir_opt_shrink_stores.c @@ -82,7 +82,7 @@ opt_shrink_store_instr(nir_builder *b, nir_intrinsic_instr *instr, bool shrink_i /* Trim the num_components stored according to the write mask. */ unsigned write_mask = nir_intrinsic_write_mask(instr); unsigned last_bit = util_last_bit(write_mask); - if (last_bit < instr->num_components && instr->src[0].is_ssa) { + if (last_bit < instr->num_components) { nir_ssa_def *def = nir_trim_vector(b, instr->src[0].ssa, last_bit); nir_instr_rewrite_src(&instr->instr, &instr->src[0], diff --git a/src/compiler/nir/nir_opt_undef.c b/src/compiler/nir/nir_opt_undef.c index 50a4f4a365f..6ce9b4bdb4f 100644 --- a/src/compiler/nir/nir_opt_undef.c +++ b/src/compiler/nir/nir_opt_undef.c @@ -76,8 +76,7 @@ opt_undef_vecN(nir_builder *b, nir_alu_instr *alu) return false; for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (!alu->src[i].src.is_ssa || - alu->src[i].src.ssa->parent_instr->type != nir_instr_type_ssa_undef) + if (alu->src[i].src.ssa->parent_instr->type != nir_instr_type_ssa_undef) return false; } @@ -105,8 +104,7 @@ nir_get_undef_mask(nir_ssa_def *def) if (nir_op_is_vec(alu->op)) { for (int i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (alu->src[i].src.is_ssa && - alu->src[i].src.ssa->parent_instr->type == + if (alu->src[i].src.ssa->parent_instr->type == nir_instr_type_ssa_undef) { undef |= BITSET_MASK(nir_ssa_alu_instr_src_components(alu, i)) << i; } diff --git a/src/compiler/nir/nir_propagate_invariant.c b/src/compiler/nir/nir_propagate_invariant.c index 1d9e122a298..9944996b174 100644 --- a/src/compiler/nir/nir_propagate_invariant.c +++ b/src/compiler/nir/nir_propagate_invariant.c @@ -26,11 +26,7 @@ static void add_src(nir_src *src, struct set *invariants) { - if (src->is_ssa) { - _mesa_set_add(invariants, src->ssa); - } else { - _mesa_set_add(invariants, src->reg.reg); - } + _mesa_set_add(invariants, src->ssa); } static bool @@ -43,11 +39,7 @@ add_src_cb(nir_src *src, void *state) static bool dest_is_invariant(nir_dest *dest, struct set *invariants) { - if (dest->is_ssa) { - return _mesa_set_search(invariants, &dest->ssa); - } else { - return _mesa_set_search(invariants, dest->reg.reg); - } + return _mesa_set_search(invariants, &dest->ssa); } static void diff --git a/src/compiler/nir/nir_serialize.c b/src/compiler/nir/nir_serialize.c index e46f44c31e7..76238c91d26 100644 --- a/src/compiler/nir/nir_serialize.c +++ b/src/compiler/nir/nir_serialize.c @@ -911,8 +911,7 @@ write_deref(write_ctx *ctx, const nir_deref_instr *deref) if (deref->deref_type == nir_deref_type_array || deref->deref_type == nir_deref_type_ptr_as_array) { - header.deref.packed_src_ssa_16bit = - deref->arr.index.is_ssa && are_object_ids_16bit(ctx); + header.deref.packed_src_ssa_16bit = are_object_ids_16bit(ctx); header.deref.in_bounds = deref->arr.in_bounds; }