diff --git a/src/panfrost/bifrost/ISA.xml b/src/panfrost/bifrost/ISA.xml
index 27e22a853ab..b5965fd3ce4 100644
--- a/src/panfrost/bifrost/ISA.xml
+++ b/src/panfrost/bifrost/ISA.xml
@@ -2516,10 +2516,12 @@
 
   <ins name="+BARRIER" mask="0xfffff" exact="0xd7874" message="barrier" last="true" dests="0"/>
 
-  <ins name="+BLEND" staging="r=4" mask="0xffe00" exact="0xca800" message="blend" last="true">
+  <ins name="+BLEND" staging="r=sr_count" mask="0xffe00" exact="0xca800" message="blend" last="true">
     <src start="0"/>
     <src start="3" mask="0xf7"/>
     <src start="6" mask="0xf7"/>
+    <!-- not actually encoded, but used for IR -->
+    <immediate name="sr_count" size="4" pseudo="true"/>
   </ins>
 
   <ins name="+BRANCH.f16" mask="0xf8000" exact="0x68000" last="true" dests="0">
diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c
index 6f911b28f64..8300753a32a 100644
--- a/src/panfrost/bifrost/bi_schedule.c
+++ b/src/panfrost/bifrost/bi_schedule.c
@@ -1658,7 +1658,7 @@ bi_test_units(bi_builder *b)
                 assert(bi_reads_t(load, i));
         }
 
-        bi_instr *blend = bi_blend_to(b, TMP(), TMP(), TMP(), TMP(), TMP());
+        bi_instr *blend = bi_blend_to(b, TMP(), TMP(), TMP(), TMP(), TMP(), 4);
         assert(!bi_can_fma(load));
         assert(bi_can_add(load));
         assert(bi_must_last(blend));
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 6478051a461..dec42ca8a99 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -380,6 +380,9 @@ bi_emit_load_blend_input(bi_builder *b, nir_intrinsic_instr *instr)
 static void
 bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T, unsigned rt)
 {
+        /* Reads 2 or 4 staging registers to cover the input */
+        unsigned sr_count = (nir_alu_type_get_type_size(T) <= 16) ? 2 : 4;
+
         if (b->shader->inputs->is_blend) {
                 uint64_t blend_desc = b->shader->inputs->blend.bifrost_blend_desc;
 
@@ -388,7 +391,7 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T, unsigned rt)
                 bi_blend_to(b, bi_register(0), rgba,
                                 bi_register(60) /* TODO RA */,
                                 bi_imm_u32(blend_desc & 0xffffffff),
-                                bi_imm_u32(blend_desc >> 32));
+                                bi_imm_u32(blend_desc >> 32), sr_count);
         } else {
                 /* Blend descriptor comes from the FAU RAM. By convention, the
                  * return address is stored in r48 and will be used by the
@@ -396,7 +399,7 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T, unsigned rt)
                 bi_blend_to(b, bi_register(48), rgba,
                                 bi_register(60) /* TODO RA */,
                                 bi_fau(BIR_FAU_BLEND_0 + rt, false),
-                                bi_fau(BIR_FAU_BLEND_0 + rt, true));
+                                bi_fau(BIR_FAU_BLEND_0 + rt, true), sr_count);
         }
 
         assert(rt < 8);