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aco: fix disassembly of SMEM with both SGPR and constant offset

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15890>
This commit is contained in:
Rhys Perry
2022-04-12 15:19:40 +01:00
committed by Marge Bot
parent c7eaf03068
commit 63e40adf8c
2 changed files with 42 additions and 0 deletions
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src/amd/compiler/tests/test_assembler.cpp
+25
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@@ -266,3 +266,28 @@ BEGIN_TEST(assembler.v_add3_clamp)
finish_assembler_test();
}
END_TEST
BEGIN_TEST(assembler.smem_offset)
for (unsigned i = GFX9; i <= GFX10; i++) {
if (!setup_cs(NULL, (chip_class)i))
continue;
Definition dst(PhysReg(7), s1);
Operand sbase(PhysReg(6), s2);
Operand offset(PhysReg(5), s1);
//~gfx9>> s_load_dword s7, s[6:7], s5 ; c00001c3 00000005
//~gfx10>> s_load_dword s7, s[6:7], s5 ; f40001c3 0a000000
bld.smem(aco_opcode::s_load_dword, dst, sbase, offset);
//~gfx9! s_load_dword s7, s[6:7], 0x42 ; c00201c3 00000042
//~gfx10! s_load_dword s7, s[6:7], 0x42 ; f40001c3 fa000042
bld.smem(aco_opcode::s_load_dword, dst, sbase, Operand::c32(0x42));
if (i >= GFX9) {
//~gfx9! s_load_dword s7, s[6:7], 0x42, s5 ; c00241c3 0a000042
//~gfx10! s_load_dword s7, s[6:7], s5, 0x42 ; f40001c3 0a000042
bld.smem(aco_opcode::s_load_dword, dst, sbase, Operand::c32(0x42), offset);
}
finish_assembler_test();
}
END_TEST