diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c
index b60b05ebaf7..60b9f7faad4 100644
--- a/src/gallium/drivers/iris/iris_batch.c
+++ b/src/gallium/drivers/iris/iris_batch.c
@@ -541,7 +541,7 @@ finish_seqno(struct iris_batch *batch)
 static void
 iris_finish_batch(struct iris_batch *batch)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    if (devinfo->ver == 12 && batch->name == IRIS_BATCH_RENDER) {
       /* We re-emit constants at the beginning of every batch as a hardware
diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c
index 9caac8145ed..e22f64f0605 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -284,7 +284,7 @@ tex_cache_flush_hack(struct iris_batch *batch,
                      enum isl_format view_format,
                      enum isl_format surf_format)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    /* The WaSamplerCacheFlushBetweenRedescribedSurfaceReads workaround says:
     *
@@ -351,7 +351,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
 {
    struct iris_context *ice = (void *) ctx;
    struct iris_screen *screen = (struct iris_screen *)ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
    enum blorp_batch_flags blorp_flags = 0;
 
@@ -552,7 +552,7 @@ get_copy_region_aux_settings(struct iris_context *ice,
                              bool is_render_target)
 {
    struct iris_screen *screen = (void *) ice->ctx.screen;
-   struct gen_device_info *devinfo = &screen->devinfo;
+   struct intel_device_info *devinfo = &screen->devinfo;
 
    switch (res->aux.usage) {
    case ISL_AUX_USAGE_HIZ:
diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c
index a2d769750f0..cd6f1de0ca3 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.c
+++ b/src/gallium/drivers/iris/iris_bufmgr.c
@@ -1882,7 +1882,7 @@ gem_param(int fd, int name)
  * \param fd File descriptor of the opened DRM device.
  */
 static struct iris_bufmgr *
-iris_bufmgr_create(struct gen_device_info *devinfo, int fd, bool bo_reuse)
+iris_bufmgr_create(struct intel_device_info *devinfo, int fd, bool bo_reuse)
 {
    uint64_t gtt_size = iris_gtt_size(fd);
    if (gtt_size <= IRIS_MEMZONE_OTHER_START)
@@ -1988,7 +1988,7 @@ iris_bufmgr_unref(struct iris_bufmgr *bufmgr)
  * \param fd File descriptor of the opened DRM device.
  */
 struct iris_bufmgr *
-iris_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd, bool bo_reuse)
+iris_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd, bool bo_reuse)
 {
    struct stat st;
 
diff --git a/src/gallium/drivers/iris/iris_bufmgr.h b/src/gallium/drivers/iris/iris_bufmgr.h
index 7991e3cbaac..e658e34dc1b 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.h
+++ b/src/gallium/drivers/iris/iris_bufmgr.h
@@ -35,7 +35,7 @@
 #include "pipe/p_defines.h"
 
 struct iris_batch;
-struct gen_device_info;
+struct intel_device_info;
 struct pipe_debug_callback;
 
 /**
@@ -370,7 +370,7 @@ int iris_bo_busy(struct iris_bo *bo);
 int iris_bo_madvise(struct iris_bo *bo, int madv);
 
 /* drm_bacon_bufmgr_gem.c */
-struct iris_bufmgr *iris_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd,
+struct iris_bufmgr *iris_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd,
                                            bool bo_reuse);
 int iris_bufmgr_get_fd(struct iris_bufmgr *bufmgr);
 
diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index a2901d617bc..cc619b46a0c 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -41,7 +41,7 @@ iris_is_color_fast_clear_compatible(struct iris_context *ice,
                                     const union isl_color_value color)
 {
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    if (isl_format_has_int_channel(format)) {
       perf_debug(&ice->dbg, "Integer fast clear not enabled for %s\n",
@@ -343,7 +343,7 @@ clear_color(struct iris_context *ice,
    struct iris_resource *res = (void *) p_res;
 
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    enum blorp_batch_flags blorp_flags = 0;
 
    if (render_condition_enabled) {
@@ -415,7 +415,7 @@ can_fast_clear_depth(struct iris_context *ice,
    struct pipe_resource *p_res = (void *) res;
    struct pipe_context *ctx = (void *) ice;
    struct iris_screen *screen = (void *) ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
       return false;
@@ -697,7 +697,7 @@ iris_clear_texture(struct pipe_context *ctx,
    struct iris_context *ice = (void *) ctx;
    struct iris_screen *screen = (void *) ctx->screen;
    struct iris_resource *res = (void *) p_res;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (iris_resource_unfinished_aux_import(res))
       iris_resource_finish_aux_import(ctx->screen, res);
diff --git a/src/gallium/drivers/iris/iris_context.c b/src/gallium/drivers/iris/iris_context.c
index 607711ede82..e88170278b4 100644
--- a/src/gallium/drivers/iris/iris_context.c
+++ b/src/gallium/drivers/iris/iris_context.c
@@ -270,7 +270,7 @@ struct pipe_context *
 iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
 {
    struct iris_screen *screen = (struct iris_screen*)pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_context *ice = rzalloc(NULL, struct iris_context);
 
    if (!ice)
diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c
index f1502703f62..ab8d7548b80 100644
--- a/src/gallium/drivers/iris/iris_draw.c
+++ b/src/gallium/drivers/iris/iris_draw.c
@@ -254,7 +254,7 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info,
 
    struct iris_context *ice = (struct iris_context *) ctx;
    struct iris_screen *screen = (struct iris_screen*)ice->ctx.screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
 
    if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
diff --git a/src/gallium/drivers/iris/iris_formats.c b/src/gallium/drivers/iris/iris_formats.c
index 88175a674ed..3a209d0d1e4 100644
--- a/src/gallium/drivers/iris/iris_formats.c
+++ b/src/gallium/drivers/iris/iris_formats.c
@@ -35,7 +35,7 @@
 #include "iris_screen.h"
 
 struct iris_format_info
-iris_format_for_usage(const struct gen_device_info *devinfo,
+iris_format_for_usage(const struct intel_device_info *devinfo,
                       enum pipe_format pformat,
                       isl_surf_usage_flags_t usage)
 {
@@ -111,7 +111,7 @@ iris_is_format_supported(struct pipe_screen *pscreen,
                          unsigned usage)
 {
    struct iris_screen *screen = (struct iris_screen *) pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    uint32_t max_samples = devinfo->ver == 8 ? 8 : 16;
 
    if (sample_count > max_samples ||
diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c
index 96a197b06b5..52d6dcceb9b 100644
--- a/src/gallium/drivers/iris/iris_program.c
+++ b/src/gallium/drivers/iris/iris_program.c
@@ -61,7 +61,7 @@ get_new_program_id(struct iris_screen *screen)
 }
 
 static struct brw_vs_prog_key
-iris_to_brw_vs_key(const struct gen_device_info *devinfo,
+iris_to_brw_vs_key(const struct intel_device_info *devinfo,
                    const struct iris_vs_prog_key *key)
 {
    return (struct brw_vs_prog_key) {
@@ -75,7 +75,7 @@ iris_to_brw_vs_key(const struct gen_device_info *devinfo,
 }
 
 static struct brw_tcs_prog_key
-iris_to_brw_tcs_key(const struct gen_device_info *devinfo,
+iris_to_brw_tcs_key(const struct intel_device_info *devinfo,
                     const struct iris_tcs_prog_key *key)
 {
    return (struct brw_tcs_prog_key) {
@@ -89,7 +89,7 @@ iris_to_brw_tcs_key(const struct gen_device_info *devinfo,
 }
 
 static struct brw_tes_prog_key
-iris_to_brw_tes_key(const struct gen_device_info *devinfo,
+iris_to_brw_tes_key(const struct intel_device_info *devinfo,
                     const struct iris_tes_prog_key *key)
 {
    return (struct brw_tes_prog_key) {
@@ -100,7 +100,7 @@ iris_to_brw_tes_key(const struct gen_device_info *devinfo,
 }
 
 static struct brw_gs_prog_key
-iris_to_brw_gs_key(const struct gen_device_info *devinfo,
+iris_to_brw_gs_key(const struct intel_device_info *devinfo,
                    const struct iris_gs_prog_key *key)
 {
    return (struct brw_gs_prog_key) {
@@ -109,7 +109,7 @@ iris_to_brw_gs_key(const struct gen_device_info *devinfo,
 }
 
 static struct brw_wm_prog_key
-iris_to_brw_fs_key(const struct gen_device_info *devinfo,
+iris_to_brw_fs_key(const struct intel_device_info *devinfo,
                    const struct iris_fs_prog_key *key)
 {
    return (struct brw_wm_prog_key) {
@@ -130,7 +130,7 @@ iris_to_brw_fs_key(const struct gen_device_info *devinfo,
 }
 
 static struct brw_cs_prog_key
-iris_to_brw_cs_key(const struct gen_device_info *devinfo,
+iris_to_brw_cs_key(const struct intel_device_info *devinfo,
                    const struct iris_cs_prog_key *key)
 {
    return (struct brw_cs_prog_key) {
@@ -385,7 +385,7 @@ iris_setup_uniforms(const struct brw_compiler *compiler,
                     unsigned *out_num_system_values,
                     unsigned *out_num_cbufs)
 {
-   UNUSED const struct gen_device_info *devinfo = compiler->devinfo;
+   UNUSED const struct intel_device_info *devinfo = compiler->devinfo;
 
    unsigned system_values_start = ALIGN(kernel_input_size, sizeof(uint32_t));
 
@@ -790,7 +790,7 @@ skip_compacting_binding_tables(void)
  * Set up the binding table indices and apply to the shader.
  */
 static void
-iris_setup_binding_table(const struct gen_device_info *devinfo,
+iris_setup_binding_table(const struct intel_device_info *devinfo,
                          struct nir_shader *nir,
                          struct iris_binding_table *bt,
                          unsigned num_render_targets,
@@ -1030,7 +1030,7 @@ iris_debug_recompile(struct iris_screen *screen,
             || list_is_singular(&ish->variants))
       return;
 
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    const struct brw_compiler *c = screen->compiler;
    const struct shader_info *info = &ish->nir->info;
 
@@ -1161,7 +1161,7 @@ iris_compile_vs(struct iris_screen *screen,
                 const struct iris_vs_prog_key *key)
 {
    const struct brw_compiler *compiler = screen->compiler;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    void *mem_ctx = ralloc_context(NULL);
    struct brw_vs_prog_data *vs_prog_data =
       rzalloc(mem_ctx, struct brw_vs_prog_data);
@@ -1341,7 +1341,7 @@ iris_compile_tcs(struct iris_screen *screen,
       rzalloc(mem_ctx, struct brw_tcs_prog_data);
    struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base;
    struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    enum brw_param_builtin *system_values = NULL;
    unsigned num_system_values = 0;
    unsigned num_cbufs = 0;
@@ -1437,7 +1437,7 @@ iris_update_compiled_tcs(struct iris_context *ice)
    struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
    struct u_upload_mgr *uploader = ice->shaders.uploader_driver;
    const struct brw_compiler *compiler = screen->compiler;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    const struct shader_info *tes_info =
       iris_get_shader_info(ice, MESA_SHADER_TESS_EVAL);
@@ -1499,7 +1499,7 @@ iris_compile_tes(struct iris_screen *screen,
    struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
    struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
    enum brw_param_builtin *system_values;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    unsigned num_system_values;
    unsigned num_cbufs;
 
@@ -1620,7 +1620,7 @@ iris_compile_gs(struct iris_screen *screen,
                 const struct iris_gs_prog_key *key)
 {
    const struct brw_compiler *compiler = screen->compiler;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    void *mem_ctx = ralloc_context(NULL);
    struct brw_gs_prog_data *gs_prog_data =
       rzalloc(mem_ctx, struct brw_gs_prog_data);
@@ -1747,7 +1747,7 @@ iris_compile_fs(struct iris_screen *screen,
       rzalloc(mem_ctx, struct brw_wm_prog_data);
    struct brw_stage_prog_data *prog_data = &fs_prog_data->base;
    enum brw_param_builtin *system_values;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    unsigned num_system_values;
    unsigned num_cbufs;
 
@@ -2033,7 +2033,7 @@ iris_compile_cs(struct iris_screen *screen,
       rzalloc(mem_ctx, struct brw_cs_prog_data);
    struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
    enum brw_param_builtin *system_values;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    unsigned num_system_values;
    unsigned num_cbufs;
 
@@ -2146,7 +2146,7 @@ iris_get_scratch_space(struct iris_context *ice,
 {
    struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
    struct iris_bufmgr *bufmgr = screen->bufmgr;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    unsigned encoded_size = ffs(per_thread_scratch) - 11;
    assert(encoded_size < (1 << 16));
@@ -2228,7 +2228,7 @@ iris_create_uncompiled_shader(struct iris_screen *screen,
                               nir_shader *nir,
                               const struct pipe_stream_output_info *so_info)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    struct iris_uncompiled_shader *ish =
       calloc(1, sizeof(struct iris_uncompiled_shader));
@@ -2433,7 +2433,7 @@ iris_create_fs_state(struct pipe_context *ctx,
       bool can_rearrange_varyings =
          util_bitcount64(info->inputs_read & BRW_FS_VARYING_INPUT_MASK) <= 16;
 
-      const struct gen_device_info *devinfo = &screen->devinfo;
+      const struct intel_device_info *devinfo = &screen->devinfo;
       struct iris_fs_prog_key key = {
          KEY_ID(base),
          .nr_color_regions = util_bitcount(color_outputs),
@@ -2682,7 +2682,7 @@ iris_bind_fs_state(struct pipe_context *ctx, void *state)
 {
    struct iris_context *ice = (struct iris_context *) ctx;
    struct iris_screen *screen = (struct iris_screen *) ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_uncompiled_shader *old_ish =
       ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
    struct iris_uncompiled_shader *new_ish = state;
diff --git a/src/gallium/drivers/iris/iris_program_cache.c b/src/gallium/drivers/iris/iris_program_cache.c
index e985ac56134..5388615c47e 100644
--- a/src/gallium/drivers/iris/iris_program_cache.c
+++ b/src/gallium/drivers/iris/iris_program_cache.c
@@ -123,7 +123,7 @@ iris_upload_shader(struct iris_screen *screen,
                    unsigned num_cbufs,
                    const struct iris_binding_table *bt)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    void *mem_ctx = ish ? NULL : (void *) driver_shaders;
    struct iris_compiled_shader *shader =
diff --git a/src/gallium/drivers/iris/iris_query.c b/src/gallium/drivers/iris/iris_query.c
index 9e161ae134d..ee80b2ff2cd 100644
--- a/src/gallium/drivers/iris/iris_query.c
+++ b/src/gallium/drivers/iris/iris_query.c
@@ -156,7 +156,7 @@ iris_pipelined_write(struct iris_batch *batch,
                      enum pipe_control_flags flags,
                      unsigned offset)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    const unsigned optional_cs_stall =
       GFX_VER == 9 && devinfo->gt == 4 ?  PIPE_CONTROL_CS_STALL : 0;
    struct iris_bo *bo = iris_resource_bo(q->query_state_ref.res);
@@ -286,7 +286,7 @@ stream_overflowed(struct iris_query_so_overflow *so, int s)
 }
 
 static void
-calculate_result_on_cpu(const struct gen_device_info *devinfo,
+calculate_result_on_cpu(const struct intel_device_info *devinfo,
                         struct iris_query *q)
 {
    switch (q->type) {
@@ -297,12 +297,12 @@ calculate_result_on_cpu(const struct gen_device_info *devinfo,
    case PIPE_QUERY_TIMESTAMP:
    case PIPE_QUERY_TIMESTAMP_DISJOINT:
       /* The timestamp is the single starting snapshot. */
-      q->result = gen_device_info_timebase_scale(devinfo, q->map->start);
+      q->result = intel_device_info_timebase_scale(devinfo, q->map->start);
       q->result &= (1ull << TIMESTAMP_BITS) - 1;
       break;
    case PIPE_QUERY_TIME_ELAPSED:
       q->result = iris_raw_timestamp_delta(q->map->start, q->map->end);
-      q->result = gen_device_info_timebase_scale(devinfo, q->result);
+      q->result = intel_device_info_timebase_scale(devinfo, q->result);
       q->result &= (1ull << TIMESTAMP_BITS) - 1;
       break;
    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
@@ -385,7 +385,7 @@ query_is_boolean(enum pipe_query_type type)
  * Calculate the result using MI_MATH.
  */
 static struct mi_value
-calculate_result_on_gpu(const struct gen_device_info *devinfo,
+calculate_result_on_gpu(const struct intel_device_info *devinfo,
                         struct mi_builder *b,
                         struct iris_query *q)
 {
@@ -590,7 +590,7 @@ static void
 iris_check_query_no_flush(struct iris_context *ice, struct iris_query *q)
 {
    struct iris_screen *screen = (void *) ice->ctx.screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (!q->ready && READ_ONCE(q->map->snapshots_landed)) {
       calculate_result_on_cpu(devinfo, q);
@@ -610,7 +610,7 @@ iris_get_query_result(struct pipe_context *ctx,
       return iris_get_monitor_result(ctx, q->monitor, wait, result->batch);
 
    struct iris_screen *screen = (void *) ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (unlikely(screen->no_hw)) {
       result->u64 = 0;
@@ -660,7 +660,7 @@ iris_get_query_result_resource(struct pipe_context *ctx,
    struct iris_context *ice = (void *) ctx;
    struct iris_query *q = (void *) query;
    struct iris_batch *batch = &ice->batches[q->batch_idx];
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    struct iris_resource *res = (void *) p_res;
    struct iris_bo *query_bo = iris_resource_bo(q->query_state_ref.res);
    struct iris_bo *dst_bo = iris_resource_bo(p_res);
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 80ce6000bc9..aa87981a493 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -186,7 +186,7 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
 {
    struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
    struct iris_screen *screen = (void *) ice->ctx.screen;
-   struct gen_device_info *devinfo = &screen->devinfo;
+   struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_uncompiled_shader *ish =
       ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
    const nir_shader *nir = ish->nir;
@@ -444,7 +444,7 @@ iris_mcs_partial_resolve(struct iris_context *ice,
 }
 
 bool
-iris_sample_with_depth_aux(const struct gen_device_info *devinfo,
+iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
                            const struct iris_resource *res)
 {
    switch (res->aux.usage) {
@@ -814,7 +814,7 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
                                 enum isl_format view_format)
 {
    struct iris_screen *screen = (void *) ice->ctx.screen;
-   struct gen_device_info *devinfo = &screen->devinfo;
+   struct intel_device_info *devinfo = &screen->devinfo;
 
    switch (res->aux.usage) {
    case ISL_AUX_USAGE_HIZ:
@@ -952,7 +952,7 @@ iris_resource_render_aux_usage(struct iris_context *ice,
                                bool draw_aux_disabled)
 {
    struct iris_screen *screen = (void *) ice->ctx.screen;
-   struct gen_device_info *devinfo = &screen->devinfo;
+   struct intel_device_info *devinfo = &screen->devinfo;
 
    if (draw_aux_disabled)
       return ISL_AUX_USAGE_NONE;
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 1cd96183228..914a47f6584 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -75,7 +75,7 @@ static const uint64_t priority_to_modifier[] = {
 };
 
 static bool
-modifier_is_supported(const struct gen_device_info *devinfo,
+modifier_is_supported(const struct intel_device_info *devinfo,
                       enum pipe_format pfmt, uint64_t modifier)
 {
    /* Check for basic device support. */
@@ -138,7 +138,7 @@ modifier_is_supported(const struct gen_device_info *devinfo,
 }
 
 static uint64_t
-select_best_modifier(struct gen_device_info *devinfo, enum pipe_format pfmt,
+select_best_modifier(struct intel_device_info *devinfo, enum pipe_format pfmt,
                      const uint64_t *modifiers,
                      int count)
 {
@@ -198,7 +198,7 @@ iris_query_dmabuf_modifiers(struct pipe_screen *pscreen,
                             int *count)
 {
    struct iris_screen *screen = (void *) pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    uint64_t all_modifiers[] = {
       DRM_FORMAT_MOD_LINEAR,
@@ -238,7 +238,7 @@ iris_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
                                   bool *external_only)
 {
    struct iris_screen *screen = (void *) pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (modifier_is_supported(devinfo, pfmt, modifier)) {
       if (external_only)
@@ -273,7 +273,7 @@ iris_image_view_get_format(struct iris_context *ice,
                            const struct pipe_image_view *img)
 {
    struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    isl_surf_usage_flags_t usage = ISL_SURF_USAGE_STORAGE_BIT;
    enum isl_format isl_fmt =
@@ -398,7 +398,7 @@ iris_get_depth_stencil_resources(struct pipe_resource *res,
 }
 
 enum isl_dim_layout
-iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
+iris_get_isl_dim_layout(const struct intel_device_info *devinfo,
                         enum isl_tiling tiling,
                         enum pipe_texture_target target)
 {
@@ -531,7 +531,7 @@ create_aux_state_map(struct iris_resource *res, enum isl_aux_state initial)
 static unsigned
 iris_get_aux_clear_color_state_size(struct iris_screen *screen)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    return devinfo->ver >= 10 ? screen->isl_dev.ss.clear_color_state_size : 0;
 }
 
@@ -539,7 +539,7 @@ static void
 map_aux_addresses(struct iris_screen *screen, struct iris_resource *res,
                   enum isl_format format, unsigned plane)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    if (devinfo->ver >= 12 && isl_aux_usage_has_ccs(res->aux.usage)) {
       void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
       assert(aux_map_ctx);
@@ -555,7 +555,7 @@ map_aux_addresses(struct iris_screen *screen, struct iris_resource *res,
 }
 
 static bool
-want_ccs_e_for_format(const struct gen_device_info *devinfo,
+want_ccs_e_for_format(const struct intel_device_info *devinfo,
                       enum isl_format format)
 {
    if (!isl_format_supports_ccs_e(devinfo, format))
@@ -671,7 +671,7 @@ static bool
 iris_resource_configure_aux(struct iris_screen *screen,
                             struct iris_resource *res, bool imported)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    /* Try to create the auxiliary surfaces allowed by the modifier or by
     * the user if no modifier is specified.
@@ -978,7 +978,7 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
                                     int modifiers_count)
 {
    struct iris_screen *screen = (struct iris_screen *)pscreen;
-   struct gen_device_info *devinfo = &screen->devinfo;
+   struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_resource *res = iris_alloc_resource(pscreen, templ);
 
    if (!res)
diff --git a/src/gallium/drivers/iris/iris_resource.h b/src/gallium/drivers/iris/iris_resource.h
index 7b146f0ce76..2526e267ac2 100644
--- a/src/gallium/drivers/iris/iris_resource.h
+++ b/src/gallium/drivers/iris/iris_resource.h
@@ -305,7 +305,7 @@ iris_mocs(const struct iris_bo *bo,
    return isl_mocs(dev, usage, bo && bo->external);
 }
 
-struct iris_format_info iris_format_for_usage(const struct gen_device_info *,
+struct iris_format_info iris_format_for_usage(const struct intel_device_info *,
                                               enum pipe_format pf,
                                               isl_surf_usage_flags_t usage);
 
@@ -459,7 +459,7 @@ iris_resource_access_raw(struct iris_context *ice,
    }
 }
 
-enum isl_dim_layout iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
+enum isl_dim_layout iris_get_isl_dim_layout(const struct intel_device_info *devinfo,
                                             enum isl_tiling tiling,
                                             enum pipe_texture_target target);
 static inline enum isl_surf_dim
@@ -522,7 +522,7 @@ void iris_resource_check_level_layer(const struct iris_resource *res,
 bool iris_resource_level_has_hiz(const struct iris_resource *res,
                                  uint32_t level);
 
-bool iris_sample_with_depth_aux(const struct gen_device_info *devinfo,
+bool iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
                                 const struct iris_resource *res);
 
 bool iris_has_color_unresolved(const struct iris_resource *res,
diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c
index b018e32ae64..88a1d0a7b13 100644
--- a/src/gallium/drivers/iris/iris_screen.c
+++ b/src/gallium/drivers/iris/iris_screen.c
@@ -113,7 +113,7 @@ static void
 iris_get_driver_uuid(struct pipe_screen *pscreen, char *uuid)
 {
    struct iris_screen *screen = (struct iris_screen *)pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    intel_uuid_compute_driver_id((uint8_t *)uuid, devinfo, PIPE_UUID_SIZE);
 }
@@ -158,7 +158,7 @@ static int
 iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 {
    struct iris_screen *screen = (struct iris_screen *)pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    switch (param) {
    case PIPE_CAP_NPOT_TEXTURES:
@@ -524,7 +524,7 @@ iris_get_compute_param(struct pipe_screen *pscreen,
                        void *ret)
 {
    struct iris_screen *screen = (struct iris_screen *)pscreen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    /* Limit max_threads to 64 for the GPGPU_WALKER command. */
    const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
@@ -611,7 +611,7 @@ iris_get_timestamp(struct pipe_screen *pscreen)
 
    iris_reg_read(screen->bufmgr, TIMESTAMP | 1, &result);
 
-   result = gen_device_info_timebase_scale(&screen->devinfo, result);
+   result = intel_device_info_timebase_scale(&screen->devinfo, result);
    result &= (1ull << TIMESTAMP_BITS) - 1;
 
    return result;
@@ -684,7 +684,7 @@ iris_getparam_integer(int fd, int param)
 }
 
 static const struct intel_l3_config *
-iris_get_default_l3_config(const struct gen_device_info *devinfo,
+iris_get_default_l3_config(const struct intel_device_info *devinfo,
                            bool compute)
 {
    bool wants_dc_cache = true;
@@ -848,7 +848,7 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
    slab_create_parent(&screen->transfer_pool,
                       sizeof(struct iris_transfer), 64);
 
-   screen->subslice_total = gen_device_info_subslice_total(&screen->devinfo);
+   screen->subslice_total = intel_device_info_subslice_total(&screen->devinfo);
    assert(screen->subslice_total >= 1);
 
    iris_detect_kernel_features(screen);
diff --git a/src/gallium/drivers/iris/iris_screen.h b/src/gallium/drivers/iris/iris_screen.h
index 116fe7695fe..c11175ef157 100644
--- a/src/gallium/drivers/iris/iris_screen.h
+++ b/src/gallium/drivers/iris/iris_screen.h
@@ -110,7 +110,7 @@ struct iris_vtable {
                                      uint32_t report_id);
 
    unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
-   void (*store_derived_program_state)(const struct gen_device_info *devinfo,
+   void (*store_derived_program_state)(const struct intel_device_info *devinfo,
                                        enum iris_program_cache_id cache_id,
                                        struct iris_compiled_shader *shader);
    uint32_t *(*create_so_decl_list)(const struct pipe_stream_output_info *sol,
@@ -198,7 +198,7 @@ struct iris_screen {
     */
    uint64_t last_seqno;
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    struct isl_device isl_dev;
    struct iris_bufmgr *bufmgr;
    struct brw_compiler *compiler;
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 8b1efc35b20..e00c6890d2a 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -382,7 +382,7 @@ emit_state(struct iris_batch *batch,
 static void
 flush_before_state_base_change(struct iris_batch *batch)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    /* Flush before emitting STATE_BASE_ADDRESS.
     *
@@ -838,7 +838,7 @@ calculate_pixel_hashing_table(unsigned n, unsigned m,
 static void
 gfx11_upload_pixel_hashing_tables(struct iris_batch *batch)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    assert(devinfo->ppipe_subslices[2] == 0);
 
    if (devinfo->ppipe_subslices[0] == devinfo->ppipe_subslices[1])
@@ -874,7 +874,7 @@ gfx11_upload_pixel_hashing_tables(struct iris_batch *batch)
 static void
 gfx12_upload_pixel_hashing_tables(struct iris_batch *batch)
 {
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    /* For each n calculate ppipes_of[n], equal to the number of pixel pipes
     * present with n active dual subslices.
     */
@@ -977,7 +977,7 @@ iris_init_common_context(struct iris_batch *batch)
 static void
 iris_init_render_context(struct iris_batch *batch)
 {
-   UNUSED const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    iris_batch_sync_region_start(batch);
 
@@ -1087,7 +1087,7 @@ iris_init_render_context(struct iris_batch *batch)
 static void
 iris_init_compute_context(struct iris_batch *batch)
 {
-   UNUSED const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
 
    iris_batch_sync_region_start(batch);
 
@@ -1511,7 +1511,7 @@ static bool
 want_pma_fix(struct iris_context *ice)
 {
    UNUSED struct iris_screen *screen = (void *) ice->ctx.screen;
-   UNUSED const struct gen_device_info *devinfo = &screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &screen->devinfo;
    const struct brw_wm_prog_data *wm_prog_data = (void *)
       ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data;
    const struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
@@ -2313,7 +2313,7 @@ update_surface_state_addrs(struct u_upload_mgr *mgr,
  * to the single slice of the texture being read.
  */
 static void
-get_rt_read_isl_surf(const struct gen_device_info *devinfo,
+get_rt_read_isl_surf(const struct intel_device_info *devinfo,
                      struct iris_resource *res,
                      enum pipe_texture_target target,
                      struct isl_view *view,
@@ -2413,7 +2413,7 @@ iris_create_sampler_view(struct pipe_context *ctx,
                          const struct pipe_sampler_view *tmpl)
 {
    struct iris_screen *screen = (struct iris_screen *)ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_sampler_view *isv = calloc(1, sizeof(struct iris_sampler_view));
 
    if (!isv)
@@ -2520,7 +2520,7 @@ iris_create_surface(struct pipe_context *ctx,
                     const struct pipe_surface *tmpl)
 {
    struct iris_screen *screen = (struct iris_screen *)ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    isl_surf_usage_flags_t usage = 0;
    if (tmpl->writable)
@@ -3549,7 +3549,7 @@ iris_create_vertex_elements(struct pipe_context *ctx,
                             const struct pipe_vertex_element *state)
 {
    struct iris_screen *screen = (struct iris_screen *)ctx->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_vertex_element_state *cso =
       malloc(sizeof(struct iris_vertex_element_state));
 
@@ -4364,7 +4364,7 @@ KSP(const struct iris_compiled_shader *shader)
  * Encode most of 3DSTATE_VS based on the compiled shader.
  */
 static void
-iris_store_vs_state(const struct gen_device_info *devinfo,
+iris_store_vs_state(const struct intel_device_info *devinfo,
                     struct iris_compiled_shader *shader)
 {
    struct brw_stage_prog_data *prog_data = shader->prog_data;
@@ -4383,7 +4383,7 @@ iris_store_vs_state(const struct gen_device_info *devinfo,
  * Encode most of 3DSTATE_HS based on the compiled shader.
  */
 static void
-iris_store_tcs_state(const struct gen_device_info *devinfo,
+iris_store_tcs_state(const struct intel_device_info *devinfo,
                      struct iris_compiled_shader *shader)
 {
    struct brw_stage_prog_data *prog_data = shader->prog_data;
@@ -4427,7 +4427,7 @@ iris_store_tcs_state(const struct gen_device_info *devinfo,
  * Encode 3DSTATE_TE and most of 3DSTATE_DS based on the compiled shader.
  */
 static void
-iris_store_tes_state(const struct gen_device_info *devinfo,
+iris_store_tes_state(const struct intel_device_info *devinfo,
                      struct iris_compiled_shader *shader)
 {
    struct brw_stage_prog_data *prog_data = shader->prog_data;
@@ -4464,7 +4464,7 @@ iris_store_tes_state(const struct gen_device_info *devinfo,
  * Encode most of 3DSTATE_GS based on the compiled shader.
  */
 static void
-iris_store_gs_state(const struct gen_device_info *devinfo,
+iris_store_gs_state(const struct intel_device_info *devinfo,
                     struct iris_compiled_shader *shader)
 {
    struct brw_stage_prog_data *prog_data = shader->prog_data;
@@ -4511,7 +4511,7 @@ iris_store_gs_state(const struct gen_device_info *devinfo,
  * Encode most of 3DSTATE_PS and 3DSTATE_PS_EXTRA based on the shader.
  */
 static void
-iris_store_fs_state(const struct gen_device_info *devinfo,
+iris_store_fs_state(const struct intel_device_info *devinfo,
                     struct iris_compiled_shader *shader)
 {
    struct brw_stage_prog_data *prog_data = shader->prog_data;
@@ -4571,7 +4571,7 @@ iris_store_fs_state(const struct gen_device_info *devinfo,
  * This must match the data written by the iris_store_xs_state() functions.
  */
 static void
-iris_store_cs_state(const struct gen_device_info *devinfo,
+iris_store_cs_state(const struct intel_device_info *devinfo,
                     struct iris_compiled_shader *shader)
 {
    struct brw_cs_prog_data *cs_prog_data = (void *) shader->prog_data;
@@ -4628,7 +4628,7 @@ iris_derived_program_state_size(enum iris_program_cache_id cache_id)
  * get most of the state packet without having to reconstruct it.
  */
 static void
-iris_store_derived_program_state(const struct gen_device_info *devinfo,
+iris_store_derived_program_state(const struct intel_device_info *devinfo,
                                  enum iris_program_cache_id cache_id,
                                  struct iris_compiled_shader *shader)
 {
@@ -6845,7 +6845,7 @@ iris_upload_compute_walker(struct iris_context *ice,
 {
    const uint64_t stage_dirty = ice->state.stage_dirty;
    struct iris_screen *screen = batch->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_binder *binder = &ice->state.binder;
    struct iris_shader_state *shs = &ice->state.shaders[MESA_SHADER_COMPUTE];
    struct iris_compiled_shader *shader =
@@ -6907,7 +6907,7 @@ iris_upload_gpgpu_walker(struct iris_context *ice,
 {
    const uint64_t stage_dirty = ice->state.stage_dirty;
    struct iris_screen *screen = batch->screen;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct iris_binder *binder = &ice->state.binder;
    struct iris_shader_state *shs = &ice->state.shaders[MESA_SHADER_COMPUTE];
    struct iris_uncompiled_shader *ish =
@@ -7408,7 +7408,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
                            uint32_t offset,
                            uint64_t imm)
 {
-   UNUSED const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
    enum pipe_control_flags post_sync_flags = get_post_sync_flags(flags);
    enum pipe_control_flags non_lri_post_sync_flags =
       post_sync_flags & ~PIPE_CONTROL_LRI_POST_SYNC_OP;
@@ -7921,7 +7921,7 @@ genX(emit_hashing_mode)(struct iris_context *ice, struct iris_batch *batch,
                         unsigned width, unsigned height, unsigned scale)
 {
 #if GFX_VER == 9
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
+   const struct intel_device_info *devinfo = &batch->screen->devinfo;
    const unsigned slice_hashing[] = {
       /* Because all Gfx9 platforms with more than one slice require
        * three-way subslice hashing, a single "normal" 16x16 slice hashing
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 74aafe399e1..ca806875b81 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -335,7 +335,7 @@ blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
              uint32_t level, uint32_t start_layer, uint32_t num_layers,
              enum isl_aux_op op)
 {
-   const struct gen_device_info *devinfo = batch->blorp->isl_dev->info;
+   const struct intel_device_info *devinfo = batch->blorp->isl_dev->info;
 
    struct blorp_params params;
    blorp_params_init(&params);
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 41272617d48..4b5d5950b59 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -187,7 +187,7 @@ blorp_clear_depth_stencil(struct blorp_batch *batch,
                           bool clear_depth, float depth_value,
                           uint8_t stencil_mask, uint8_t stencil_value);
 bool
-blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
+blorp_can_hiz_clear_depth(const struct intel_device_info *devinfo,
                           const struct isl_surf *surf,
                           enum isl_aux_usage aux_usage,
                           uint32_t level, uint32_t layer,
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 6dac15fd105..2da9e09973c 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1165,7 +1165,7 @@ static nir_shader *
 brw_blorp_build_nir_shader(struct blorp_context *blorp, void *mem_ctx,
                            const struct brw_blorp_blit_prog_key *key)
 {
-   const struct gen_device_info *devinfo = blorp->isl_dev->info;
+   const struct intel_device_info *devinfo = blorp->isl_dev->info;
    nir_ssa_def *src_pos, *dst_pos, *color;
 
    /* Sanity checks */
@@ -1695,7 +1695,7 @@ can_shrink_surface(const struct brw_blorp_surface_info *surf)
 }
 
 static unsigned
-get_max_surface_size(const struct gen_device_info *devinfo,
+get_max_surface_size(const struct intel_device_info *devinfo,
                      const struct brw_blorp_surface_info *surf)
 {
    const unsigned max = devinfo->ver >= 7 ? 16384 : 8192;
@@ -1803,7 +1803,7 @@ try_blorp_blit(struct blorp_batch *batch,
                struct brw_blorp_blit_prog_key *wm_prog_key,
                struct blt_coords *coords)
 {
-   const struct gen_device_info *devinfo = batch->blorp->isl_dev->info;
+   const struct intel_device_info *devinfo = batch->blorp->isl_dev->info;
 
    if (params->dst.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) {
       if (devinfo->ver >= 7) {
@@ -2846,7 +2846,7 @@ blorp_buffer_copy(struct blorp_batch *batch,
                   struct blorp_address dst,
                   uint64_t size)
 {
-   const struct gen_device_info *devinfo = batch->blorp->isl_dev->info;
+   const struct intel_device_info *devinfo = batch->blorp->isl_dev->info;
    uint64_t copy_size = size;
 
    /* This is maximum possible width/height our HW can handle */
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 71028ae09b3..9661df2f4d4 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -756,7 +756,7 @@ blorp_clear_depth_stencil(struct blorp_batch *batch,
 }
 
 bool
-blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
+blorp_can_hiz_clear_depth(const struct intel_device_info *devinfo,
                           const struct isl_surf *surf,
                           enum isl_aux_usage aux_usage,
                           uint32_t level, uint32_t layer,
diff --git a/src/intel/common/intel_aux_map.c b/src/intel/common/intel_aux_map.c
index 5777fc7ce42..ba71c270df4 100644
--- a/src/intel/common/intel_aux_map.c
+++ b/src/intel/common/intel_aux_map.c
@@ -200,7 +200,7 @@ intel_aux_map_get_state_num(struct intel_aux_map_context *ctx)
 struct intel_aux_map_context *
 intel_aux_map_init(void *driver_ctx,
                    struct gen_mapped_pinned_buffer_alloc *buffer_alloc,
-                   const struct gen_device_info *devinfo)
+                   const struct intel_device_info *devinfo)
 {
    struct intel_aux_map_context *ctx;
    if (devinfo->ver < 12)
diff --git a/src/intel/common/intel_aux_map.h b/src/intel/common/intel_aux_map.h
index 33d6aecba2e..d09ae06852f 100644
--- a/src/intel/common/intel_aux_map.h
+++ b/src/intel/common/intel_aux_map.h
@@ -41,7 +41,7 @@ extern "C" {
  */
 
 struct intel_aux_map_context;
-struct gen_device_info;
+struct intel_device_info;
 
 #define INTEL_AUX_MAP_ADDRESS_MASK       0x0000ffffffffff00ull
 #define INTEL_AUX_MAP_FORMAT_BITS_MASK   0xfff0000000000000ull
@@ -54,7 +54,7 @@ struct gen_device_info;
 struct intel_aux_map_context *
 intel_aux_map_init(void *driver_ctx,
                    struct gen_mapped_pinned_buffer_alloc *buffer_alloc,
-                   const struct gen_device_info *devinfo);
+                   const struct intel_device_info *devinfo);
 
 void
 intel_aux_map_finish(struct intel_aux_map_context *ctx);
diff --git a/src/intel/common/intel_batch_decoder.c b/src/intel/common/intel_batch_decoder.c
index 491c3a4ebd6..9d923c2a9a8 100644
--- a/src/intel/common/intel_batch_decoder.c
+++ b/src/intel/common/intel_batch_decoder.c
@@ -30,7 +30,7 @@
 
 void
 intel_batch_decode_ctx_init(struct intel_batch_decode_ctx *ctx,
-                            const struct gen_device_info *devinfo,
+                            const struct intel_device_info *devinfo,
                             FILE *fp, enum intel_batch_decode_flags flags,
                             const char *xml_path,
                             struct intel_batch_decode_bo (*get_bo)(void *,
diff --git a/src/intel/common/intel_batch_decoder_stub.c b/src/intel/common/intel_batch_decoder_stub.c
index f18ea381d05..eb19df98dae 100644
--- a/src/intel/common/intel_batch_decoder_stub.c
+++ b/src/intel/common/intel_batch_decoder_stub.c
@@ -26,7 +26,7 @@
 
 void
 intel_batch_decode_ctx_init(struct intel_batch_decode_ctx *ctx,
-                            const struct gen_device_info *devinfo,
+                            const struct intel_device_info *devinfo,
                             FILE *fp, enum intel_batch_decode_flags flags,
                             const char *xml_path,
                             struct intel_batch_decode_bo (*get_bo)(void *,
diff --git a/src/intel/common/intel_decoder.c b/src/intel/common/intel_decoder.c
index 1ac5ab41de8..7e31065bdaf 100644
--- a/src/intel/common/intel_decoder.c
+++ b/src/intel/common/intel_decoder.c
@@ -508,7 +508,7 @@ character_data(void *data, const XML_Char *s, int len)
 }
 
 static int
-devinfo_to_gen(const struct gen_device_info *devinfo, bool x10)
+devinfo_to_gen(const struct intel_device_info *devinfo, bool x10)
 {
    if (devinfo->is_baytrail || devinfo->is_haswell) {
       return devinfo->ver * 10 + 5;
@@ -595,7 +595,7 @@ intel_spec_init(void)
 }
 
 struct intel_spec *
-intel_spec_load(const struct gen_device_info *devinfo)
+intel_spec_load(const struct intel_device_info *devinfo)
 {
    struct parser_context ctx;
    void *buf;
@@ -735,7 +735,7 @@ intel_spec_load_filename(const char *filename)
 }
 
 struct intel_spec *
-intel_spec_load_from_path(const struct gen_device_info *devinfo,
+intel_spec_load_from_path(const struct intel_device_info *devinfo,
                           const char *path)
 {
    size_t filename_len = strlen(path) + 20;
diff --git a/src/intel/common/intel_decoder.h b/src/intel/common/intel_decoder.h
index e3c185d21bd..13807714bda 100644
--- a/src/intel/common/intel_decoder.h
+++ b/src/intel/common/intel_decoder.h
@@ -51,8 +51,8 @@ static inline uint32_t intel_make_gen(uint32_t major, uint32_t minor)
 }
 
 struct intel_group *intel_spec_find_struct(struct intel_spec *spec, const char *name);
-struct intel_spec *intel_spec_load(const struct gen_device_info *devinfo);
-struct intel_spec *intel_spec_load_from_path(const struct gen_device_info *devinfo,
+struct intel_spec *intel_spec_load(const struct intel_device_info *devinfo);
+struct intel_spec *intel_spec_load_from_path(const struct intel_device_info *devinfo,
                                              const char *path);
 struct intel_spec *intel_spec_load_filename(const char *filename);
 void intel_spec_destroy(struct intel_spec *spec);
@@ -236,7 +236,7 @@ struct intel_batch_decode_ctx {
    void *user_data;
 
    FILE *fp;
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    struct intel_spec *spec;
    enum intel_batch_decode_flags flags;
 
@@ -254,7 +254,7 @@ struct intel_batch_decode_ctx {
 };
 
 void intel_batch_decode_ctx_init(struct intel_batch_decode_ctx *ctx,
-                                 const struct gen_device_info *devinfo,
+                                 const struct intel_device_info *devinfo,
                                  FILE *fp, enum intel_batch_decode_flags flags,
                                  const char *xml_path,
                                  struct intel_batch_decode_bo (*get_bo)(void *,
diff --git a/src/intel/common/intel_disasm.c b/src/intel/common/intel_disasm.c
index 310ae33c62c..90d5a9935ce 100644
--- a/src/intel/common/intel_disasm.c
+++ b/src/intel/common/intel_disasm.c
@@ -38,7 +38,7 @@ is_send(uint32_t opcode)
 }
 
 static int
-intel_disasm_find_end(const struct gen_device_info *devinfo,
+intel_disasm_find_end(const struct intel_device_info *devinfo,
                       const void *assembly, int start)
 {
    int offset = start;
@@ -64,7 +64,7 @@ intel_disasm_find_end(const struct gen_device_info *devinfo,
 }
 
 void
-intel_disassemble(const struct gen_device_info *devinfo,
+intel_disassemble(const struct intel_device_info *devinfo,
                   const void *assembly, int start, FILE *out)
 {
    int end = intel_disasm_find_end(devinfo, assembly, start);
diff --git a/src/intel/common/intel_disasm.h b/src/intel/common/intel_disasm.h
index d3938f85c19..bb44bf6ec89 100644
--- a/src/intel/common/intel_disasm.h
+++ b/src/intel/common/intel_disasm.h
@@ -30,7 +30,7 @@
 extern "C" {
 #endif
 
-void intel_disassemble(const struct gen_device_info *devinfo,
+void intel_disassemble(const struct intel_device_info *devinfo,
                        const void *assembly, int start, FILE *out);
 
 #ifdef __cplusplus
diff --git a/src/intel/common/intel_l3_config.c b/src/intel/common/intel_l3_config.c
index 049f1e8815b..e0a063efc2b 100644
--- a/src/intel/common/intel_l3_config.c
+++ b/src/intel/common/intel_l3_config.c
@@ -161,7 +161,7 @@ DECLARE_L3_LIST(dg1);
  * specified device.
  */
 static const struct intel_l3_list *
-get_l3_list(const struct gen_device_info *devinfo)
+get_l3_list(const struct intel_device_info *devinfo)
 {
    switch (devinfo->ver) {
    case 7:
@@ -257,7 +257,7 @@ intel_diff_l3_weights(struct intel_l3_weights w0, struct intel_l3_weights w1)
  * is intended to approximately resemble the hardware defaults.
  */
 struct intel_l3_weights
-intel_get_default_l3_weights(const struct gen_device_info *devinfo,
+intel_get_default_l3_weights(const struct intel_device_info *devinfo,
                              bool needs_dc, bool needs_slm)
 {
    struct intel_l3_weights w = {{ 0 }};
@@ -279,7 +279,7 @@ intel_get_default_l3_weights(const struct gen_device_info *devinfo,
  * Get the default L3 configuration
  */
 const struct intel_l3_config *
-intel_get_default_l3_config(const struct gen_device_info *devinfo)
+intel_get_default_l3_config(const struct intel_device_info *devinfo)
 {
    /* For efficiency assume that the first entry of the array matches the
     * default configuration.
@@ -301,7 +301,7 @@ intel_get_default_l3_config(const struct gen_device_info *devinfo)
  * weight vector.
  */
 const struct intel_l3_config *
-intel_get_l3_config(const struct gen_device_info *devinfo,
+intel_get_l3_config(const struct intel_device_info *devinfo,
                     struct intel_l3_weights w0)
 {
    const struct intel_l3_list *const list = get_l3_list(devinfo);
@@ -327,7 +327,7 @@ intel_get_l3_config(const struct gen_device_info *devinfo,
  * Return the size of an L3 way in KB.
  */
 static unsigned
-get_l3_way_size(const struct gen_device_info *devinfo)
+get_l3_way_size(const struct intel_device_info *devinfo)
 {
    const unsigned way_size_per_bank =
       (devinfo->ver >= 9 && devinfo->l3_banks == 1) || devinfo->ver >= 11 ?
@@ -339,16 +339,16 @@ get_l3_way_size(const struct gen_device_info *devinfo)
 
 /**
  * Return the unit brw_context::urb::size is expressed in, in KB.  \sa
- * gen_device_info::urb::size.
+ * intel_device_info::urb::size.
  */
 static unsigned
-get_urb_size_scale(const struct gen_device_info *devinfo)
+get_urb_size_scale(const struct intel_device_info *devinfo)
 {
    return (devinfo->ver >= 8 ? devinfo->num_slices : 1);
 }
 
 unsigned
-intel_get_l3_config_urb_size(const struct gen_device_info *devinfo,
+intel_get_l3_config_urb_size(const struct intel_device_info *devinfo,
                              const struct intel_l3_config *cfg)
 {
    /* We don't have to program the URB size in DG1, it's a fixed value. */
diff --git a/src/intel/common/intel_l3_config.h b/src/intel/common/intel_l3_config.h
index 947e6b2c5ac..23f750439e1 100644
--- a/src/intel/common/intel_l3_config.h
+++ b/src/intel/common/intel_l3_config.h
@@ -73,21 +73,21 @@ struct intel_l3_weights {
 float intel_diff_l3_weights(struct intel_l3_weights w0, struct intel_l3_weights w1);
 
 struct intel_l3_weights
-intel_get_default_l3_weights(const struct gen_device_info *devinfo,
+intel_get_default_l3_weights(const struct intel_device_info *devinfo,
                              bool needs_dc, bool needs_slm);
 
 struct intel_l3_weights
 intel_get_l3_config_weights(const struct intel_l3_config *cfg);
 
 const struct intel_l3_config *
-intel_get_default_l3_config(const struct gen_device_info *devinfo);
+intel_get_default_l3_config(const struct intel_device_info *devinfo);
 
 const struct intel_l3_config *
-intel_get_l3_config(const struct gen_device_info *devinfo,
+intel_get_l3_config(const struct intel_device_info *devinfo,
                     struct intel_l3_weights w0);
 
 unsigned
-intel_get_l3_config_urb_size(const struct gen_device_info *devinfo,
+intel_get_l3_config_urb_size(const struct intel_device_info *devinfo,
                              const struct intel_l3_config *cfg);
 
 void intel_dump_l3_config(const struct intel_l3_config *cfg, FILE *fp);
@@ -98,7 +98,7 @@ enum intel_urb_deref_block_size {
    INTEL_URB_DEREF_BLOCK_SIZE_8          = 2,
 };
 
-void intel_get_urb_config(const struct gen_device_info *devinfo,
+void intel_get_urb_config(const struct intel_device_info *devinfo,
                           const struct intel_l3_config *l3_cfg,
                           bool tess_present, bool gs_present,
                           const unsigned entry_size[4],
diff --git a/src/intel/common/intel_measure.c b/src/intel/common/intel_measure.c
index 326ae79d5e3..c8474ac3809 100644
--- a/src/intel/common/intel_measure.c
+++ b/src/intel/common/intel_measure.c
@@ -563,7 +563,7 @@ buffered_event_count(struct intel_measure_device *device)
 static void
 print_combined_results(struct intel_measure_device *measure_device,
                        int result_count,
-                       struct gen_device_info *info)
+                       struct intel_device_info *info)
 {
    if (result_count == 0)
       return;
@@ -601,8 +601,8 @@ print_combined_results(struct intel_measure_device *measure_device,
            begin->event_name, begin->count,
            begin->vs, begin->tcs, begin->tes, begin->gs, begin->fs, begin->cs,
            begin->framebuffer,
-           gen_device_info_timebase_scale(info, start_result->idle_duration),
-           gen_device_info_timebase_scale(info, duration_ts));
+           intel_device_info_timebase_scale(info, start_result->idle_duration),
+           intel_device_info_timebase_scale(info, duration_ts));
 }
 
 /**
@@ -610,7 +610,7 @@ print_combined_results(struct intel_measure_device *measure_device,
  */
 static void
 intel_measure_print(struct intel_measure_device *device,
-                    struct gen_device_info *info)
+                    struct intel_device_info *info)
 {
    while (true) {
       const int events_to_combine = buffered_event_count(device);
@@ -626,7 +626,7 @@ intel_measure_print(struct intel_measure_device *device,
  */
 void
 intel_measure_gather(struct intel_measure_device *measure_device,
-                     struct gen_device_info *info)
+                     struct intel_device_info *info)
 {
    pthread_mutex_lock(&measure_device->mutex);
 
diff --git a/src/intel/common/intel_measure.h b/src/intel/common/intel_measure.h
index e78e69e2fb3..8283332aafa 100644
--- a/src/intel/common/intel_measure.h
+++ b/src/intel/common/intel_measure.h
@@ -158,8 +158,8 @@ void intel_measure_frame_transition(unsigned frame);
 
 bool intel_measure_ready(struct intel_measure_batch *batch);
 
-struct gen_device_info;
+struct intel_device_info;
 void intel_measure_gather(struct intel_measure_device *device,
-                          struct gen_device_info *info);
+                          struct intel_device_info *info);
 
 #endif /* INTEL_MEASURE_H */
diff --git a/src/intel/common/intel_urb_config.c b/src/intel/common/intel_urb_config.c
index 0482891684c..283e521ec92 100644
--- a/src/intel/common/intel_urb_config.c
+++ b/src/intel/common/intel_urb_config.c
@@ -60,7 +60,7 @@
  * \param[out] constrained - true if we wanted more space than we had
  */
 void
-intel_get_urb_config(const struct gen_device_info *devinfo,
+intel_get_urb_config(const struct intel_device_info *devinfo,
                      const struct intel_l3_config *l3_cfg,
                      bool tess_present, bool gs_present,
                      const unsigned entry_size[4],
diff --git a/src/intel/common/intel_uuid.c b/src/intel/common/intel_uuid.c
index f531ce54b10..661a31e3d22 100644
--- a/src/intel/common/intel_uuid.c
+++ b/src/intel/common/intel_uuid.c
@@ -32,7 +32,7 @@ intel_uuid_compute_device_id(uint8_t *uuid,
 {
    struct mesa_sha1 sha1_ctx;
    uint8_t sha1[20];
-   const struct gen_device_info *devinfo = isldev->info;
+   const struct intel_device_info *devinfo = isldev->info;
 
    assert(size <= sizeof(sha1));
 
@@ -53,7 +53,7 @@ intel_uuid_compute_device_id(uint8_t *uuid,
 
 void
 intel_uuid_compute_driver_id(uint8_t *uuid,
-                             const struct gen_device_info *devinfo,
+                             const struct intel_device_info *devinfo,
                              size_t size)
 {
    const char* intelDriver = PACKAGE_VERSION MESA_GIT_SHA1;
diff --git a/src/intel/common/intel_uuid.h b/src/intel/common/intel_uuid.h
index 6eefd5912c5..28edc4421af 100644
--- a/src/intel/common/intel_uuid.h
+++ b/src/intel/common/intel_uuid.h
@@ -37,7 +37,7 @@ void intel_uuid_compute_device_id(uint8_t *uuid,
                                   size_t size);
 
 void intel_uuid_compute_driver_id(uint8_t *uuid,
-                                  const struct gen_device_info *devinfo,
+                                  const struct intel_device_info *devinfo,
                                   size_t size);
 
 #ifdef __cplusplus
diff --git a/src/intel/common/mi_builder.h b/src/intel/common/mi_builder.h
index f3280fdcab1..71927ca9f59 100644
--- a/src/intel/common/mi_builder.h
+++ b/src/intel/common/mi_builder.h
@@ -129,7 +129,7 @@ mi_adjust_reg_num(uint32_t reg)
 #endif
 
 struct mi_builder {
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
    __gen_user_data *user_data;
 
 #if GFX_VERx10 >= 75
@@ -143,7 +143,7 @@ struct mi_builder {
 
 static inline void
 mi_builder_init(struct mi_builder *b,
-                const struct gen_device_info *devinfo,
+                const struct intel_device_info *devinfo,
                 __gen_user_data *user_data)
 {
    memset(b, 0, sizeof(*b));
diff --git a/src/intel/common/tests/mi_builder_test.cpp b/src/intel/common/tests/mi_builder_test.cpp
index 6a39c70b175..5c1b893bf37 100644
--- a/src/intel/common/tests/mi_builder_test.cpp
+++ b/src/intel/common/tests/mi_builder_test.cpp
@@ -128,7 +128,7 @@ public:
 
    int fd;
    int ctx_id;
-   gen_device_info devinfo;
+   intel_device_info devinfo;
 
    uint32_t batch_bo_handle;
 #if GFX_VER >= 8
diff --git a/src/intel/compiler/brw_clip_line.c b/src/intel/compiler/brw_clip_line.c
index ca90416f642..2eb7131e62c 100644
--- a/src/intel/compiler/brw_clip_line.c
+++ b/src/intel/compiler/brw_clip_line.c
@@ -37,7 +37,7 @@
 
 static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
 {
-   const struct gen_device_info *devinfo = c->func.devinfo;
+   const struct intel_device_info *devinfo = c->func.devinfo;
    GLuint i = 0,j;
 
    /* Register usage is static, precompute here:
diff --git a/src/intel/compiler/brw_clip_tri.c b/src/intel/compiler/brw_clip_tri.c
index 368b441145e..f6f7e307ddc 100644
--- a/src/intel/compiler/brw_clip_tri.c
+++ b/src/intel/compiler/brw_clip_tri.c
@@ -44,7 +44,7 @@ static void release_tmps( struct brw_clip_compile *c )
 void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
 			      GLuint nr_verts )
 {
-   const struct gen_device_info *devinfo = c->func.devinfo;
+   const struct intel_device_info *devinfo = c->func.devinfo;
    GLuint i = 0,j;
 
    /* Register usage is static, precompute here:
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 73a2b07c398..8b368bc0766 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -94,7 +94,7 @@ static const struct nir_shader_compiler_options vector_nir_options = {
 };
 
 struct brw_compiler *
-brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
+brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
 {
    struct brw_compiler *compiler = rzalloc(mem_ctx, struct brw_compiler);
 
@@ -274,7 +274,7 @@ brw_prog_key_size(gl_shader_stage stage)
 }
 
 void
-brw_write_shader_relocs(const struct gen_device_info *devinfo,
+brw_write_shader_relocs(const struct intel_device_info *devinfo,
                         void *program,
                         const struct brw_stage_prog_data *prog_data,
                         struct brw_shader_reloc_value *values,
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
index 7ce9924f6b2..b501a266d88 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -41,7 +41,7 @@ struct brw_program;
 typedef struct nir_shader nir_shader;
 
 struct brw_compiler {
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
 
    struct {
       struct ra_regs *regs;
@@ -1155,7 +1155,7 @@ GLuint brw_varying_to_offset(const struct brw_vue_map *vue_map, GLuint varying)
    return brw_vue_slot_to_offset(vue_map->varying_to_slot[varying]);
 }
 
-void brw_compute_vue_map(const struct gen_device_info *devinfo,
+void brw_compute_vue_map(const struct intel_device_info *devinfo,
                          struct brw_vue_map *vue_map,
                          uint64_t slots_valid,
                          bool separate_shader,
@@ -1413,7 +1413,7 @@ struct brw_compile_stats {
 /** @} */
 
 struct brw_compiler *
-brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo);
+brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo);
 
 /**
  * Returns a compiler configuration for use with disk shader cache
@@ -1691,12 +1691,12 @@ brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data,
                              unsigned threads);
 
 unsigned
-brw_cs_simd_size_for_group_size(const struct gen_device_info *devinfo,
+brw_cs_simd_size_for_group_size(const struct intel_device_info *devinfo,
                                 const struct brw_cs_prog_data *cs_prog_data,
                                 unsigned group_size);
 
 void
-brw_write_shader_relocs(const struct gen_device_info *devinfo,
+brw_write_shader_relocs(const struct intel_device_info *devinfo,
                         void *program,
                         const struct brw_stage_prog_data *prog_data,
                         struct brw_shader_reloc_value *values,
@@ -1722,7 +1722,7 @@ brw_cs_right_mask(unsigned group_size, unsigned simd_size)
  * '2^n - 1' for some n.
  */
 static inline bool
-brw_stage_has_packed_dispatch(ASSERTED const struct gen_device_info *devinfo,
+brw_stage_has_packed_dispatch(ASSERTED const struct intel_device_info *devinfo,
                               gl_shader_stage stage,
                               const struct brw_stage_prog_data *prog_data)
 {
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 99c69b2b196..4f631af9e33 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -33,7 +33,7 @@
 #include "util/half_float.h"
 
 bool
-brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
+brw_has_jip(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    if (devinfo->ver < 6)
       return false;
@@ -48,7 +48,7 @@ brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
 }
 
 bool
-brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
+brw_has_uip(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    if (devinfo->ver < 6)
       return false;
@@ -61,7 +61,7 @@ brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
 }
 
 static bool
-has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode)
+has_branch_ctrl(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    if (devinfo->ver < 8)
       return false;
@@ -90,7 +90,7 @@ is_send(unsigned opcode)
 }
 
 static bool
-is_split_send(UNUSED const struct gen_device_info *devinfo, unsigned opcode)
+is_split_send(UNUSED const struct intel_device_info *devinfo, unsigned opcode)
 {
    if (devinfo->ver >= 12)
       return is_send(opcode);
@@ -391,7 +391,7 @@ static const char *const dp_rc_msg_type_gfx9[16] = {
 };
 
 static const char *const *
-dp_rc_msg_type(const struct gen_device_info *devinfo)
+dp_rc_msg_type(const struct intel_device_info *devinfo)
 {
    return (devinfo->ver >= 9 ? dp_rc_msg_type_gfx9 :
            devinfo->ver >= 7 ? dp_rc_msg_type_gfx7 :
@@ -676,7 +676,7 @@ control(FILE *file, const char *name, const char *const ctrl[],
 }
 
 static int
-print_opcode(FILE *file, const struct gen_device_info *devinfo,
+print_opcode(FILE *file, const struct intel_device_info *devinfo,
              enum opcode id)
 {
    const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
@@ -751,7 +751,7 @@ reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
 }
 
 static int
-dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+dest(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);
    unsigned elem_size = brw_reg_type_to_size(type);
@@ -831,7 +831,7 @@ dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static int
-dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+dest_3src(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
    int err = 0;
@@ -895,7 +895,7 @@ src_align1_region(FILE *file,
 
 static int
 src_da1(FILE *file,
-        const struct gen_device_info *devinfo,
+        const struct intel_device_info *devinfo,
         unsigned opcode,
         enum brw_reg_type type, unsigned _reg_file,
         unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
@@ -925,7 +925,7 @@ src_da1(FILE *file,
 
 static int
 src_ia1(FILE *file,
-        const struct gen_device_info *devinfo,
+        const struct intel_device_info *devinfo,
         unsigned opcode,
         enum brw_reg_type type,
         int _addr_imm,
@@ -978,7 +978,7 @@ src_swizzle(FILE *file, unsigned swiz)
 
 static int
 src_da16(FILE *file,
-         const struct gen_device_info *devinfo,
+         const struct intel_device_info *devinfo,
          unsigned opcode,
          enum brw_reg_type type,
          unsigned _reg_file,
@@ -1017,7 +1017,7 @@ src_da16(FILE *file,
 }
 
 static enum brw_vertical_stride
-vstride_from_align1_3src_vstride(const struct gen_device_info *devinfo,
+vstride_from_align1_3src_vstride(const struct intel_device_info *devinfo,
                                  enum gfx10_align1_3src_vertical_stride vstride)
 {
    switch (vstride) {
@@ -1102,7 +1102,7 @@ implied_width(enum brw_vertical_stride _vert_stride,
 }
 
 static int
-src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+src0_3src(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    int err = 0;
    unsigned reg_nr, subreg_nr;
@@ -1188,7 +1188,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
 }
 
 static int
-src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+src1_3src(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    int err = 0;
    unsigned reg_nr, subreg_nr;
@@ -1261,7 +1261,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
 }
 
 static int
-src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+src2_3src(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    int err = 0;
    unsigned reg_nr, subreg_nr;
@@ -1348,7 +1348,7 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
 }
 
 static int
-imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
+imm(FILE *file, const struct intel_device_info *devinfo, enum brw_reg_type type,
     const brw_inst *inst)
 {
    switch (type) {
@@ -1417,7 +1417,7 @@ imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
 
 static int
 src_sends_da(FILE *file,
-             const struct gen_device_info *devinfo,
+             const struct intel_device_info *devinfo,
              enum brw_reg_type type,
              enum brw_reg_file _reg_file,
              unsigned _reg_nr,
@@ -1437,7 +1437,7 @@ src_sends_da(FILE *file,
 
 static int
 src_sends_ia(FILE *file,
-             const struct gen_device_info *devinfo,
+             const struct intel_device_info *devinfo,
              enum brw_reg_type type,
              int _addr_imm,
              unsigned _addr_subreg_nr)
@@ -1455,7 +1455,7 @@ src_sends_ia(FILE *file,
 
 static int
 src_send_desc_ia(FILE *file,
-                 const struct gen_device_info *devinfo,
+                 const struct intel_device_info *devinfo,
                  unsigned _addr_subreg_nr)
 {
    string(file, "a0");
@@ -1467,7 +1467,7 @@ src_send_desc_ia(FILE *file,
 }
 
 static int
-src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+src0(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
       if (devinfo->ver >= 12) {
@@ -1544,7 +1544,7 @@ src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static int
-src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+src1(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
       return src_sends_da(file,
@@ -1606,7 +1606,7 @@ src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static int
-qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+qtr_ctrl(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
    int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
@@ -1640,7 +1640,7 @@ qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst
 }
 
 static int
-swsb(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
+swsb(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    const enum opcode opcode = brw_inst_opcode(devinfo, inst);
    const uint8_t x = brw_inst_swsb(devinfo, inst);
@@ -1661,7 +1661,7 @@ swsb(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
 
 #ifdef DEBUG
 static __attribute__((__unused__)) int
-brw_disassemble_imm(const struct gen_device_info *devinfo,
+brw_disassemble_imm(const struct intel_device_info *devinfo,
                     uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
 {
    brw_inst inst;
@@ -1672,7 +1672,7 @@ brw_disassemble_imm(const struct gen_device_info *devinfo,
 #endif
 
 static void
-write_label(FILE *file, const struct gen_device_info *devinfo,
+write_label(FILE *file, const struct intel_device_info *devinfo,
             const struct brw_label *root_label,
             int offset, int jump)
 {
@@ -1687,7 +1687,7 @@ write_label(FILE *file, const struct gen_device_info *devinfo,
 }
 
 int
-brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
+brw_disassemble_inst(FILE *file, const struct intel_device_info *devinfo,
                      const brw_inst *inst, bool is_compacted,
                      int offset, const struct brw_label *root_label)
 {
diff --git a/src/intel/compiler/brw_disasm_info.c b/src/intel/compiler/brw_disasm_info.c
index b7776dfff20..dd0091e812c 100644
--- a/src/intel/compiler/brw_disasm_info.c
+++ b/src/intel/compiler/brw_disasm_info.c
@@ -34,7 +34,7 @@ void
 dump_assembly(void *assembly, int start_offset, int end_offset,
               struct disasm_info *disasm, const unsigned *block_latency)
 {
-   const struct gen_device_info *devinfo = disasm->devinfo;
+   const struct intel_device_info *devinfo = disasm->devinfo;
    const char *last_annotation_string = NULL;
    const void *last_annotation_ir = NULL;
 
@@ -104,7 +104,7 @@ dump_assembly(void *assembly, int start_offset, int end_offset,
 }
 
 struct disasm_info *
-disasm_initialize(const struct gen_device_info *devinfo,
+disasm_initialize(const struct intel_device_info *devinfo,
                   const struct cfg_t *cfg)
 {
    struct disasm_info *disasm = ralloc(NULL, struct disasm_info);
@@ -129,7 +129,7 @@ void
 disasm_annotate(struct disasm_info *disasm,
                 struct backend_instruction *inst, unsigned offset)
 {
-   const struct gen_device_info *devinfo = disasm->devinfo;
+   const struct intel_device_info *devinfo = disasm->devinfo;
    const struct cfg_t *cfg = disasm->cfg;
 
    struct inst_group *group;
diff --git a/src/intel/compiler/brw_disasm_info.h b/src/intel/compiler/brw_disasm_info.h
index 5bfa2074739..715b82d0048 100644
--- a/src/intel/compiler/brw_disasm_info.h
+++ b/src/intel/compiler/brw_disasm_info.h
@@ -32,7 +32,7 @@ extern "C" {
 
 struct cfg_t;
 struct backend_instruction;
-struct gen_device_info;
+struct intel_device_info;
 
 struct inst_group {
    struct exec_node link;
@@ -56,7 +56,7 @@ struct inst_group {
 struct disasm_info {
    struct exec_list group_list;
 
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
    const struct cfg_t *cfg;
 
    /** Block index in the cfg. */
@@ -69,7 +69,7 @@ dump_assembly(void *assembly, int start_offset, int end_offset,
               struct disasm_info *disasm, const unsigned *block_latency);
 
 struct disasm_info *
-disasm_initialize(const struct gen_device_info *devinfo,
+disasm_initialize(const struct intel_device_info *devinfo,
                   const struct cfg_t *cfg);
 
 struct inst_group *
diff --git a/src/intel/compiler/brw_eu.cpp b/src/intel/compiler/brw_eu.cpp
index 802fe8ce8bb..39e2bd690d7 100644
--- a/src/intel/compiler/brw_eu.cpp
+++ b/src/intel/compiler/brw_eu.cpp
@@ -216,7 +216,7 @@ brw_set_default_compression_control(struct brw_codegen *p,
  * the currently selected channel enable group untouched.
  */
 void
-brw_inst_set_compression(const struct gen_device_info *devinfo,
+brw_inst_set_compression(const struct intel_device_info *devinfo,
                          brw_inst *inst, bool on)
 {
    if (devinfo->ver >= 6) {
@@ -248,7 +248,7 @@ brw_set_default_compression(struct brw_codegen *p, bool on)
  * [group, group + exec_size) to the instruction passed as argument.
  */
 void
-brw_inst_set_group(const struct gen_device_info *devinfo,
+brw_inst_set_group(const struct intel_device_info *devinfo,
                    brw_inst *inst, unsigned group)
 {
    if (devinfo->ver >= 7) {
@@ -317,7 +317,7 @@ void brw_pop_insn_state( struct brw_codegen *p )
 /***********************************************************************
  */
 void
-brw_init_codegen(const struct gen_device_info *devinfo,
+brw_init_codegen(const struct intel_device_info *devinfo,
                  struct brw_codegen *p, void *mem_ctx)
 {
    memset(p, 0, sizeof(*p));
@@ -465,7 +465,7 @@ brw_create_label(struct brw_label **labels, int offset, void *mem_ctx)
 }
 
 const struct brw_label *
-brw_label_assembly(const struct gen_device_info *devinfo,
+brw_label_assembly(const struct intel_device_info *devinfo,
                    const void *assembly, int start, int end, void *mem_ctx)
 {
    struct brw_label *root_label = NULL;
@@ -512,7 +512,7 @@ brw_label_assembly(const struct gen_device_info *devinfo,
 }
 
 void
-brw_disassemble_with_labels(const struct gen_device_info *devinfo,
+brw_disassemble_with_labels(const struct intel_device_info *devinfo,
                             const void *assembly, int start, int end, FILE *out)
 {
    void *mem_ctx = ralloc_context(NULL);
@@ -525,7 +525,7 @@ brw_disassemble_with_labels(const struct gen_device_info *devinfo,
 }
 
 void
-brw_disassemble(const struct gen_device_info *devinfo,
+brw_disassemble(const struct intel_device_info *devinfo,
                 const void *assembly, int start, int end,
                 const struct brw_label *root_label, FILE *out)
 {
@@ -711,7 +711,7 @@ lookup_opcode_desc(gen *index_gen,
                    const opcode_desc **index_descs,
                    unsigned index_size,
                    unsigned opcode_desc::*key,
-                   const gen_device_info *devinfo,
+                   const intel_device_info *devinfo,
                    unsigned k)
 {
    if (*index_gen != gen_from_devinfo(devinfo)) {
@@ -740,7 +740,7 @@ lookup_opcode_desc(gen *index_gen,
  * generation, or NULL if the opcode is not supported by the device.
  */
 const struct opcode_desc *
-brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode)
+brw_opcode_desc(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    static __thread gen index_gen = {};
    static __thread const opcode_desc *index_descs[NUM_BRW_OPCODES];
@@ -753,7 +753,7 @@ brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode)
  * generation, or NULL if the opcode is not supported by the device.
  */
 const struct opcode_desc *
-brw_opcode_desc_from_hw(const struct gen_device_info *devinfo, unsigned hw)
+brw_opcode_desc_from_hw(const struct intel_device_info *devinfo, unsigned hw)
 {
    static __thread gen index_gen = {};
    static __thread const opcode_desc *index_descs[128];
diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h
index 7fa913aaf1d..04061b29595 100644
--- a/src/intel/compiler/brw_eu.h
+++ b/src/intel/compiler/brw_eu.h
@@ -110,7 +110,7 @@ struct brw_codegen {
    bool automatic_exec_sizes;
 
    bool single_program_flow;
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
 
    /* Control flow stacks:
     * - if_stack contains IF and ELSE instructions which must be patched
@@ -158,10 +158,10 @@ void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
-void brw_inst_set_compression(const struct gen_device_info *devinfo,
+void brw_inst_set_compression(const struct intel_device_info *devinfo,
                               brw_inst *inst, bool on);
 void brw_set_default_compression(struct brw_codegen *p, bool on);
-void brw_inst_set_group(const struct gen_device_info *devinfo,
+void brw_inst_set_group(const struct intel_device_info *devinfo,
                         brw_inst *inst, unsigned group);
 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
@@ -171,21 +171,21 @@ void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 void brw_set_default_swsb(struct brw_codegen *p, struct tgl_swsb value);
 
-void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
+void brw_init_codegen(const struct intel_device_info *, struct brw_codegen *p,
 		      void *mem_ctx);
-bool brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode);
-bool brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode);
+bool brw_has_jip(const struct intel_device_info *devinfo, enum opcode opcode);
+bool brw_has_uip(const struct intel_device_info *devinfo, enum opcode opcode);
 const struct brw_label *brw_find_label(const struct brw_label *root, int offset);
 void brw_create_label(struct brw_label **labels, int offset, void *mem_ctx);
-int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
+int brw_disassemble_inst(FILE *file, const struct intel_device_info *devinfo,
                          const struct brw_inst *inst, bool is_compacted,
                          int offset, const struct brw_label *root_label);
-const struct brw_label *brw_label_assembly(const struct gen_device_info *devinfo,
+const struct brw_label *brw_label_assembly(const struct intel_device_info *devinfo,
                                            const void *assembly, int start, int end,
                                            void *mem_ctx);
-void brw_disassemble_with_labels(const struct gen_device_info *devinfo,
+void brw_disassemble_with_labels(const struct intel_device_info *devinfo,
                                  const void *assembly, int start, int end, FILE *out);
-void brw_disassemble(const struct gen_device_info *devinfo,
+void brw_disassemble(const struct intel_device_info *devinfo,
                      const void *assembly, int start, int end,
                      const struct brw_label *root_label, FILE *out);
 const struct brw_shader_reloc *brw_get_shader_relocs(struct brw_codegen *p,
@@ -283,7 +283,7 @@ ALU2(SUBB)
  * descriptor controls.
  */
 static inline uint32_t
-brw_message_desc(const struct gen_device_info *devinfo,
+brw_message_desc(const struct intel_device_info *devinfo,
                  unsigned msg_length,
                  unsigned response_length,
                  bool header_present)
@@ -299,7 +299,7 @@ brw_message_desc(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_message_desc_mlen(const struct gen_device_info *devinfo, uint32_t desc)
+brw_message_desc_mlen(const struct intel_device_info *devinfo, uint32_t desc)
 {
    if (devinfo->ver >= 5)
       return GET_BITS(desc, 28, 25);
@@ -308,7 +308,7 @@ brw_message_desc_mlen(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static inline unsigned
-brw_message_desc_rlen(const struct gen_device_info *devinfo, uint32_t desc)
+brw_message_desc_rlen(const struct intel_device_info *devinfo, uint32_t desc)
 {
    if (devinfo->ver >= 5)
       return GET_BITS(desc, 24, 20);
@@ -317,7 +317,7 @@ brw_message_desc_rlen(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static inline bool
-brw_message_desc_header_present(ASSERTED const struct gen_device_info *devinfo,
+brw_message_desc_header_present(ASSERTED const struct intel_device_info *devinfo,
                                 uint32_t desc)
 {
    assert(devinfo->ver >= 5);
@@ -325,21 +325,21 @@ brw_message_desc_header_present(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_message_ex_desc(UNUSED const struct gen_device_info *devinfo,
+brw_message_ex_desc(UNUSED const struct intel_device_info *devinfo,
                     unsigned ex_msg_length)
 {
    return SET_BITS(ex_msg_length, 9, 6);
 }
 
 static inline unsigned
-brw_message_ex_desc_ex_mlen(UNUSED const struct gen_device_info *devinfo,
+brw_message_ex_desc_ex_mlen(UNUSED const struct intel_device_info *devinfo,
                             uint32_t ex_desc)
 {
    return GET_BITS(ex_desc, 9, 6);
 }
 
 static inline uint32_t
-brw_urb_desc(const struct gen_device_info *devinfo,
+brw_urb_desc(const struct intel_device_info *devinfo,
              unsigned msg_type,
              bool per_slot_offset_present,
              bool channel_mask_present,
@@ -361,7 +361,7 @@ brw_urb_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_urb_desc_msg_type(ASSERTED const struct gen_device_info *devinfo,
+brw_urb_desc_msg_type(ASSERTED const struct intel_device_info *devinfo,
                       uint32_t desc)
 {
    assert(devinfo->ver >= 7);
@@ -373,7 +373,7 @@ brw_urb_desc_msg_type(ASSERTED const struct gen_device_info *devinfo,
  * function controls.
  */
 static inline uint32_t
-brw_sampler_desc(const struct gen_device_info *devinfo,
+brw_sampler_desc(const struct intel_device_info *devinfo,
                  unsigned binding_table_index,
                  unsigned sampler,
                  unsigned msg_type,
@@ -396,20 +396,20 @@ brw_sampler_desc(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_sampler_desc_binding_table_index(UNUSED const struct gen_device_info *devinfo,
+brw_sampler_desc_binding_table_index(UNUSED const struct intel_device_info *devinfo,
                                      uint32_t desc)
 {
    return GET_BITS(desc, 7, 0);
 }
 
 static inline unsigned
-brw_sampler_desc_sampler(UNUSED const struct gen_device_info *devinfo, uint32_t desc)
+brw_sampler_desc_sampler(UNUSED const struct intel_device_info *devinfo, uint32_t desc)
 {
    return GET_BITS(desc, 11, 8);
 }
 
 static inline unsigned
-brw_sampler_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
+brw_sampler_desc_msg_type(const struct intel_device_info *devinfo, uint32_t desc)
 {
    if (devinfo->ver >= 7)
       return GET_BITS(desc, 16, 12);
@@ -420,7 +420,7 @@ brw_sampler_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static inline unsigned
-brw_sampler_desc_simd_mode(const struct gen_device_info *devinfo, uint32_t desc)
+brw_sampler_desc_simd_mode(const struct intel_device_info *devinfo, uint32_t desc)
 {
    assert(devinfo->ver >= 5);
    if (devinfo->ver >= 7)
@@ -430,7 +430,7 @@ brw_sampler_desc_simd_mode(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static  inline unsigned
-brw_sampler_desc_return_format(ASSERTED const struct gen_device_info *devinfo,
+brw_sampler_desc_return_format(ASSERTED const struct intel_device_info *devinfo,
                                uint32_t desc)
 {
    assert(devinfo->ver == 4 && !devinfo->is_g4x);
@@ -441,7 +441,7 @@ brw_sampler_desc_return_format(ASSERTED const struct gen_device_info *devinfo,
  * Construct a message descriptor for the dataport
  */
 static inline uint32_t
-brw_dp_desc(const struct gen_device_info *devinfo,
+brw_dp_desc(const struct intel_device_info *devinfo,
             unsigned binding_table_index,
             unsigned msg_type,
             unsigned msg_control)
@@ -464,14 +464,14 @@ brw_dp_desc(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_dp_desc_binding_table_index(UNUSED const struct gen_device_info *devinfo,
+brw_dp_desc_binding_table_index(UNUSED const struct intel_device_info *devinfo,
                                 uint32_t desc)
 {
    return GET_BITS(desc, 7, 0);
 }
 
 static inline unsigned
-brw_dp_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
+brw_dp_desc_msg_type(const struct intel_device_info *devinfo, uint32_t desc)
 {
    assert(devinfo->ver >= 6);
    if (devinfo->ver >= 8)
@@ -483,7 +483,7 @@ brw_dp_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static inline unsigned
-brw_dp_desc_msg_control(const struct gen_device_info *devinfo, uint32_t desc)
+brw_dp_desc_msg_control(const struct intel_device_info *devinfo, uint32_t desc)
 {
    assert(devinfo->ver >= 6);
    if (devinfo->ver >= 7)
@@ -497,7 +497,7 @@ brw_dp_desc_msg_control(const struct gen_device_info *devinfo, uint32_t desc)
  * function controls.
  */
 static inline uint32_t
-brw_dp_read_desc(const struct gen_device_info *devinfo,
+brw_dp_read_desc(const struct intel_device_info *devinfo,
                  unsigned binding_table_index,
                  unsigned msg_control,
                  unsigned msg_type,
@@ -518,7 +518,7 @@ brw_dp_read_desc(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_dp_read_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
+brw_dp_read_desc_msg_type(const struct intel_device_info *devinfo, uint32_t desc)
 {
    if (devinfo->ver >= 6)
       return brw_dp_desc_msg_type(devinfo, desc);
@@ -529,7 +529,7 @@ brw_dp_read_desc_msg_type(const struct gen_device_info *devinfo, uint32_t desc)
 }
 
 static inline unsigned
-brw_dp_read_desc_msg_control(const struct gen_device_info *devinfo,
+brw_dp_read_desc_msg_control(const struct intel_device_info *devinfo,
                              uint32_t desc)
 {
    if (devinfo->ver >= 6)
@@ -545,7 +545,7 @@ brw_dp_read_desc_msg_control(const struct gen_device_info *devinfo,
  * function controls.
  */
 static inline uint32_t
-brw_dp_write_desc(const struct gen_device_info *devinfo,
+brw_dp_write_desc(const struct intel_device_info *devinfo,
                   unsigned binding_table_index,
                   unsigned msg_control,
                   unsigned msg_type,
@@ -566,7 +566,7 @@ brw_dp_write_desc(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_dp_write_desc_msg_type(const struct gen_device_info *devinfo,
+brw_dp_write_desc_msg_type(const struct intel_device_info *devinfo,
                            uint32_t desc)
 {
    if (devinfo->ver >= 6)
@@ -576,7 +576,7 @@ brw_dp_write_desc_msg_type(const struct gen_device_info *devinfo,
 }
 
 static inline unsigned
-brw_dp_write_desc_msg_control(const struct gen_device_info *devinfo,
+brw_dp_write_desc_msg_control(const struct intel_device_info *devinfo,
                               uint32_t desc)
 {
    if (devinfo->ver >= 6)
@@ -586,7 +586,7 @@ brw_dp_write_desc_msg_control(const struct gen_device_info *devinfo,
 }
 
 static inline bool
-brw_dp_write_desc_last_render_target(const struct gen_device_info *devinfo,
+brw_dp_write_desc_last_render_target(const struct intel_device_info *devinfo,
                                      uint32_t desc)
 {
    if (devinfo->ver >= 6)
@@ -596,7 +596,7 @@ brw_dp_write_desc_last_render_target(const struct gen_device_info *devinfo,
 }
 
 static inline bool
-brw_dp_write_desc_write_commit(const struct gen_device_info *devinfo,
+brw_dp_write_desc_write_commit(const struct intel_device_info *devinfo,
                                uint32_t desc)
 {
    assert(devinfo->ver <= 6);
@@ -611,7 +611,7 @@ brw_dp_write_desc_write_commit(const struct gen_device_info *devinfo,
  * surface function controls.
  */
 static inline uint32_t
-brw_dp_surface_desc(const struct gen_device_info *devinfo,
+brw_dp_surface_desc(const struct intel_device_info *devinfo,
                     unsigned msg_type,
                     unsigned msg_control)
 {
@@ -621,7 +621,7 @@ brw_dp_surface_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_untyped_atomic_desc(const struct gen_device_info *devinfo,
+brw_dp_untyped_atomic_desc(const struct intel_device_info *devinfo,
                            unsigned exec_size, /**< 0 for SIMD4x2 */
                            unsigned atomic_op,
                            bool response_expected)
@@ -648,7 +648,7 @@ brw_dp_untyped_atomic_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_untyped_atomic_float_desc(const struct gen_device_info *devinfo,
+brw_dp_untyped_atomic_float_desc(const struct intel_device_info *devinfo,
                                  unsigned exec_size,
                                  unsigned atomic_op,
                                  bool response_expected)
@@ -675,7 +675,7 @@ brw_mdc_cmask(unsigned num_channels)
 }
 
 static inline uint32_t
-brw_dp_untyped_surface_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_untyped_surface_rw_desc(const struct intel_device_info *devinfo,
                                unsigned exec_size, /**< 0 for SIMD4x2 */
                                unsigned num_channels,
                                bool write)
@@ -729,7 +729,7 @@ brw_mdc_ds(unsigned bit_size)
 }
 
 static inline uint32_t
-brw_dp_byte_scattered_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_byte_scattered_rw_desc(const struct intel_device_info *devinfo,
                               unsigned exec_size,
                               unsigned bit_size,
                               bool write)
@@ -750,7 +750,7 @@ brw_dp_byte_scattered_rw_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_dword_scattered_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_dword_scattered_rw_desc(const struct intel_device_info *devinfo,
                                unsigned exec_size,
                                bool write)
 {
@@ -781,7 +781,7 @@ brw_dp_dword_scattered_rw_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_oword_block_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_oword_block_rw_desc(const struct intel_device_info *devinfo,
                            bool align_16B,
                            unsigned num_dwords,
                            bool write)
@@ -801,7 +801,7 @@ brw_dp_oword_block_rw_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_a64_untyped_surface_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_a64_untyped_surface_rw_desc(const struct intel_device_info *devinfo,
                                    unsigned exec_size, /**< 0 for SIMD4x2 */
                                    unsigned num_channels,
                                    bool write)
@@ -826,7 +826,7 @@ brw_dp_a64_untyped_surface_rw_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_a64_oword_block_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_a64_oword_block_rw_desc(const struct intel_device_info *devinfo,
                                bool align_16B,
                                unsigned num_dwords,
                                bool write)
@@ -864,7 +864,7 @@ brw_mdc_a64_ds(unsigned elems)
 }
 
 static inline uint32_t
-brw_dp_a64_byte_scattered_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_a64_byte_scattered_rw_desc(const struct intel_device_info *devinfo,
                                   unsigned exec_size, /**< 0 for SIMD4x2 */
                                   unsigned bit_size,
                                   bool write)
@@ -886,7 +886,7 @@ brw_dp_a64_byte_scattered_rw_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_a64_untyped_atomic_desc(const struct gen_device_info *devinfo,
+brw_dp_a64_untyped_atomic_desc(const struct intel_device_info *devinfo,
                                ASSERTED unsigned exec_size, /**< 0 for SIMD4x2 */
                                unsigned bit_size,
                                unsigned atomic_op,
@@ -911,7 +911,7 @@ brw_dp_a64_untyped_atomic_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_a64_untyped_atomic_float_desc(const struct gen_device_info *devinfo,
+brw_dp_a64_untyped_atomic_float_desc(const struct intel_device_info *devinfo,
                                      ASSERTED unsigned exec_size,
                                      unsigned bit_size,
                                      unsigned atomic_op,
@@ -936,7 +936,7 @@ brw_dp_a64_untyped_atomic_float_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_typed_atomic_desc(const struct gen_device_info *devinfo,
+brw_dp_typed_atomic_desc(const struct intel_device_info *devinfo,
                          unsigned exec_size,
                          unsigned exec_group,
                          unsigned atomic_op,
@@ -969,7 +969,7 @@ brw_dp_typed_atomic_desc(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_dp_typed_surface_rw_desc(const struct gen_device_info *devinfo,
+brw_dp_typed_surface_rw_desc(const struct intel_device_info *devinfo,
                              unsigned exec_size,
                              unsigned exec_group,
                              unsigned num_channels,
@@ -1034,7 +1034,7 @@ brw_mdc_sm2_exec_size(uint32_t sm2)
 }
 
 static inline uint32_t
-brw_btd_spawn_desc(ASSERTED const struct gen_device_info *devinfo,
+brw_btd_spawn_desc(ASSERTED const struct intel_device_info *devinfo,
                    unsigned exec_size, unsigned msg_type)
 {
    assert(devinfo->has_ray_tracing);
@@ -1045,21 +1045,21 @@ brw_btd_spawn_desc(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_btd_spawn_msg_type(UNUSED const struct gen_device_info *devinfo,
+brw_btd_spawn_msg_type(UNUSED const struct intel_device_info *devinfo,
                        uint32_t desc)
 {
    return GET_BITS(desc, 17, 14);
 }
 
 static inline uint32_t
-brw_btd_spawn_exec_size(UNUSED const struct gen_device_info *devinfo,
+brw_btd_spawn_exec_size(UNUSED const struct intel_device_info *devinfo,
                         uint32_t desc)
 {
    return brw_mdc_sm2_exec_size(GET_BITS(desc, 8, 8));
 }
 
 static inline uint32_t
-brw_rt_trace_ray_desc(ASSERTED const struct gen_device_info *devinfo,
+brw_rt_trace_ray_desc(ASSERTED const struct intel_device_info *devinfo,
                       unsigned exec_size)
 {
    assert(devinfo->has_ray_tracing);
@@ -1070,7 +1070,7 @@ brw_rt_trace_ray_desc(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-brw_rt_trace_ray_desc_exec_size(UNUSED const struct gen_device_info *devinfo,
+brw_rt_trace_ray_desc_exec_size(UNUSED const struct intel_device_info *devinfo,
                                 uint32_t desc)
 {
    return brw_mdc_sm2_exec_size(GET_BITS(desc, 8, 8));
@@ -1081,7 +1081,7 @@ brw_rt_trace_ray_desc_exec_size(UNUSED const struct gen_device_info *devinfo,
  * interpolator function controls.
  */
 static inline uint32_t
-brw_pixel_interp_desc(UNUSED const struct gen_device_info *devinfo,
+brw_pixel_interp_desc(UNUSED const struct intel_device_info *devinfo,
                       unsigned msg_type,
                       bool noperspective,
                       unsigned simd_mode,
@@ -1229,7 +1229,7 @@ void brw_shader_time_add(struct brw_codegen *p,
  * instruction.
  */
 static inline unsigned
-brw_jump_scale(const struct gen_device_info *devinfo)
+brw_jump_scale(const struct intel_device_info *devinfo)
 {
    /* Broadwell measures jump targets in bytes. */
    if (devinfo->ver >= 8)
@@ -1356,7 +1356,7 @@ brw_float_controls_mode(struct brw_codegen *p,
                         unsigned mode, unsigned mask);
 
 void
-brw_update_reloc_imm(const struct gen_device_info *devinfo,
+brw_update_reloc_imm(const struct intel_device_info *devinfo,
                      brw_inst *inst,
                      uint32_t value);
 
@@ -1413,24 +1413,24 @@ enum brw_conditional_mod brw_swap_cmod(enum brw_conditional_mod cmod);
 /* brw_eu_compact.c */
 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
                               struct disasm_info *disasm);
-void brw_uncompact_instruction(const struct gen_device_info *devinfo,
+void brw_uncompact_instruction(const struct intel_device_info *devinfo,
                                brw_inst *dst, brw_compact_inst *src);
-bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
+bool brw_try_compact_instruction(const struct intel_device_info *devinfo,
                                  brw_compact_inst *dst, const brw_inst *src);
 
-void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
+void brw_debug_compact_uncompact(const struct intel_device_info *devinfo,
                                  brw_inst *orig, brw_inst *uncompacted);
 
 /* brw_eu_validate.c */
-bool brw_validate_instruction(const struct gen_device_info *devinfo,
+bool brw_validate_instruction(const struct intel_device_info *devinfo,
                               const brw_inst *inst, int offset,
                               struct disasm_info *disasm);
-bool brw_validate_instructions(const struct gen_device_info *devinfo,
+bool brw_validate_instructions(const struct intel_device_info *devinfo,
                                const void *assembly, int start_offset, int end_offset,
                                struct disasm_info *disasm);
 
 static inline int
-next_offset(const struct gen_device_info *devinfo, void *store, int offset)
+next_offset(const struct intel_device_info *devinfo, void *store, int offset)
 {
    brw_inst *insn = (brw_inst *)((char *)store + offset);
 
@@ -1450,39 +1450,39 @@ struct opcode_desc {
 };
 
 const struct opcode_desc *
-brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
+brw_opcode_desc(const struct intel_device_info *devinfo, enum opcode opcode);
 
 const struct opcode_desc *
-brw_opcode_desc_from_hw(const struct gen_device_info *devinfo, unsigned hw);
+brw_opcode_desc_from_hw(const struct intel_device_info *devinfo, unsigned hw);
 
 static inline unsigned
-brw_opcode_encode(const struct gen_device_info *devinfo, enum opcode opcode)
+brw_opcode_encode(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    return brw_opcode_desc(devinfo, opcode)->hw;
 }
 
 static inline enum opcode
-brw_opcode_decode(const struct gen_device_info *devinfo, unsigned hw)
+brw_opcode_decode(const struct intel_device_info *devinfo, unsigned hw)
 {
    const struct opcode_desc *desc = brw_opcode_desc_from_hw(devinfo, hw);
    return desc ? (enum opcode)desc->ir : BRW_OPCODE_ILLEGAL;
 }
 
 static inline void
-brw_inst_set_opcode(const struct gen_device_info *devinfo,
+brw_inst_set_opcode(const struct intel_device_info *devinfo,
                     brw_inst *inst, enum opcode opcode)
 {
    brw_inst_set_hw_opcode(devinfo, inst, brw_opcode_encode(devinfo, opcode));
 }
 
 static inline enum opcode
-brw_inst_opcode(const struct gen_device_info *devinfo, const brw_inst *inst)
+brw_inst_opcode(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_opcode_decode(devinfo, brw_inst_hw_opcode(devinfo, inst));
 }
 
 static inline bool
-is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
+is_3src(const struct intel_device_info *devinfo, enum opcode opcode)
 {
    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
    return desc && desc->nsrc == 3;
diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c
index d20f7f9cc45..c4423b3d2af 100644
--- a/src/intel/compiler/brw_eu_compact.c
+++ b/src/intel/compiler/brw_eu_compact.c
@@ -1065,7 +1065,7 @@ static const uint32_t gfx12_3src_subreg_table[32] = {
 };
 
 struct compaction_state {
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
    const uint32_t *control_index_table;
    const uint32_t *datatype_table;
    const uint16_t *subreg_table;
@@ -1074,13 +1074,13 @@ struct compaction_state {
 };
 
 static void compaction_state_init(struct compaction_state *c,
-                                  const struct gen_device_info *devinfo);
+                                  const struct intel_device_info *devinfo);
 
 static bool
 set_control_index(const struct compaction_state *c,
                   brw_compact_inst *dst, const brw_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint32_t uncompacted; /* 17b/G45; 19b/IVB+; 21b/TGL+ */
 
    if (devinfo->ver >= 12) {
@@ -1125,7 +1125,7 @@ static bool
 set_datatype_index(const struct compaction_state *c, brw_compact_inst *dst,
                    const brw_inst *src, bool is_immediate)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint32_t uncompacted; /* 18b/G45+; 21b/BDW+; 20b/TGL+ */
 
    if (devinfo->ver >= 12) {
@@ -1168,7 +1168,7 @@ static bool
 set_subreg_index(const struct compaction_state *c, brw_compact_inst *dst,
                  const brw_inst *src, bool is_immediate)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint16_t uncompacted; /* 15b */
 
    if (devinfo->ver >= 12) {
@@ -1199,7 +1199,7 @@ static bool
 set_src0_index(const struct compaction_state *c, brw_compact_inst *dst,
                const brw_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint16_t uncompacted; /* 12b */
    int table_len;
 
@@ -1229,7 +1229,7 @@ static bool
 set_src1_index(const struct compaction_state *c, brw_compact_inst *dst,
                const brw_inst *src, bool is_immediate, unsigned imm)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    if (is_immediate) {
       if (devinfo->ver >= 12) {
          /* src1 index takes the low 4 bits of the 12-bit compacted value */
@@ -1267,7 +1267,7 @@ set_src1_index(const struct compaction_state *c, brw_compact_inst *dst,
 }
 
 static bool
-set_3src_control_index(const struct gen_device_info *devinfo,
+set_3src_control_index(const struct intel_device_info *devinfo,
                        brw_compact_inst *dst, const brw_inst *src)
 {
    assert(devinfo->ver >= 8);
@@ -1348,7 +1348,7 @@ set_3src_control_index(const struct gen_device_info *devinfo,
 }
 
 static bool
-set_3src_source_index(const struct gen_device_info *devinfo,
+set_3src_source_index(const struct intel_device_info *devinfo,
                       brw_compact_inst *dst, const brw_inst *src)
 {
    assert(devinfo->ver >= 8);
@@ -1415,7 +1415,7 @@ set_3src_source_index(const struct gen_device_info *devinfo,
 }
 
 static bool
-set_3src_subreg_index(const struct gen_device_info *devinfo,
+set_3src_subreg_index(const struct intel_device_info *devinfo,
                       brw_compact_inst *dst, const brw_inst *src)
 {
    assert(devinfo->ver >= 12);
@@ -1437,7 +1437,7 @@ set_3src_subreg_index(const struct gen_device_info *devinfo,
 }
 
 static bool
-has_unmapped_bits(const struct gen_device_info *devinfo, const brw_inst *src)
+has_unmapped_bits(const struct intel_device_info *devinfo, const brw_inst *src)
 {
    /* EOT can only be mapped on a send if the src1 is an immediate */
    if ((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC ||
@@ -1471,7 +1471,7 @@ has_unmapped_bits(const struct gen_device_info *devinfo, const brw_inst *src)
 }
 
 static bool
-has_3src_unmapped_bits(const struct gen_device_info *devinfo,
+has_3src_unmapped_bits(const struct intel_device_info *devinfo,
                        const brw_inst *src)
 {
    /* Check for three-source instruction bits that don't map to any of the
@@ -1499,7 +1499,7 @@ has_3src_unmapped_bits(const struct gen_device_info *devinfo,
 }
 
 static bool
-brw_try_compact_3src_instruction(const struct gen_device_info *devinfo,
+brw_try_compact_3src_instruction(const struct intel_device_info *devinfo,
                                  brw_compact_inst *dst, const brw_inst *src)
 {
    assert(devinfo->ver >= 8);
@@ -1565,7 +1565,7 @@ brw_try_compact_3src_instruction(const struct gen_device_info *devinfo,
  * Returns the compacted immediate, or -1 if immediate cannot be compacted
  */
 static int
-compact_immediate(const struct gen_device_info *devinfo,
+compact_immediate(const struct intel_device_info *devinfo,
                   enum brw_reg_type type, unsigned imm)
 {
    if (devinfo->ver >= 12) {
@@ -1636,7 +1636,7 @@ compact_immediate(const struct gen_device_info *devinfo,
 }
 
 static int
-uncompact_immediate(const struct gen_device_info *devinfo,
+uncompact_immediate(const struct intel_device_info *devinfo,
                     enum brw_reg_type type, unsigned compact_imm)
 {
    if (devinfo->ver >= 12) {
@@ -1677,7 +1677,7 @@ uncompact_immediate(const struct gen_device_info *devinfo,
 }
 
 static bool
-has_immediate(const struct gen_device_info *devinfo, const brw_inst *inst,
+has_immediate(const struct intel_device_info *devinfo, const brw_inst *inst,
               enum brw_reg_type *type)
 {
    if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
@@ -1696,7 +1696,7 @@ has_immediate(const struct gen_device_info *devinfo, const brw_inst *inst,
  * compaction.
  */
 static brw_inst
-precompact(const struct gen_device_info *devinfo, brw_inst inst)
+precompact(const struct intel_device_info *devinfo, brw_inst inst)
 {
    if (brw_inst_src0_reg_file(devinfo, &inst) != BRW_IMMEDIATE_VALUE)
       return inst;
@@ -1791,7 +1791,7 @@ static bool
 try_compact_instruction(const struct compaction_state *c,
                         brw_compact_inst *dst, const brw_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    brw_compact_inst temp;
 
    assert(brw_inst_cmpt_control(devinfo, src) == 0);
@@ -1895,7 +1895,7 @@ try_compact_instruction(const struct compaction_state *c,
 }
 
 bool
-brw_try_compact_instruction(const struct gen_device_info *devinfo,
+brw_try_compact_instruction(const struct intel_device_info *devinfo,
                             brw_compact_inst *dst, const brw_inst *src)
 {
    struct compaction_state c;
@@ -1907,7 +1907,7 @@ static void
 set_uncompacted_control(const struct compaction_state *c, brw_inst *dst,
                         brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint32_t uncompacted =
       c->control_index_table[brw_compact_inst_control_index(devinfo, src)];
 
@@ -1941,7 +1941,7 @@ static void
 set_uncompacted_datatype(const struct compaction_state *c, brw_inst *dst,
                          brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint32_t uncompacted =
       c->datatype_table[brw_compact_inst_datatype_index(devinfo, src)];
 
@@ -1970,7 +1970,7 @@ static void
 set_uncompacted_subreg(const struct compaction_state *c, brw_inst *dst,
                        brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint16_t uncompacted =
       c->subreg_table[brw_compact_inst_subreg_index(devinfo, src)];
 
@@ -1989,7 +1989,7 @@ static void
 set_uncompacted_src0(const struct compaction_state *c, brw_inst *dst,
                      brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint32_t compacted = brw_compact_inst_src0_index(devinfo, src);
    uint16_t uncompacted = c->src0_index_table[compacted];
 
@@ -2008,7 +2008,7 @@ static void
 set_uncompacted_src1(const struct compaction_state *c, brw_inst *dst,
                      brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    uint16_t uncompacted =
       c->src1_index_table[brw_compact_inst_src1_index(devinfo, src)];
 
@@ -2027,7 +2027,7 @@ static void
 set_uncompacted_3src_control_index(const struct compaction_state *c,
                                    brw_inst *dst, brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    assert(devinfo->ver >= 8);
 
    if (devinfo->verx10 >= 125) {
@@ -2088,7 +2088,7 @@ set_uncompacted_3src_control_index(const struct compaction_state *c,
 }
 
 static void
-set_uncompacted_3src_source_index(const struct gen_device_info *devinfo,
+set_uncompacted_3src_source_index(const struct intel_device_info *devinfo,
                                   brw_inst *dst, brw_compact_inst *src)
 {
    assert(devinfo->ver >= 8);
@@ -2137,7 +2137,7 @@ set_uncompacted_3src_source_index(const struct gen_device_info *devinfo,
 }
 
 static void
-set_uncompacted_3src_subreg_index(const struct gen_device_info *devinfo,
+set_uncompacted_3src_subreg_index(const struct intel_device_info *devinfo,
                                   brw_inst *dst, brw_compact_inst *src)
 {
    assert(devinfo->ver >= 12);
@@ -2155,7 +2155,7 @@ static void
 brw_uncompact_3src_instruction(const struct compaction_state *c,
                                brw_inst *dst, brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    assert(devinfo->ver >= 8);
 
 #define uncompact(field) \
@@ -2203,7 +2203,7 @@ static void
 uncompact_instruction(const struct compaction_state *c, brw_inst *dst,
                       brw_compact_inst *src)
 {
-   const struct gen_device_info *devinfo = c->devinfo;
+   const struct intel_device_info *devinfo = c->devinfo;
    memset(dst, 0, sizeof(*dst));
 
    if (devinfo->ver >= 8 &&
@@ -2263,7 +2263,7 @@ uncompact_instruction(const struct compaction_state *c, brw_inst *dst,
 }
 
 void
-brw_uncompact_instruction(const struct gen_device_info *devinfo, brw_inst *dst,
+brw_uncompact_instruction(const struct intel_device_info *devinfo, brw_inst *dst,
                           brw_compact_inst *src)
 {
    struct compaction_state c;
@@ -2271,7 +2271,7 @@ brw_uncompact_instruction(const struct gen_device_info *devinfo, brw_inst *dst,
    uncompact_instruction(&c, dst, src);
 }
 
-void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
+void brw_debug_compact_uncompact(const struct intel_device_info *devinfo,
                                  brw_inst *orig,
                                  brw_inst *uncompacted)
 {
@@ -2308,7 +2308,7 @@ compacted_between(int old_ip, int old_target_ip, int *compacted_counts)
 }
 
 static void
-update_uip_jip(const struct gen_device_info *devinfo, brw_inst *insn,
+update_uip_jip(const struct intel_device_info *devinfo, brw_inst *insn,
                int this_old_ip, int *compacted_counts)
 {
    /* JIP and UIP are in units of:
@@ -2336,7 +2336,7 @@ update_uip_jip(const struct gen_device_info *devinfo, brw_inst *insn,
 }
 
 static void
-update_gfx4_jump_count(const struct gen_device_info *devinfo, brw_inst *insn,
+update_gfx4_jump_count(const struct intel_device_info *devinfo, brw_inst *insn,
                        int this_old_ip, int *compacted_counts)
 {
    assert(devinfo->ver == 5 || devinfo->is_g4x);
@@ -2360,7 +2360,7 @@ update_gfx4_jump_count(const struct gen_device_info *devinfo, brw_inst *insn,
 
 static void
 compaction_state_init(struct compaction_state *c,
-                      const struct gen_device_info *devinfo)
+                      const struct intel_device_info *devinfo)
 {
    assert(g45_control_index_table[ARRAY_SIZE(g45_control_index_table) - 1] != 0);
    assert(g45_datatype_table[ARRAY_SIZE(g45_datatype_table) - 1] != 0);
@@ -2450,7 +2450,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset,
    if (INTEL_DEBUG & DEBUG_NO_COMPACTION)
       return;
 
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    void *store = p->store + start_offset / 16;
    /* For an instruction at byte offset 16*i before compaction, this is the
     * number of compacted instructions minus the number of padding NOP/NENOPs
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h
index dcce7511646..b9577ef537b 100644
--- a/src/intel/compiler/brw_eu_defines.h
+++ b/src/intel/compiler/brw_eu_defines.h
@@ -1194,7 +1194,7 @@ tgl_swsb_src_dep(struct tgl_swsb swsb)
  * SWSB annotation.
  */
 static inline uint8_t
-tgl_swsb_encode(const struct gen_device_info *devinfo, struct tgl_swsb swsb)
+tgl_swsb_encode(const struct intel_device_info *devinfo, struct tgl_swsb swsb)
 {
    if (!swsb.mode) {
       const unsigned pipe = devinfo->verx10 < 125 ? 0 :
@@ -1216,7 +1216,7 @@ tgl_swsb_encode(const struct gen_device_info *devinfo, struct tgl_swsb swsb)
  * tgl_swsb.
  */
 static inline struct tgl_swsb
-tgl_swsb_decode(const struct gen_device_info *devinfo, const enum opcode opcode,
+tgl_swsb_decode(const struct intel_device_info *devinfo, const enum opcode opcode,
                 const uint8_t x)
 {
    if (x & 0x80) {
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 2f53609ed9e..4404a79642f 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -47,7 +47,7 @@ gfx6_resolve_implied_move(struct brw_codegen *p,
 			  struct brw_reg *src,
 			  unsigned msg_reg_nr)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    if (devinfo->ver < 6)
       return;
 
@@ -78,7 +78,7 @@ gfx7_convert_mrf_to_grf(struct brw_codegen *p, struct brw_reg *reg)
     * Since we're pretending to have 16 MRFs anyway, we may as well use the
     * registers required for messages with EOT.
     */
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    if (devinfo->ver >= 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
       reg->file = BRW_GENERAL_REGISTER_FILE;
       reg->nr += GFX7_MRF_HACK_START;
@@ -88,7 +88,7 @@ gfx7_convert_mrf_to_grf(struct brw_codegen *p, struct brw_reg *reg)
 void
 brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    if (dest.file == BRW_MESSAGE_REGISTER_FILE)
       assert((dest.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->ver));
@@ -208,7 +208,7 @@ brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest)
 void
 brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    if (reg.file == BRW_MESSAGE_REGISTER_FILE)
       assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->ver));
@@ -344,7 +344,7 @@ brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
 void
 brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    if (reg.file == BRW_GENERAL_REGISTER_FILE)
       assert(reg.nr < 128);
@@ -455,7 +455,7 @@ void
 brw_set_desc_ex(struct brw_codegen *p, brw_inst *inst,
                 unsigned desc, unsigned ex_desc)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
           brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC);
    if (devinfo->ver < 12)
@@ -473,7 +473,7 @@ static void brw_set_math_message( struct brw_codegen *p,
 				  bool low_precision,
 				  unsigned dataType )
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    unsigned msg_length;
    unsigned response_length;
 
@@ -520,7 +520,7 @@ static void brw_set_ff_sync_message(struct brw_codegen *p,
 				    unsigned response_length,
 				    bool end_of_thread)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    brw_set_desc(p, insn, brw_message_desc(
                    devinfo, 1, response_length, true));
@@ -544,7 +544,7 @@ static void brw_set_urb_message( struct brw_codegen *p,
 				 unsigned offset,
 				 unsigned swizzle_control )
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    assert(devinfo->ver < 7 || swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
    assert(devinfo->ver < 7 || !(flags & BRW_URB_WRITE_ALLOCATE));
@@ -591,7 +591,7 @@ gfx7_set_dp_scratch_message(struct brw_codegen *p,
                             unsigned rlen,
                             bool header_present)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    assert(num_regs == 1 || num_regs == 2 || num_regs == 4 ||
           (devinfo->ver >= 8 && num_regs == 8));
    const unsigned block_size = (devinfo->ver >= 8 ? util_logbase2(num_regs) :
@@ -610,7 +610,7 @@ gfx7_set_dp_scratch_message(struct brw_codegen *p,
 }
 
 static void
-brw_inst_set_state(const struct gen_device_info *devinfo,
+brw_inst_set_state(const struct intel_device_info *devinfo,
                    brw_inst *insn,
                    const struct brw_insn_state *state)
 {
@@ -694,7 +694,7 @@ brw_append_data(struct brw_codegen *p, void *data,
 brw_inst *
 brw_next_insn(struct brw_codegen *p, unsigned opcode)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = brw_append_insns(p, 1, sizeof(brw_inst));
 
    memset(insn, 0, sizeof(*insn));
@@ -742,7 +742,7 @@ get_3src_subreg_nr(struct brw_reg reg)
 }
 
 static enum gfx10_align1_3src_vertical_stride
-to_3src_align1_vstride(const struct gen_device_info *devinfo,
+to_3src_align1_vstride(const struct intel_device_info *devinfo,
                        enum brw_vertical_stride vstride)
 {
    switch (vstride) {
@@ -786,7 +786,7 @@ static brw_inst *
 brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
          struct brw_reg src0, struct brw_reg src1, struct brw_reg src2)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *inst = next_insn(p, opcode);
 
    gfx7_convert_mrf_to_grf(p, &dest);
@@ -1102,7 +1102,7 @@ ALU2(SUBB)
 brw_inst *
 brw_MOV(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    /* When converting F->DF on IVB/BYT, every odd source channel is ignored.
     * To avoid the problems that causes, we use an <X,2,0> source region to
@@ -1227,7 +1227,7 @@ brw_PLN(struct brw_codegen *p, struct brw_reg dest,
 brw_inst *
 brw_F32TO16(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
    /* The F32TO16 instruction doesn't support 32-bit destination types in
     * Align1 mode, and neither does the Gfx8 implementation in terms of a
@@ -1277,7 +1277,7 @@ brw_F32TO16(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src)
 brw_inst *
 brw_F16TO32(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    bool align16 = brw_get_default_access_mode(p) == BRW_ALIGN_16;
 
    if (align16) {
@@ -1327,7 +1327,7 @@ brw_inst *
 brw_JMPI(struct brw_codegen *p, struct brw_reg index,
          unsigned predicate_control)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_reg ip = brw_ip_reg();
    brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index);
 
@@ -1397,7 +1397,7 @@ get_inner_do_insn(struct brw_codegen *p)
 brw_inst *
 brw_IF(struct brw_codegen *p, unsigned execute_size)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
@@ -1446,7 +1446,7 @@ brw_inst *
 gfx6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 	struct brw_reg src0, struct brw_reg src1)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
@@ -1472,7 +1472,7 @@ static void
 convert_IF_ELSE_to_ADD(struct brw_codegen *p,
                        brw_inst *if_inst, brw_inst *else_inst)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    /* The next instruction (where the ENDIF would be, if it existed) */
    brw_inst *next_inst = &p->store[p->nr_insn];
@@ -1513,7 +1513,7 @@ static void
 patch_IF_ELSE(struct brw_codegen *p,
               brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    /* We shouldn't be patching IF and ELSE instructions in single program flow
     * mode when gen < 6, because in single program flow mode on those
@@ -1600,7 +1600,7 @@ patch_IF_ELSE(struct brw_codegen *p,
 void
 brw_ELSE(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_ELSE);
@@ -1639,7 +1639,7 @@ brw_ELSE(struct brw_codegen *p)
 void
 brw_ENDIF(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = NULL;
    brw_inst *else_inst = NULL;
    brw_inst *if_inst = NULL;
@@ -1720,7 +1720,7 @@ brw_ENDIF(struct brw_codegen *p)
 brw_inst *
 brw_BREAK(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_BREAK);
@@ -1747,7 +1747,7 @@ brw_BREAK(struct brw_codegen *p)
 brw_inst *
 brw_CONT(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_CONTINUE);
@@ -1771,7 +1771,7 @@ brw_CONT(struct brw_codegen *p)
 brw_inst *
 brw_HALT(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_HALT);
@@ -1816,7 +1816,7 @@ brw_HALT(struct brw_codegen *p)
 brw_inst *
 brw_DO(struct brw_codegen *p, unsigned execute_size)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    if (devinfo->ver >= 6 || p->single_program_flow) {
       push_loop_stack(p, &p->store[p->nr_insn]);
@@ -1850,7 +1850,7 @@ brw_DO(struct brw_codegen *p, unsigned execute_size)
 static void
 brw_patch_break_cont(struct brw_codegen *p, brw_inst *while_inst)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *do_inst = get_inner_do_insn(p);
    brw_inst *inst;
    unsigned br = brw_jump_scale(devinfo);
@@ -1875,7 +1875,7 @@ brw_patch_break_cont(struct brw_codegen *p, brw_inst *while_inst)
 brw_inst *
 brw_WHILE(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn, *do_insn;
    unsigned br = brw_jump_scale(devinfo);
 
@@ -1939,7 +1939,7 @@ brw_WHILE(struct brw_codegen *p)
  */
 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *jmp_insn = &p->store[jmp_insn_idx];
    unsigned jmpi = 1;
 
@@ -1963,7 +1963,7 @@ void brw_CMP(struct brw_codegen *p,
 	     struct brw_reg src0,
 	     struct brw_reg src1)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_CMP);
 
    brw_inst_set_cond_modifier(devinfo, insn, conditional);
@@ -1992,7 +1992,7 @@ void brw_CMPN(struct brw_codegen *p,
               struct brw_reg src0,
               struct brw_reg src1)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_CMPN);
 
    brw_inst_set_cond_modifier(devinfo, insn, conditional);
@@ -2029,7 +2029,7 @@ void gfx4_math(struct brw_codegen *p,
 	       struct brw_reg src,
 	       unsigned precision )
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
    unsigned data_type;
    if (has_scalar_region(src)) {
@@ -2062,7 +2062,7 @@ void gfx6_math(struct brw_codegen *p,
 	       struct brw_reg src0,
 	       struct brw_reg src1)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_MATH);
 
    assert(devinfo->ver >= 6);
@@ -2131,7 +2131,7 @@ void brw_oword_block_write_scratch(struct brw_codegen *p,
 				   int num_regs,
 				   unsigned offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 7 ? GFX7_SFID_DATAPORT_DATA_CACHE :
        devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_RENDER_CACHE :
@@ -2244,7 +2244,7 @@ brw_oword_block_read_scratch(struct brw_codegen *p,
 			     int num_regs,
 			     unsigned offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const struct tgl_swsb swsb = brw_get_default_swsb(p);
 
    if (devinfo->ver >= 6)
@@ -2357,7 +2357,7 @@ void brw_oword_block_read(struct brw_codegen *p,
 			  uint32_t offset,
 			  uint32_t bind_table_index)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_CONSTANT_CACHE :
        BRW_SFID_DATAPORT_READ);
@@ -2429,7 +2429,7 @@ brw_fb_WRITE(struct brw_codegen *p,
              bool last_render_target,
              bool header_present)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_RENDER_CACHE :
        BRW_SFID_DATAPORT_WRITE);
@@ -2485,7 +2485,7 @@ gfx9_fb_READ(struct brw_codegen *p,
              unsigned response_length,
              bool per_sample)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    assert(devinfo->ver >= 9);
    const unsigned msg_subtype =
       brw_get_default_exec_size(p) == BRW_EXECUTE_16 ? 0 : 1;
@@ -2524,7 +2524,7 @@ void brw_SAMPLE(struct brw_codegen *p,
 		unsigned simd_mode,
 		unsigned return_format)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    if (msg_reg_nr != -1)
@@ -2576,7 +2576,7 @@ void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
     * exclusively use the offset - we have to use both.
     */
 
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
       const int sampler_state_size = 16; /* 16 bytes */
@@ -2623,7 +2623,7 @@ void brw_urb_WRITE(struct brw_codegen *p,
 		   unsigned offset,
 		   unsigned swizzle)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    gfx6_resolve_implied_move(p, &src0, msg_reg_nr);
@@ -2670,7 +2670,7 @@ brw_send_indirect_message(struct brw_codegen *p,
                           unsigned desc_imm,
                           bool eot)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_inst *send;
 
    dst = retype(dst, BRW_REGISTER_TYPE_UW);
@@ -2727,7 +2727,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
                                 unsigned ex_desc_imm,
                                 bool eot)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_inst *send;
 
    dst = retype(dst, BRW_REGISTER_TYPE_UW);
@@ -2869,7 +2869,7 @@ brw_send_indirect_surface_message(struct brw_codegen *p,
 }
 
 static bool
-while_jumps_before_offset(const struct gen_device_info *devinfo,
+while_jumps_before_offset(const struct intel_device_info *devinfo,
                           brw_inst *insn, int while_offset, int start_offset)
 {
    int scale = 16 / brw_jump_scale(devinfo);
@@ -2885,7 +2885,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset)
 {
    int offset;
    void *store = p->store;
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    int depth = 0;
 
@@ -2930,7 +2930,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset)
 static int
 brw_find_loop_end(struct brw_codegen *p, int start_offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    int offset;
    void *store = p->store;
 
@@ -2959,7 +2959,7 @@ brw_find_loop_end(struct brw_codegen *p, int start_offset)
 void
 brw_set_uip_jip(struct brw_codegen *p, int start_offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    int offset;
    int br = brw_jump_scale(devinfo);
    int scale = 16 / br;
@@ -3037,7 +3037,7 @@ void brw_ff_sync(struct brw_codegen *p,
 		   unsigned response_length,
 		   bool eot)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    gfx6_resolve_implied_move(p, &src0, msg_reg_nr);
@@ -3076,7 +3076,7 @@ brw_svb_write(struct brw_codegen *p,
               unsigned binding_table_index,
               bool   send_commit_msg)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 7 ? GFX7_SFID_DATAPORT_DATA_CACHE :
        devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_RENDER_CACHE :
@@ -3120,7 +3120,7 @@ brw_untyped_atomic(struct brw_codegen *p,
                    bool response_expected,
                    bool header_present)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned sfid = (devinfo->ver >= 8 || devinfo->is_haswell ?
                           HSW_SFID_DATAPORT_DATA_CACHE_1 :
                           GFX7_SFID_DATAPORT_DATA_CACHE);
@@ -3155,7 +3155,7 @@ brw_untyped_surface_read(struct brw_codegen *p,
                          unsigned msg_length,
                          unsigned num_channels)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned sfid = (devinfo->ver >= 8 || devinfo->is_haswell ?
                           HSW_SFID_DATAPORT_DATA_CACHE_1 :
                           GFX7_SFID_DATAPORT_DATA_CACHE);
@@ -3178,7 +3178,7 @@ brw_untyped_surface_write(struct brw_codegen *p,
                           unsigned num_channels,
                           bool header_present)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned sfid = (devinfo->ver >= 8 || devinfo->is_haswell ?
                           HSW_SFID_DATAPORT_DATA_CACHE_1 :
                           GFX7_SFID_DATAPORT_DATA_CACHE);
@@ -3204,7 +3204,7 @@ brw_set_memory_fence_message(struct brw_codegen *p,
                              bool commit_enable,
                              unsigned bti)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    brw_set_desc(p, insn, brw_message_desc(
                    devinfo, 1, (commit_enable ? 1 : 0), true));
@@ -3238,7 +3238,7 @@ brw_memory_fence(struct brw_codegen *p,
                  bool commit_enable,
                  unsigned bti)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    dst = retype(vec1(dst), BRW_REGISTER_TYPE_UW);
    src = retype(vec1(src), BRW_REGISTER_TYPE_UD);
@@ -3264,7 +3264,7 @@ brw_pixel_interpolator_query(struct brw_codegen *p,
                              unsigned msg_length,
                              unsigned response_length)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const uint16_t exec_size = brw_get_default_exec_size(p);
    const unsigned slot_group = brw_get_default_group(p) / 16;
    const unsigned simd_mode = (exec_size == BRW_EXECUTE_16);
@@ -3289,7 +3289,7 @@ void
 brw_find_live_channel(struct brw_codegen *p, struct brw_reg dst,
                       struct brw_reg mask)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned exec_size = 1 << brw_get_default_exec_size(p);
    const unsigned qtr_control = brw_get_default_group(p) / 8;
    brw_inst *inst;
@@ -3414,7 +3414,7 @@ brw_broadcast(struct brw_codegen *p,
               struct brw_reg src,
               struct brw_reg idx)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const bool align1 = brw_get_default_access_mode(p) == BRW_ALIGN_1;
    brw_inst *inst;
 
@@ -3494,7 +3494,7 @@ brw_broadcast(struct brw_codegen *p,
 
          /* Use indirect addressing to fetch the specified component. */
          if (type_sz(src.type) > 4 &&
-             (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+             (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
               !devinfo->has_64bit_float)) {
             /* From the Cherryview PRM Vol 7. "Register Region Restrictions":
              *
@@ -3562,7 +3562,7 @@ void brw_shader_time_add(struct brw_codegen *p,
                          struct brw_reg payload,
                          uint32_t surf_index)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned sfid = (devinfo->ver >= 8 || devinfo->is_haswell ?
                           HSW_SFID_DATAPORT_DATA_CACHE_1 :
                           GFX7_SFID_DATAPORT_DATA_CACHE);
@@ -3598,7 +3598,7 @@ void brw_shader_time_add(struct brw_codegen *p,
 void
 brw_barrier(struct brw_codegen *p, struct brw_reg src)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_inst *inst;
 
    assert(devinfo->ver >= 7);
@@ -3626,7 +3626,7 @@ brw_barrier(struct brw_codegen *p, struct brw_reg src)
 void
 brw_WAIT(struct brw_codegen *p)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_inst *insn;
 
    struct brw_reg src = brw_notification_reg();
@@ -3674,7 +3674,7 @@ brw_float_controls_mode(struct brw_codegen *p,
 }
 
 void
-brw_update_reloc_imm(const struct gen_device_info *devinfo,
+brw_update_reloc_imm(const struct intel_device_info *devinfo,
                      brw_inst *inst,
                      uint32_t value)
 {
diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index d0960610223..25acf4e8736 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -90,7 +90,7 @@ contains(const struct string haystack, const struct string needle)
 #define WIDTH(width)   (1 << (width))
 
 static bool
-inst_is_send(const struct gen_device_info *devinfo, const brw_inst *inst)
+inst_is_send(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    switch (brw_inst_opcode(devinfo, inst)) {
    case BRW_OPCODE_SEND:
@@ -104,7 +104,7 @@ inst_is_send(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static bool
-inst_is_split_send(const struct gen_device_info *devinfo, const brw_inst *inst)
+inst_is_split_send(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    if (devinfo->ver >= 12) {
       return inst_is_send(devinfo, inst);
@@ -132,14 +132,14 @@ signed_type(unsigned type)
 }
 
 static enum brw_reg_type
-inst_dst_type(const struct gen_device_info *devinfo, const brw_inst *inst)
+inst_dst_type(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return (devinfo->ver < 12 || !inst_is_send(devinfo, inst)) ?
       brw_inst_dst_type(devinfo, inst) : BRW_REGISTER_TYPE_D;
 }
 
 static bool
-inst_is_raw_move(const struct gen_device_info *devinfo, const brw_inst *inst)
+inst_is_raw_move(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    unsigned dst_type = signed_type(inst_dst_type(devinfo, inst));
    unsigned src_type = signed_type(brw_inst_src0_type(devinfo, inst));
@@ -162,14 +162,14 @@ inst_is_raw_move(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static bool
-dst_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
+dst_is_null(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_dst_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
           brw_inst_dst_da_reg_nr(devinfo, inst) == BRW_ARF_NULL;
 }
 
 static bool
-src0_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
+src0_is_null(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT &&
           brw_inst_src0_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
@@ -177,28 +177,28 @@ src0_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static bool
-src1_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
+src1_is_null(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src1_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
           brw_inst_src1_da_reg_nr(devinfo, inst) == BRW_ARF_NULL;
 }
 
 static bool
-src0_is_acc(const struct gen_device_info *devinfo, const brw_inst *inst)
+src0_is_acc(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src0_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
           (brw_inst_src0_da_reg_nr(devinfo, inst) & 0xF0) == BRW_ARF_ACCUMULATOR;
 }
 
 static bool
-src1_is_acc(const struct gen_device_info *devinfo, const brw_inst *inst)
+src1_is_acc(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src1_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
           (brw_inst_src1_da_reg_nr(devinfo, inst) & 0xF0) == BRW_ARF_ACCUMULATOR;
 }
 
 static bool
-src0_has_scalar_region(const struct gen_device_info *devinfo, const brw_inst *inst)
+src0_has_scalar_region(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src0_vstride(devinfo, inst) == BRW_VERTICAL_STRIDE_0 &&
           brw_inst_src0_width(devinfo, inst) == BRW_WIDTH_1 &&
@@ -206,7 +206,7 @@ src0_has_scalar_region(const struct gen_device_info *devinfo, const brw_inst *in
 }
 
 static bool
-src1_has_scalar_region(const struct gen_device_info *devinfo, const brw_inst *inst)
+src1_has_scalar_region(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    return brw_inst_src1_vstride(devinfo, inst) == BRW_VERTICAL_STRIDE_0 &&
           brw_inst_src1_width(devinfo, inst) == BRW_WIDTH_1 &&
@@ -214,7 +214,7 @@ src1_has_scalar_region(const struct gen_device_info *devinfo, const brw_inst *in
 }
 
 static unsigned
-num_sources_from_inst(const struct gen_device_info *devinfo,
+num_sources_from_inst(const struct intel_device_info *devinfo,
                       const brw_inst *inst)
 {
    const struct opcode_desc *desc =
@@ -269,7 +269,7 @@ num_sources_from_inst(const struct gen_device_info *devinfo,
 }
 
 static struct string
-invalid_values(const struct gen_device_info *devinfo, const brw_inst *inst)
+invalid_values(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    unsigned num_sources = num_sources_from_inst(devinfo, inst);
    struct string error_msg = { .str = NULL, .len = 0 };
@@ -339,7 +339,7 @@ invalid_values(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static struct string
-sources_not_null(const struct gen_device_info *devinfo,
+sources_not_null(const struct intel_device_info *devinfo,
                  const brw_inst *inst)
 {
    unsigned num_sources = num_sources_from_inst(devinfo, inst);
@@ -367,7 +367,7 @@ sources_not_null(const struct gen_device_info *devinfo,
 }
 
 static struct string
-alignment_supported(const struct gen_device_info *devinfo,
+alignment_supported(const struct intel_device_info *devinfo,
                     const brw_inst *inst)
 {
    struct string error_msg = { .str = NULL, .len = 0 };
@@ -379,7 +379,7 @@ alignment_supported(const struct gen_device_info *devinfo,
 }
 
 static bool
-inst_uses_src_acc(const struct gen_device_info *devinfo, const brw_inst *inst)
+inst_uses_src_acc(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    /* Check instructions that use implicit accumulator sources */
    switch (brw_inst_opcode(devinfo, inst)) {
@@ -399,7 +399,7 @@ inst_uses_src_acc(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static struct string
-send_restrictions(const struct gen_device_info *devinfo,
+send_restrictions(const struct intel_device_info *devinfo,
                   const brw_inst *inst)
 {
    struct string error_msg = { .str = NULL, .len = 0 };
@@ -466,7 +466,7 @@ send_restrictions(const struct gen_device_info *devinfo,
 }
 
 static bool
-is_unsupported_inst(const struct gen_device_info *devinfo,
+is_unsupported_inst(const struct intel_device_info *devinfo,
                     const brw_inst *inst)
 {
    return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_ILLEGAL;
@@ -519,7 +519,7 @@ execution_type_for_type(enum brw_reg_type type)
  * Returns the execution type of an instruction \p inst
  */
 static enum brw_reg_type
-execution_type(const struct gen_device_info *devinfo, const brw_inst *inst)
+execution_type(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    unsigned num_sources = num_sources_from_inst(devinfo, inst);
    enum brw_reg_type src0_exec_type, src1_exec_type;
@@ -602,7 +602,7 @@ is_packed(unsigned vstride, unsigned width, unsigned hstride)
  * to/from half-float.
  */
 static bool
-is_half_float_conversion(const struct gen_device_info *devinfo,
+is_half_float_conversion(const struct intel_device_info *devinfo,
                          const brw_inst *inst)
 {
    enum brw_reg_type dst_type = brw_inst_dst_type(devinfo, inst);
@@ -627,7 +627,7 @@ is_half_float_conversion(const struct gen_device_info *devinfo,
  * Returns whether an instruction is using mixed float operation mode
  */
 static bool
-is_mixed_float(const struct gen_device_info *devinfo, const brw_inst *inst)
+is_mixed_float(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    if (devinfo->ver < 8)
       return false;
@@ -662,7 +662,7 @@ is_mixed_float(const struct gen_device_info *devinfo, const brw_inst *inst)
  * to/from byte.
  */
 static bool
-is_byte_conversion(const struct gen_device_info *devinfo,
+is_byte_conversion(const struct intel_device_info *devinfo,
                    const brw_inst *inst)
 {
    enum brw_reg_type dst_type = brw_inst_dst_type(devinfo, inst);
@@ -687,7 +687,7 @@ is_byte_conversion(const struct gen_device_info *devinfo,
  * in the "Register Region Restrictions" section.
  */
 static struct string
-general_restrictions_based_on_operand_types(const struct gen_device_info *devinfo,
+general_restrictions_based_on_operand_types(const struct intel_device_info *devinfo,
                                             const brw_inst *inst)
 {
    const struct opcode_desc *desc =
@@ -919,7 +919,7 @@ general_restrictions_based_on_operand_types(const struct gen_device_info *devinf
  * in the "Register Region Restrictions" section.
  */
 static struct string
-general_restrictions_on_region_parameters(const struct gen_device_info *devinfo,
+general_restrictions_on_region_parameters(const struct intel_device_info *devinfo,
                                           const brw_inst *inst)
 {
    const struct opcode_desc *desc =
@@ -1078,7 +1078,7 @@ general_restrictions_on_region_parameters(const struct gen_device_info *devinfo,
 }
 
 static struct string
-special_restrictions_for_mixed_float_mode(const struct gen_device_info *devinfo,
+special_restrictions_for_mixed_float_mode(const struct intel_device_info *devinfo,
                                           const brw_inst *inst)
 {
    struct string error_msg = { .str = NULL, .len = 0 };
@@ -1359,7 +1359,7 @@ registers_read(const uint64_t access_mask[static 32])
  * Region Restrictions" section.
  */
 static struct string
-region_alignment_rules(const struct gen_device_info *devinfo,
+region_alignment_rules(const struct intel_device_info *devinfo,
                        const brw_inst *inst)
 {
    const struct opcode_desc *desc =
@@ -1673,7 +1673,7 @@ region_alignment_rules(const struct gen_device_info *devinfo,
 }
 
 static struct string
-vector_immediate_restrictions(const struct gen_device_info *devinfo,
+vector_immediate_restrictions(const struct intel_device_info *devinfo,
                               const brw_inst *inst)
 {
    unsigned num_sources = num_sources_from_inst(devinfo, inst);
@@ -1735,7 +1735,7 @@ vector_immediate_restrictions(const struct gen_device_info *devinfo,
 
 static struct string
 special_requirements_for_handling_double_precision_data_types(
-                                       const struct gen_device_info *devinfo,
+                                       const struct intel_device_info *devinfo,
                                        const brw_inst *inst)
 {
    unsigned num_sources = num_sources_from_inst(devinfo, inst);
@@ -1817,7 +1817,7 @@ special_requirements_for_handling_double_precision_data_types(
        */
       if (is_double_precision &&
           brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1 &&
-          (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo))) {
+          (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo))) {
          ERROR_IF(!is_scalar_region &&
                   (src_stride % 8 != 0 ||
                    dst_stride % 8 != 0 ||
@@ -1842,7 +1842,7 @@ special_requirements_for_handling_double_precision_data_types(
        * We assume that the restriction applies to GLK as well.
        */
       if (is_double_precision &&
-          (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo))) {
+          (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo))) {
          ERROR_IF(BRW_ADDRESS_REGISTER_INDIRECT_REGISTER == address_mode ||
                   BRW_ADDRESS_REGISTER_INDIRECT_REGISTER == dst_address_mode,
                   "Indirect addressing is not allowed when the execution type "
@@ -1859,7 +1859,7 @@ special_requirements_for_handling_double_precision_data_types(
        * We assume that the restriction does not apply to the null register.
        */
       if (is_double_precision &&
-          (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo))) {
+          (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo))) {
          ERROR_IF(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MAC ||
                   brw_inst_acc_wr_control(devinfo, inst) ||
                   (BRW_ARCHITECTURE_REGISTER_FILE == file &&
@@ -1946,7 +1946,7 @@ special_requirements_for_handling_double_precision_data_types(
     * We assume that the restriction applies to GLK as well.
     */
    if (is_double_precision &&
-       (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo))) {
+       (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo))) {
       ERROR_IF(brw_inst_no_dd_check(devinfo, inst) ||
                brw_inst_no_dd_clear(devinfo, inst),
                "DepCtrl is not allowed when the execution type is 64-bit");
@@ -1956,7 +1956,7 @@ special_requirements_for_handling_double_precision_data_types(
 }
 
 static struct string
-instruction_restrictions(const struct gen_device_info *devinfo,
+instruction_restrictions(const struct intel_device_info *devinfo,
                          const brw_inst *inst)
 {
    struct string error_msg = { .str = NULL, .len = 0 };
@@ -2026,7 +2026,7 @@ instruction_restrictions(const struct gen_device_info *devinfo,
 }
 
 bool
-brw_validate_instruction(const struct gen_device_info *devinfo,
+brw_validate_instruction(const struct intel_device_info *devinfo,
                          const brw_inst *inst, int offset,
                          struct disasm_info *disasm)
 {
@@ -2060,7 +2060,7 @@ brw_validate_instruction(const struct gen_device_info *devinfo,
 }
 
 bool
-brw_validate_instructions(const struct gen_device_info *devinfo,
+brw_validate_instructions(const struct intel_device_info *devinfo,
                           const void *assembly, int start_offset, int end_offset,
                           struct disasm_info *disasm)
 {
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 55c0667fdda..512a6168c04 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -44,7 +44,7 @@
 
 using namespace brw;
 
-static unsigned get_lowered_simd_width(const struct gen_device_info *devinfo,
+static unsigned get_lowered_simd_width(const struct intel_device_info *devinfo,
                                        const fs_inst *inst);
 
 void
@@ -431,7 +431,7 @@ fs_inst::has_source_and_destination_hazard() const
 }
 
 bool
-fs_inst::can_do_source_mods(const struct gen_device_info *devinfo) const
+fs_inst::can_do_source_mods(const struct intel_device_info *devinfo) const
 {
    if (devinfo->ver == 6 && is_math())
       return false;
@@ -1092,7 +1092,7 @@ namespace {
 }
 
 unsigned
-fs_inst::flags_read(const gen_device_info *devinfo) const
+fs_inst::flags_read(const intel_device_info *devinfo) const
 {
    if (predicate == BRW_PREDICATE_ALIGN1_ANYV ||
        predicate == BRW_PREDICATE_ALIGN1_ALLV) {
@@ -1794,7 +1794,7 @@ brw_compute_urb_setup_index(struct brw_wm_prog_data *wm_prog_data)
 }
 
 static void
-calculate_urb_setup(const struct gen_device_info *devinfo,
+calculate_urb_setup(const struct intel_device_info *devinfo,
                     const struct brw_wm_prog_key *key,
                     struct brw_wm_prog_data *prog_data,
                     const nir_shader *nir)
@@ -2267,7 +2267,7 @@ fs_visitor::compact_virtual_grfs()
 }
 
 static int
-get_subgroup_id_param_index(const gen_device_info *devinfo,
+get_subgroup_id_param_index(const intel_device_info *devinfo,
                             const brw_stage_prog_data *prog_data)
 {
    if (prog_data->nr_params == 0)
@@ -4459,7 +4459,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
                             const fs_visitor::thread_payload &payload)
 {
    assert(inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].file == IMM);
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const fs_reg &color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0];
    const fs_reg &color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1];
    const fs_reg &src0_alpha = inst->src[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA];
@@ -4718,7 +4718,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
 static void
 lower_fb_read_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const fs_builder &ubld = bld.exec_all().group(8, 0);
    const unsigned length = 2;
    const fs_reg header = ubld.vgrf(BRW_REGISTER_TYPE_UD, length);
@@ -4960,7 +4960,7 @@ lower_sampler_logical_send_gfx5(const fs_builder &bld, fs_inst *inst, opcode op,
 }
 
 static bool
-is_high_sampler(const struct gen_device_info *devinfo, const fs_reg &sampler)
+is_high_sampler(const struct intel_device_info *devinfo, const fs_reg &sampler)
 {
    if (devinfo->ver < 8 && !devinfo->is_haswell)
       return false;
@@ -4969,7 +4969,7 @@ is_high_sampler(const struct gen_device_info *devinfo, const fs_reg &sampler)
 }
 
 static unsigned
-sampler_msg_type(const gen_device_info *devinfo,
+sampler_msg_type(const intel_device_info *devinfo,
                  opcode opcode, bool shadow_compare)
 {
    assert(devinfo->ver >= 5);
@@ -5044,7 +5044,7 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
                                 unsigned coord_components,
                                 unsigned grad_components)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const brw_stage_prog_data *prog_data = bld.shader->stage_prog_data;
    unsigned reg_width = bld.dispatch_width() / 8;
    unsigned header_size = 0, length = 0;
@@ -5420,7 +5420,7 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
 static void
 lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const fs_reg &coordinate = inst->src[TEX_LOGICAL_SRC_COORDINATE];
    const fs_reg &shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C];
    const fs_reg &lod = inst->src[TEX_LOGICAL_SRC_LOD];
@@ -5502,7 +5502,7 @@ static void
 setup_surface_descriptors(const fs_builder &bld, fs_inst *inst, uint32_t desc,
                           const fs_reg &surface, const fs_reg &surface_handle)
 {
-   const ASSERTED gen_device_info *devinfo = bld.shader->devinfo;
+   const ASSERTED intel_device_info *devinfo = bld.shader->devinfo;
 
    /* We must have exactly one of surface and surface_handle */
    assert((surface.file == BAD_FILE) != (surface_handle.file == BAD_FILE));
@@ -5534,7 +5534,7 @@ setup_surface_descriptors(const fs_builder &bld, fs_inst *inst, uint32_t desc,
 static void
 lower_surface_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
 
    /* Get the logical send arguments. */
    const fs_reg &addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS];
@@ -5781,7 +5781,7 @@ lower_surface_logical_send(const fs_builder &bld, fs_inst *inst)
 static void
 lower_surface_block_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    assert(devinfo->ver >= 9);
 
    /* Get the logical send arguments. */
@@ -5867,7 +5867,7 @@ emit_a64_oword_block_header(const fs_builder &bld, const fs_reg &addr)
 static void
 lower_a64_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
 
    const fs_reg &addr = inst->src[0];
    const fs_reg &src = inst->src[1];
@@ -6026,7 +6026,7 @@ lower_a64_logical_send(const fs_builder &bld, fs_inst *inst)
 static void
 lower_varying_pull_constant_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const brw_compiler *compiler = bld.shader->compiler;
 
    if (devinfo->ver >= 7) {
@@ -6148,7 +6148,7 @@ lower_math_logical_send(const fs_builder &bld, fs_inst *inst)
 static void
 lower_btd_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    fs_reg global_addr = inst->src[0];
    const fs_reg &btd_record = inst->src[1];
 
@@ -6218,7 +6218,7 @@ lower_btd_logical_send(const fs_builder &bld, fs_inst *inst)
 static void
 lower_trace_ray_logical_send(const fs_builder &bld, fs_inst *inst)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const fs_reg &bvh_level = inst->src[0];
    assert(inst->src[1].file == BRW_IMMEDIATE_VALUE);
    const uint32_t trace_ray_control = inst->src[1].ud;
@@ -6489,7 +6489,7 @@ is_mixed_float_with_packed_fp16_dst(const fs_inst *inst)
  * excessively restrictive.
  */
 static unsigned
-get_fpu_lowered_simd_width(const struct gen_device_info *devinfo,
+get_fpu_lowered_simd_width(const struct intel_device_info *devinfo,
                            const fs_inst *inst)
 {
    /* Maximum execution size representable in the instruction controls. */
@@ -6594,7 +6594,7 @@ get_fpu_lowered_simd_width(const struct gen_device_info *devinfo,
       max_width = MIN2(max_width, 16);
 
    /* From the IVB PRMs (applies to other devices that don't have the
-    * gen_device_info::supports_simd16_3src flag set):
+    * intel_device_info::supports_simd16_3src flag set):
     *  "In Align16 access mode, SIMD16 is not allowed for DW operations and
     *   SIMD8 is not allowed for DF operations."
     */
@@ -6686,7 +6686,7 @@ get_fpu_lowered_simd_width(const struct gen_device_info *devinfo,
  * represent).
  */
 static unsigned
-get_sampler_lowered_simd_width(const struct gen_device_info *devinfo,
+get_sampler_lowered_simd_width(const struct intel_device_info *devinfo,
                                const fs_inst *inst)
 {
    /* If we have a min_lod parameter on anything other than a simple sample
@@ -6747,7 +6747,7 @@ get_sampler_lowered_simd_width(const struct gen_device_info *devinfo,
  * original execution size.
  */
 static unsigned
-get_lowered_simd_width(const struct gen_device_info *devinfo,
+get_lowered_simd_width(const struct intel_device_info *devinfo,
                        const fs_inst *inst)
 {
    switch (inst->opcode) {
@@ -8844,7 +8844,7 @@ is_used_in_not_interp_frag_coord(nir_ssa_def *def)
  * also need the BRW_BARYCENTRIC_[NON]PERSPECTIVE_CENTROID mode set up.
  */
 static unsigned
-brw_compute_barycentric_interp_modes(const struct gen_device_info *devinfo,
+brw_compute_barycentric_interp_modes(const struct intel_device_info *devinfo,
                                      const nir_shader *shader)
 {
    unsigned barycentric_interp_modes = 0;
@@ -9053,7 +9053,7 @@ brw_nir_demote_sample_qualifiers(nir_shader *nir)
 
 void
 brw_nir_populate_wm_prog_data(const nir_shader *shader,
-                              const struct gen_device_info *devinfo,
+                              const struct intel_device_info *devinfo,
                               const struct brw_wm_prog_key *key,
                               struct brw_wm_prog_data *prog_data)
 {
@@ -9134,7 +9134,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
 
    prog_data->base.stage = MESA_SHADER_FRAGMENT;
 
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    const unsigned max_subgroup_size = compiler->devinfo->ver >= 6 ? 32 : 16;
 
    brw_nir_apply_key(nir, compiler, &key->base, max_subgroup_size, true);
@@ -9388,7 +9388,7 @@ fill_push_const_block_info(struct brw_push_const_block *block, unsigned dwords)
 }
 
 static void
-cs_fill_push_const_info(const struct gen_device_info *devinfo,
+cs_fill_push_const_info(const struct intel_device_info *devinfo,
                         struct brw_cs_prog_data *cs_prog_data)
 {
    const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
@@ -9735,7 +9735,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
 }
 
 unsigned
-brw_cs_simd_size_for_group_size(const struct gen_device_info *devinfo,
+brw_cs_simd_size_for_group_size(const struct intel_device_info *devinfo,
                                 const struct brw_cs_prog_data *cs_prog_data,
                                 unsigned group_size)
 {
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 413b225cfce..96ef09235da 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -567,7 +567,7 @@ private:
    const struct brw_compiler *compiler;
    void *log_data; /* Passed to compiler->*_log functions */
 
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
 
    struct brw_codegen *p;
    struct brw_stage_prog_data * const prog_data;
diff --git a/src/intel/compiler/brw_fs_bank_conflicts.cpp b/src/intel/compiler/brw_fs_bank_conflicts.cpp
index 411d96b62ff..597a258185d 100644
--- a/src/intel/compiler/brw_fs_bank_conflicts.cpp
+++ b/src/intel/compiler/brw_fs_bank_conflicts.cpp
@@ -597,7 +597,7 @@ namespace {
     * found experimentally.
     */
    bool
-   is_conflict_optimized_out(const gen_device_info *devinfo, const fs_inst *inst)
+   is_conflict_optimized_out(const intel_device_info *devinfo, const fs_inst *inst)
    {
       return devinfo->ver >= 9 &&
          ((is_grf(inst->src[0]) && (reg_of(inst->src[0]) == reg_of(inst->src[1]) ||
@@ -941,7 +941,7 @@ fs_visitor::opt_bank_conflicts()
  * we don't know which bank each VGRF is going to end up aligned to.
  */
 bool
-has_bank_conflict(const gen_device_info *devinfo, const fs_inst *inst)
+has_bank_conflict(const intel_device_info *devinfo, const fs_inst *inst)
 {
    return inst->is_3src(devinfo) &&
           is_grf(inst->src[1]) && is_grf(inst->src[2]) &&
diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp b/src/intel/compiler/brw_fs_cmod_propagation.cpp
index 415716d098d..63e25d3bafe 100644
--- a/src/intel/compiler/brw_fs_cmod_propagation.cpp
+++ b/src/intel/compiler/brw_fs_cmod_propagation.cpp
@@ -51,7 +51,7 @@
 using namespace brw;
 
 static bool
-cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
+cmod_propagate_cmp_to_add(const intel_device_info *devinfo, bblock_t *block,
                           fs_inst *inst)
 {
    bool read_flag = false;
@@ -166,7 +166,7 @@ cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
  *    or.z.f0(8)      g78<8,8,1>      g76<8,8,1>UD    g77<8,8,1>UD
  */
 static bool
-cmod_propagate_not(const gen_device_info *devinfo, bblock_t *block,
+cmod_propagate_not(const intel_device_info *devinfo, bblock_t *block,
                    fs_inst *inst)
 {
    const enum brw_conditional_mod cond = brw_negate_cmod(inst->conditional_mod);
@@ -220,7 +220,7 @@ cmod_propagate_not(const gen_device_info *devinfo, bblock_t *block,
 }
 
 static bool
-opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
+opt_cmod_propagation_local(const intel_device_info *devinfo, bblock_t *block)
 {
    bool progress = false;
    int ip = block->end_ip + 1;
diff --git a/src/intel/compiler/brw_fs_combine_constants.cpp b/src/intel/compiler/brw_fs_combine_constants.cpp
index 38a503ece4b..50ddb7e645f 100644
--- a/src/intel/compiler/brw_fs_combine_constants.cpp
+++ b/src/intel/compiler/brw_fs_combine_constants.cpp
@@ -46,7 +46,7 @@ static const bool debug = false;
  * replaced with a GRF source.
  */
 static bool
-could_coissue(const struct gen_device_info *devinfo, const fs_inst *inst)
+could_coissue(const struct intel_device_info *devinfo, const fs_inst *inst)
 {
    if (devinfo->ver != 7)
       return false;
@@ -73,7 +73,7 @@ could_coissue(const struct gen_device_info *devinfo, const fs_inst *inst)
  * Returns true for instructions that don't support immediate sources.
  */
 static bool
-must_promote_imm(const struct gen_device_info *devinfo, const fs_inst *inst)
+must_promote_imm(const struct intel_device_info *devinfo, const fs_inst *inst)
 {
    switch (inst->opcode) {
    case SHADER_OPCODE_POW:
@@ -211,7 +211,7 @@ compare(const void *_a, const void *_b)
 }
 
 static bool
-get_constant_value(const struct gen_device_info *devinfo,
+get_constant_value(const struct intel_device_info *devinfo,
                    const fs_inst *inst, uint32_t src_idx,
                    void *out, brw_reg_type *out_type)
 {
@@ -336,7 +336,7 @@ representable_as_hf(float f, uint16_t *hf)
 }
 
 static bool
-represent_src_as_imm(const struct gen_device_info *devinfo,
+represent_src_as_imm(const struct intel_device_info *devinfo,
                      fs_reg *src)
 {
    /* TODO - Fix the codepath below to use a bfloat16 immediate on XeHP,
diff --git a/src/intel/compiler/brw_fs_copy_propagation.cpp b/src/intel/compiler/brw_fs_copy_propagation.cpp
index 18ae9e99bb4..fecbcf75a8b 100644
--- a/src/intel/compiler/brw_fs_copy_propagation.cpp
+++ b/src/intel/compiler/brw_fs_copy_propagation.cpp
@@ -369,7 +369,7 @@ is_logic_op(enum opcode opcode)
 static bool
 can_take_stride(fs_inst *inst, brw_reg_type dst_type,
                 unsigned arg, unsigned stride,
-                const gen_device_info *devinfo)
+                const intel_device_info *devinfo)
 {
    if (stride > 4)
       return false;
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index ed7eeea5d69..89c5147ebe2 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -54,7 +54,7 @@ brw_file_from_reg(fs_reg *reg)
 }
 
 static struct brw_reg
-brw_reg_from_fs_reg(const struct gen_device_info *devinfo, fs_inst *inst,
+brw_reg_from_fs_reg(const struct intel_device_info *devinfo, fs_inst *inst,
                     fs_reg *reg, bool compressed)
 {
    struct brw_reg brw_reg;
@@ -550,7 +550,7 @@ fs_generator::generate_mov_indirect(fs_inst *inst,
 
       if (type_sz(reg.type) > 4 &&
           ((devinfo->ver == 7 && !devinfo->is_haswell) ||
-           devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+           devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
            !devinfo->has_64bit_float || devinfo->verx10 >= 125)) {
          /* IVB has an issue (which we found empirically) where it reads two
           * address register components per channel for indirectly addressed
@@ -715,7 +715,7 @@ fs_generator::generate_shuffle(fs_inst *inst,
 
          if (type_sz(src.type) > 4 &&
              ((devinfo->ver == 7 && !devinfo->is_haswell) ||
-              devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+              devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
               !devinfo->has_64bit_float)) {
             /* IVB has an issue (which we found empirically) where it reads
              * two address register components per channel for indirectly
@@ -2538,7 +2538,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
          struct brw_reg strided = stride(suboffset(src[0], component),
                                          vstride, width, 0);
          if (type_sz(src[0].type) > 4 &&
-             (devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+             (devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
               !devinfo->has_64bit_float)) {
             /* IVB has an issue (which we found empirically) where it reads
              * two address register components per channel for indirectly
diff --git a/src/intel/compiler/brw_fs_live_variables.h b/src/intel/compiler/brw_fs_live_variables.h
index 5661c102eeb..1c77efa0c19 100644
--- a/src/intel/compiler/brw_fs_live_variables.h
+++ b/src/intel/compiler/brw_fs_live_variables.h
@@ -138,7 +138,7 @@ protected:
    void compute_live_variables();
    void compute_start_end();
 
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
    const cfg_t *cfg;
    void *mem_ctx;
 };
diff --git a/src/intel/compiler/brw_fs_lower_regioning.cpp b/src/intel/compiler/brw_fs_lower_regioning.cpp
index e5a4391cbb1..731899fb780 100644
--- a/src/intel/compiler/brw_fs_lower_regioning.cpp
+++ b/src/intel/compiler/brw_fs_lower_regioning.cpp
@@ -124,7 +124,7 @@ namespace {
     * specified for the i-th source region.
     */
    bool
-   has_invalid_src_region(const gen_device_info *devinfo, const fs_inst *inst,
+   has_invalid_src_region(const intel_device_info *devinfo, const fs_inst *inst,
                           unsigned i)
    {
       if (is_unordered(inst) || inst->is_control_source(i))
@@ -165,7 +165,7 @@ namespace {
     * specified for the destination region.
     */
    bool
-   has_invalid_dst_region(const gen_device_info *devinfo,
+   has_invalid_dst_region(const intel_device_info *devinfo,
                           const fs_inst *inst)
    {
       if (is_unordered(inst)) {
@@ -192,7 +192,7 @@ namespace {
     * source or destination modifiers into separate MOV instructions.
     */
    unsigned
-   has_invalid_exec_type(const gen_device_info *devinfo, const fs_inst *inst)
+   has_invalid_exec_type(const intel_device_info *devinfo, const fs_inst *inst)
    {
       switch (inst->opcode) {
       case SHADER_OPCODE_QUAD_SWIZZLE:
@@ -202,7 +202,7 @@ namespace {
       case SHADER_OPCODE_BROADCAST:
       case SHADER_OPCODE_MOV_INDIRECT:
          return (((devinfo->ver == 7 && !devinfo->is_haswell) ||
-                  devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+                  devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
                   devinfo->verx10 >= 125) && type_sz(inst->src[0].type) > 4) ||
                 (devinfo->verx10 >= 125 &&
                  brw_reg_type_is_floating_point(inst->src[0].type)) ?
@@ -218,7 +218,7 @@ namespace {
     * specified for the i-th source region.
     */
    bool
-   has_invalid_src_modifiers(const gen_device_info *devinfo, const fs_inst *inst,
+   has_invalid_src_modifiers(const intel_device_info *devinfo, const fs_inst *inst,
                              unsigned i)
    {
       return (!inst->can_do_source_mods(devinfo) &&
@@ -233,7 +233,7 @@ namespace {
     * specified for the destination.
     */
    bool
-   has_invalid_conversion(const gen_device_info *devinfo, const fs_inst *inst)
+   has_invalid_conversion(const intel_device_info *devinfo, const fs_inst *inst)
    {
       switch (inst->opcode) {
       case BRW_OPCODE_MOV:
@@ -254,7 +254,7 @@ namespace {
     * Return whether the instruction has unsupported destination modifiers.
     */
    bool
-   has_invalid_dst_modifiers(const gen_device_info *devinfo, const fs_inst *inst)
+   has_invalid_dst_modifiers(const intel_device_info *devinfo, const fs_inst *inst)
    {
       return (has_invalid_exec_type(devinfo, inst) &&
               (inst->saturate || inst->conditional_mod)) ||
@@ -488,7 +488,7 @@ namespace {
    bool
    lower_instruction(fs_visitor *v, bblock_t *block, fs_inst *inst)
    {
-      const gen_device_info *devinfo = v->devinfo;
+      const intel_device_info *devinfo = v->devinfo;
       bool progress = false;
 
       if (has_invalid_dst_modifiers(devinfo, inst))
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 5181ce9000e..c84609dac93 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -3145,7 +3145,7 @@ fs_inst *
 fs_visitor::emit_non_coherent_fb_read(const fs_builder &bld, const fs_reg &dst,
                                       unsigned target)
 {
-   const struct gen_device_info *devinfo = bld.shader->devinfo;
+   const struct intel_device_info *devinfo = bld.shader->devinfo;
 
    assert(bld.shader->stage == MESA_SHADER_FRAGMENT);
    const brw_wm_prog_key *wm_key =
@@ -4458,7 +4458,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
             (instr->num_components - 1) * type_sz(dest.type);
 
          bool supports_64bit_indirects =
-            !devinfo->is_cherryview && !gen_device_info_is_9lp(devinfo);
+            !devinfo->is_cherryview && !intel_device_info_is_9lp(devinfo);
 
          if (type_sz(dest.type) != 8 || supports_64bit_indirects) {
             for (unsigned j = 0; j < instr->num_components; j++) {
@@ -6211,7 +6211,7 @@ shuffle_from_32bit_read(const fs_builder &bld,
 fs_reg
 setup_imm_df(const fs_builder &bld, double v)
 {
-   const struct gen_device_info *devinfo = bld.shader->devinfo;
+   const struct intel_device_info *devinfo = bld.shader->devinfo;
    assert(devinfo->ver >= 7);
 
    if (devinfo->ver >= 8)
diff --git a/src/intel/compiler/brw_fs_reg_allocate.cpp b/src/intel/compiler/brw_fs_reg_allocate.cpp
index 4cb9505fc63..992aaa6c2c6 100644
--- a/src/intel/compiler/brw_fs_reg_allocate.cpp
+++ b/src/intel/compiler/brw_fs_reg_allocate.cpp
@@ -85,7 +85,7 @@ aligned_bary_size(unsigned dispatch_width)
 static void
 brw_alloc_reg_set(struct brw_compiler *compiler, int dispatch_width)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    int base_reg_count = BRW_MAX_GRF;
    const int index = util_logbase2(dispatch_width / 8);
 
@@ -489,7 +489,7 @@ private:
 
    void *mem_ctx;
    fs_visitor *fs;
-   const gen_device_info *devinfo;
+   const intel_device_info *devinfo;
    const brw_compiler *compiler;
    const fs_live_variables &live;
    int live_instr_count;
@@ -884,7 +884,7 @@ void
 fs_reg_alloc::emit_unspill(const fs_builder &bld, fs_reg dst,
                            uint32_t spill_offset, unsigned count)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const unsigned reg_size = dst.component_size(bld.dispatch_width()) /
                              REG_SIZE;
    assert(count % reg_size == 0);
@@ -940,7 +940,7 @@ void
 fs_reg_alloc::emit_spill(const fs_builder &bld, fs_reg src,
                          uint32_t spill_offset, unsigned count)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    const unsigned reg_size = src.component_size(bld.dispatch_width()) /
                              REG_SIZE;
    assert(count % reg_size == 0);
diff --git a/src/intel/compiler/brw_fs_scoreboard.cpp b/src/intel/compiler/brw_fs_scoreboard.cpp
index ea93acf0fc3..56027077895 100644
--- a/src/intel/compiler/brw_fs_scoreboard.cpp
+++ b/src/intel/compiler/brw_fs_scoreboard.cpp
@@ -69,7 +69,7 @@ namespace {
     * instruction (e.g. when TGL_PIPE_NONE is specified in tgl_swsb).
     */
    tgl_pipe
-   inferred_sync_pipe(const struct gen_device_info *devinfo, const fs_inst *inst)
+   inferred_sync_pipe(const struct intel_device_info *devinfo, const fs_inst *inst)
    {
       if (devinfo->verx10 >= 125) {
          bool has_int_src = false, has_long_src = false;
@@ -101,7 +101,7 @@ namespace {
     * RegDist synchronization mechanism.
     */
    tgl_pipe
-   inferred_exec_pipe(const struct gen_device_info *devinfo, const fs_inst *inst)
+   inferred_exec_pipe(const struct intel_device_info *devinfo, const fs_inst *inst)
    {
       const brw_reg_type t = get_exec_type(inst);
       const bool is_dword_multiply = !brw_reg_type_is_floating_point(t) &&
@@ -143,7 +143,7 @@ namespace {
     * instruction.
     */
    unsigned
-   ordered_unit(const struct gen_device_info *devinfo, const fs_inst *inst,
+   ordered_unit(const struct intel_device_info *devinfo, const fs_inst *inst,
                 unsigned p)
    {
       switch (inst->opcode) {
@@ -881,7 +881,7 @@ namespace {
     * dependency is present.
     */
    tgl_sbid_mode
-   baked_unordered_dependency_mode(const struct gen_device_info *devinfo,
+   baked_unordered_dependency_mode(const struct intel_device_info *devinfo,
                                    const fs_inst *inst,
                                    const dependency_list &deps,
                                    const ordered_address &jp)
@@ -910,7 +910,7 @@ namespace {
     * additional SYNC instructions.
     */
    bool
-   baked_ordered_dependency_mode(const struct gen_device_info *devinfo,
+   baked_ordered_dependency_mode(const struct intel_device_info *devinfo,
                                  const fs_inst *inst,
                                  const dependency_list &deps,
                                  const ordered_address &jp)
@@ -948,7 +948,7 @@ namespace {
                           const fs_inst *inst, unsigned ip, scoreboard &sb)
    {
       const bool exec_all = inst->force_writemask_all;
-      const struct gen_device_info *devinfo = shader->devinfo;
+      const struct intel_device_info *devinfo = shader->devinfo;
       const tgl_pipe p = inferred_exec_pipe(devinfo, inst);
       const ordered_address jp = p ? ordered_address(p, jps[ip].jp[IDX(p)]) :
                                      ordered_address();
@@ -1169,7 +1169,7 @@ namespace {
                           const ordered_address *jps,
                           const dependency_list *deps)
    {
-      const struct gen_device_info *devinfo = shader->devinfo;
+      const struct intel_device_info *devinfo = shader->devinfo;
       unsigned ip = 0;
 
       foreach_block_and_inst_safe(block, fs_inst, inst, shader->cfg) {
diff --git a/src/intel/compiler/brw_gen_enum.h b/src/intel/compiler/brw_gen_enum.h
index 6cbcbab1b54..0ce8c529cd7 100644
--- a/src/intel/compiler/brw_gen_enum.h
+++ b/src/intel/compiler/brw_gen_enum.h
@@ -45,7 +45,7 @@ enum gen {
 #define GFX_LE(gen) (GFX_LT(gen) | (gen))
 
 static enum gen
-gen_from_devinfo(const struct gen_device_info *devinfo)
+gen_from_devinfo(const struct intel_device_info *devinfo)
 {
    switch (devinfo->verx10) {
    case 40: return GFX4;
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index 81657845aa6..ee201c7a0d4 100644
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -55,7 +55,7 @@ static inline void brw_inst_set_bits(brw_inst *inst,
 
 #define FC(name, hi4, lo4, hi12, lo12, assertions)            \
 static inline void                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo,    \
+brw_inst_set_##name(const struct intel_device_info *devinfo,    \
                     brw_inst *inst, uint64_t v)               \
 {                                                             \
    assert(assertions);                                        \
@@ -65,7 +65,7 @@ brw_inst_set_##name(const struct gen_device_info *devinfo,    \
       brw_inst_set_bits(inst, hi4, lo4, v);                   \
 }                                                             \
 static inline uint64_t                                        \
-brw_inst_##name(const struct gen_device_info *devinfo,        \
+brw_inst_##name(const struct intel_device_info *devinfo,        \
                 const brw_inst *inst)                         \
 {                                                             \
    assert(assertions);                                        \
@@ -107,7 +107,7 @@ brw_inst_##name(const struct gen_device_info *devinfo,        \
 #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6,                    \
            hi7, lo7, hi8, lo8, hi12, lo12)                                    \
 static inline void                                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
+brw_inst_set_##name(const struct intel_device_info *devinfo,                    \
                     brw_inst *inst, uint64_t value)                           \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6,                           \
@@ -115,7 +115,7 @@ brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
    brw_inst_set_bits(inst, high, low, value);                                 \
 }                                                                             \
 static inline uint64_t                                                        \
-brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
+brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6,                           \
           hi7, lo7, hi8, lo8, hi12, lo12)                                     \
@@ -140,7 +140,7 @@ FF(name,                                                   \
 #define FFDC(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6,                  \
              hi7, lo7, hi8, lo8, hi12ex, lo12ex, hi12, lo12, assertions)      \
 static inline void                                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
+brw_inst_set_##name(const struct intel_device_info *devinfo,                    \
                     brw_inst *inst, uint64_t value)                           \
 {                                                                             \
    assert(assertions);                                                        \
@@ -156,7 +156,7 @@ brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
    }                                                                          \
 }                                                                             \
 static inline uint64_t                                                        \
-brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
+brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    assert(assertions);                                                        \
    if (devinfo->ver >= 12) {                                                  \
@@ -190,7 +190,7 @@ brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
  */
 #define FI(name, hi4, lo4, hi8, lo8, hi12, lo12)                              \
 static inline void                                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
+brw_inst_set_##name(const struct intel_device_info *devinfo,                    \
                     brw_inst *inst, uint64_t value)                           \
 {                                                                             \
    if (devinfo->ver >= 12) {                                                  \
@@ -204,7 +204,7 @@ brw_inst_set_##name(const struct gen_device_info *devinfo,                    \
    }                                                                          \
 }                                                                             \
 static inline uint64_t                                                        \
-brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
+brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    if (devinfo->ver >= 12) {                                                  \
       return (brw_inst_bits(inst, hi12, hi12) << 1) |                         \
@@ -222,7 +222,7 @@ brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
  */
 #define FK(name, hi4, lo4, const12)                           \
 static inline void                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo,    \
+brw_inst_set_##name(const struct intel_device_info *devinfo,    \
                     brw_inst *inst, uint64_t v)               \
 {                                                             \
    if (devinfo->ver >= 12)                                    \
@@ -231,7 +231,7 @@ brw_inst_set_##name(const struct gen_device_info *devinfo,    \
       brw_inst_set_bits(inst, hi4, lo4, v);                   \
 }                                                             \
 static inline uint64_t                                        \
-brw_inst_##name(const struct gen_device_info *devinfo,        \
+brw_inst_##name(const struct intel_device_info *devinfo,        \
                 const brw_inst *inst)                         \
 {                                                             \
    if (devinfo->ver >= 12)                                    \
@@ -379,7 +379,7 @@ F(3src_hw_opcode,           /* 4+ */ 6,  0,    /* 12+ */ 6, 0)
 
 #define REG_TYPE(reg)                                                         \
 static inline void                                                            \
-brw_inst_set_3src_a16_##reg##_type(const struct gen_device_info *devinfo,     \
+brw_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo,     \
                                    brw_inst *inst, enum brw_reg_type type)    \
 {                                                                             \
    unsigned hw_type = brw_reg_type_to_a16_hw_3src_type(devinfo, type);        \
@@ -387,7 +387,7 @@ brw_inst_set_3src_a16_##reg##_type(const struct gen_device_info *devinfo,     \
 }                                                                             \
                                                                               \
 static inline enum brw_reg_type                                               \
-brw_inst_3src_a16_##reg##_type(const struct gen_device_info *devinfo,         \
+brw_inst_3src_a16_##reg##_type(const struct intel_device_info *devinfo,         \
                                const brw_inst *inst)                          \
 {                                                                             \
    unsigned hw_type = brw_inst_3src_a16_##reg##_hw_type(devinfo, inst);       \
@@ -441,7 +441,7 @@ FC(3src_a1_exec_type,       /* 4+ */    35,  35, /* 12+ */ 39, 39, devinfo->ver
 
 #define REG_TYPE(reg)                                                         \
 static inline void                                                            \
-brw_inst_set_3src_a1_##reg##_type(const struct gen_device_info *devinfo,      \
+brw_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo,      \
                                   brw_inst *inst, enum brw_reg_type type)     \
 {                                                                             \
    UNUSED enum gfx10_align1_3src_exec_type exec_type =                        \
@@ -457,7 +457,7 @@ brw_inst_set_3src_a1_##reg##_type(const struct gen_device_info *devinfo,      \
 }                                                                             \
                                                                               \
 static inline enum brw_reg_type                                               \
-brw_inst_3src_a1_##reg##_type(const struct gen_device_info *devinfo,          \
+brw_inst_3src_a1_##reg##_type(const struct intel_device_info *devinfo,          \
                               const brw_inst *inst)                           \
 {                                                                             \
    enum gfx10_align1_3src_exec_type exec_type =                               \
@@ -478,7 +478,7 @@ REG_TYPE(src2)
  *  @{
  */
 static inline uint16_t
-brw_inst_3src_a1_src0_imm(ASSERTED const struct gen_device_info *devinfo,
+brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo,
                           const brw_inst *insn)
 {
    assert(devinfo->ver >= 10);
@@ -489,7 +489,7 @@ brw_inst_3src_a1_src0_imm(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline uint16_t
-brw_inst_3src_a1_src2_imm(ASSERTED const struct gen_device_info *devinfo,
+brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo,
                           const brw_inst *insn)
 {
    assert(devinfo->ver >= 10);
@@ -500,7 +500,7 @@ brw_inst_3src_a1_src2_imm(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_3src_a1_src0_imm(ASSERTED const struct gen_device_info *devinfo,
+brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo,
                               brw_inst *insn, uint16_t value)
 {
    assert(devinfo->ver >= 10);
@@ -511,7 +511,7 @@ brw_inst_set_3src_a1_src0_imm(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_3src_a1_src2_imm(ASSERTED const struct gen_device_info *devinfo,
+brw_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo,
                               brw_inst *insn, uint16_t value)
 {
    assert(devinfo->ver >= 10);
@@ -527,7 +527,7 @@ brw_inst_set_3src_a1_src2_imm(ASSERTED const struct gen_device_info *devinfo,
  *  @{
  */
 static inline void
-brw_inst_set_uip(const struct gen_device_info *devinfo,
+brw_inst_set_uip(const struct intel_device_info *devinfo,
                  brw_inst *inst, int32_t value)
 {
    assert(devinfo->ver >= 6);
@@ -545,7 +545,7 @@ brw_inst_set_uip(const struct gen_device_info *devinfo,
 }
 
 static inline int32_t
-brw_inst_uip(const struct gen_device_info *devinfo, const brw_inst *inst)
+brw_inst_uip(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    assert(devinfo->ver >= 6);
 
@@ -557,7 +557,7 @@ brw_inst_uip(const struct gen_device_info *devinfo, const brw_inst *inst)
 }
 
 static inline void
-brw_inst_set_jip(const struct gen_device_info *devinfo,
+brw_inst_set_jip(const struct intel_device_info *devinfo,
                  brw_inst *inst, int32_t value)
 {
    assert(devinfo->ver >= 6);
@@ -575,7 +575,7 @@ brw_inst_set_jip(const struct gen_device_info *devinfo,
 }
 
 static inline int32_t
-brw_inst_jip(const struct gen_device_info *devinfo, const brw_inst *inst)
+brw_inst_jip(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    assert(devinfo->ver >= 6);
 
@@ -589,14 +589,14 @@ brw_inst_jip(const struct gen_device_info *devinfo, const brw_inst *inst)
 /** Like FC, but using int16_t to handle negative jump targets. */
 #define FJ(name, high, low, assertions)                                       \
 static inline void                                                            \
-brw_inst_set_##name(const struct gen_device_info *devinfo, brw_inst *inst, int16_t v) \
+brw_inst_set_##name(const struct intel_device_info *devinfo, brw_inst *inst, int16_t v) \
 {                                                                             \
    assert(assertions);                                                        \
    (void) devinfo;                                                            \
    brw_inst_set_bits(inst, high, low, (uint16_t) v);                          \
 }                                                                             \
 static inline int16_t                                                         \
-brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst)  \
+brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    assert(assertions);                                                        \
    (void) devinfo;                                                            \
@@ -640,7 +640,7 @@ FC(send_dst_reg_file,         /* 4+ */ 35, 35, /* 12+ */  50,  50, devinfo->ver
  * separately.
  */
 static inline void
-brw_inst_set_send_desc(const struct gen_device_info *devinfo,
+brw_inst_set_send_desc(const struct intel_device_info *devinfo,
                        brw_inst *inst, uint32_t value)
 {
    if (devinfo->ver >= 12) {
@@ -667,7 +667,7 @@ brw_inst_set_send_desc(const struct gen_device_info *devinfo,
  * \sa brw_inst_set_send_desc().
  */
 static inline uint32_t
-brw_inst_send_desc(const struct gen_device_info *devinfo, const brw_inst *inst)
+brw_inst_send_desc(const struct intel_device_info *devinfo, const brw_inst *inst)
 {
    if (devinfo->ver >= 12) {
       return (brw_inst_bits(inst, 123, 122) << 30 |
@@ -694,7 +694,7 @@ brw_inst_send_desc(const struct gen_device_info *devinfo, const brw_inst *inst)
  * separately.
  */
 static inline void
-brw_inst_set_send_ex_desc(const struct gen_device_info *devinfo,
+brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo,
                           brw_inst *inst, uint32_t value)
 {
    if (devinfo->ver >= 12) {
@@ -724,7 +724,7 @@ brw_inst_set_send_ex_desc(const struct gen_device_info *devinfo,
  * separately.
  */
 static inline void
-brw_inst_set_sends_ex_desc(const struct gen_device_info *devinfo,
+brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo,
                            brw_inst *inst, uint32_t value)
 {
    if (devinfo->ver >= 12) {
@@ -743,7 +743,7 @@ brw_inst_set_sends_ex_desc(const struct gen_device_info *devinfo,
  * \sa brw_inst_set_send_ex_desc().
  */
 static inline uint32_t
-brw_inst_send_ex_desc(const struct gen_device_info *devinfo,
+brw_inst_send_ex_desc(const struct intel_device_info *devinfo,
                       const brw_inst *inst)
 {
    if (devinfo->ver >= 12) {
@@ -767,7 +767,7 @@ brw_inst_send_ex_desc(const struct gen_device_info *devinfo,
  * \sa brw_inst_set_send_ex_desc().
  */
 static inline uint32_t
-brw_inst_sends_ex_desc(const struct gen_device_info *devinfo,
+brw_inst_sends_ex_desc(const struct intel_device_info *devinfo,
                        const brw_inst *inst)
 {
    if (devinfo->ver >= 12) {
@@ -1052,21 +1052,21 @@ F(pi_message_data,     /* 4+ */ MD(7),   MD(0),  /* 12+ */  MD12(7), MD12(0))
  *  @{
  */
 static inline int
-brw_inst_imm_d(const struct gen_device_info *devinfo, const brw_inst *insn)
+brw_inst_imm_d(const struct intel_device_info *devinfo, const brw_inst *insn)
 {
    (void) devinfo;
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline unsigned
-brw_inst_imm_ud(const struct gen_device_info *devinfo, const brw_inst *insn)
+brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_inst *insn)
 {
    (void) devinfo;
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline uint64_t
-brw_inst_imm_uq(ASSERTED const struct gen_device_info *devinfo,
+brw_inst_imm_uq(ASSERTED const struct intel_device_info *devinfo,
                 const brw_inst *insn)
 {
    assert(devinfo->ver >= 8);
@@ -1074,7 +1074,7 @@ brw_inst_imm_uq(ASSERTED const struct gen_device_info *devinfo,
 }
 
 static inline float
-brw_inst_imm_f(const struct gen_device_info *devinfo, const brw_inst *insn)
+brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_inst *insn)
 {
    union {
       float f;
@@ -1086,7 +1086,7 @@ brw_inst_imm_f(const struct gen_device_info *devinfo, const brw_inst *insn)
 }
 
 static inline double
-brw_inst_imm_df(const struct gen_device_info *devinfo, const brw_inst *insn)
+brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_inst *insn)
 {
    union {
       double d;
@@ -1098,7 +1098,7 @@ brw_inst_imm_df(const struct gen_device_info *devinfo, const brw_inst *insn)
 }
 
 static inline void
-brw_inst_set_imm_d(const struct gen_device_info *devinfo,
+brw_inst_set_imm_d(const struct intel_device_info *devinfo,
                    brw_inst *insn, int value)
 {
    (void) devinfo;
@@ -1106,7 +1106,7 @@ brw_inst_set_imm_d(const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_imm_ud(const struct gen_device_info *devinfo,
+brw_inst_set_imm_ud(const struct intel_device_info *devinfo,
                     brw_inst *insn, unsigned value)
 {
    (void) devinfo;
@@ -1114,7 +1114,7 @@ brw_inst_set_imm_ud(const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_imm_f(const struct gen_device_info *devinfo,
+brw_inst_set_imm_f(const struct intel_device_info *devinfo,
                    brw_inst *insn, float value)
 {
    union {
@@ -1127,7 +1127,7 @@ brw_inst_set_imm_f(const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_imm_df(const struct gen_device_info *devinfo,
+brw_inst_set_imm_df(const struct intel_device_info *devinfo,
                     brw_inst *insn, double value)
 {
    union {
@@ -1146,7 +1146,7 @@ brw_inst_set_imm_df(const struct gen_device_info *devinfo,
 }
 
 static inline void
-brw_inst_set_imm_uq(const struct gen_device_info *devinfo,
+brw_inst_set_imm_uq(const struct intel_device_info *devinfo,
                     brw_inst *insn, uint64_t value)
 {
    (void) devinfo;
@@ -1162,7 +1162,7 @@ brw_inst_set_imm_uq(const struct gen_device_info *devinfo,
 
 #define REG_TYPE(reg)                                                         \
 static inline void                                                            \
-brw_inst_set_##reg##_file_type(const struct gen_device_info *devinfo,         \
+brw_inst_set_##reg##_file_type(const struct intel_device_info *devinfo,         \
                                brw_inst *inst, enum brw_reg_file file,        \
                                enum brw_reg_type type)                        \
 {                                                                             \
@@ -1173,7 +1173,7 @@ brw_inst_set_##reg##_file_type(const struct gen_device_info *devinfo,         \
 }                                                                             \
                                                                               \
 static inline enum brw_reg_type                                               \
-brw_inst_##reg##_type(const struct gen_device_info *devinfo,                  \
+brw_inst_##reg##_type(const struct intel_device_info *devinfo,                  \
                       const brw_inst *inst)                                   \
 {                                                                             \
    unsigned file = __builtin_strcmp("dst", #reg) == 0 ?                       \
@@ -1193,7 +1193,7 @@ REG_TYPE(src1)
 #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low, \
                          g12_high, g12_low)                              \
 static inline void                                                       \
-brw_inst_set_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \
+brw_inst_set_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo, \
                                   brw_inst *inst,                        \
                                   unsigned value)                        \
 {                                                                        \
@@ -1208,7 +1208,7 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \
    }                                                                     \
 }                                                                        \
 static inline unsigned                                                   \
-brw_inst_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo,     \
+brw_inst_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo,     \
                               const brw_inst *inst)                      \
 {                                                                        \
    if (devinfo->ver >= 12) {                                             \
@@ -1229,7 +1229,7 @@ BRW_IA1_ADDR_IMM(dst,   57, 48,  47,  56, 48,  59, 50)
 
 #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
 static inline void                                                        \
-brw_inst_set_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \
+brw_inst_set_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo, \
                                    brw_inst *inst, unsigned value)        \
 {                                                                         \
    assert(devinfo->ver < 12);                                             \
@@ -1243,7 +1243,7 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \
    }                                                                      \
 }                                                                         \
 static inline unsigned                                                    \
-brw_inst_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo,     \
+brw_inst_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo,     \
                                const brw_inst *inst)                      \
 {                                                                         \
    assert(devinfo->ver < 12);                                             \
@@ -1356,7 +1356,7 @@ brw_compact_inst_set_bits(brw_compact_inst *inst, unsigned high, unsigned low,
 
 #define FC(name, high, low, gfx12_high, gfx12_low, assertions)     \
 static inline void                                                 \
-brw_compact_inst_set_##name(const struct gen_device_info *devinfo, \
+brw_compact_inst_set_##name(const struct intel_device_info *devinfo, \
                             brw_compact_inst *inst, unsigned v)    \
 {                                                                  \
    assert(assertions);                                             \
@@ -1366,7 +1366,7 @@ brw_compact_inst_set_##name(const struct gen_device_info *devinfo, \
       brw_compact_inst_set_bits(inst, high, low, v);               \
 }                                                                  \
 static inline unsigned                                             \
-brw_compact_inst_##name(const struct gen_device_info *devinfo,     \
+brw_compact_inst_##name(const struct intel_device_info *devinfo,     \
                         const brw_compact_inst *inst)              \
 {                                                                  \
    assert(assertions);                                             \
@@ -1400,7 +1400,7 @@ F(debug_control,    /* 4+ */  7,  7, /* 12+ */  7,  7)
 F(hw_opcode,        /* 4+ */  6,  0, /* 12+ */  6,  0) /* Same location as brw_inst */
 
 static inline unsigned
-brw_compact_inst_imm(const struct gen_device_info *devinfo,
+brw_compact_inst_imm(const struct intel_device_info *devinfo,
                      const brw_compact_inst *inst)
 {
    if (devinfo->ver >= 12) {
diff --git a/src/intel/compiler/brw_ir.h b/src/intel/compiler/brw_ir.h
index a98eab9f8fb..9cb3ce10242 100644
--- a/src/intel/compiler/brw_ir.h
+++ b/src/intel/compiler/brw_ir.h
@@ -90,7 +90,7 @@ struct backend_reg : private brw_reg
 struct bblock_t;
 
 struct backend_instruction : public exec_node {
-   bool is_3src(const struct gen_device_info *devinfo) const;
+   bool is_3src(const struct intel_device_info *devinfo) const;
    bool is_tex() const;
    bool is_math() const;
    bool is_control_flow() const;
@@ -99,7 +99,7 @@ struct backend_instruction : public exec_node {
    bool can_do_saturate() const;
    bool can_do_cmod() const;
    bool reads_accumulator_implicitly() const;
-   bool writes_accumulator_implicitly(const struct gen_device_info *devinfo) const;
+   bool writes_accumulator_implicitly(const struct intel_device_info *devinfo) const;
 
    /**
     * Instructions that use indirect addressing have additional register
diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h
index d5fc48b7d00..6496957a17a 100644
--- a/src/intel/compiler/brw_ir_fs.h
+++ b/src/intel/compiler/brw_ir_fs.h
@@ -355,7 +355,7 @@ public:
    bool is_partial_write() const;
    unsigned components_read(unsigned i) const;
    unsigned size_read(int arg) const;
-   bool can_do_source_mods(const struct gen_device_info *devinfo) const;
+   bool can_do_source_mods(const struct intel_device_info *devinfo) const;
    bool can_do_cmod();
    bool can_change_types() const;
    bool has_source_and_destination_hazard() const;
@@ -372,7 +372,7 @@ public:
     * Return the subset of flag registers read by the instruction as a bitset
     * with byte granularity.
     */
-   unsigned flags_read(const gen_device_info *devinfo) const;
+   unsigned flags_read(const intel_device_info *devinfo) const;
 
    /**
     * Return the subset of flag registers updated by the instruction (either
@@ -552,7 +552,7 @@ is_unordered(const fs_inst *inst)
  *     scalar source."
  */
 static inline bool
-has_dst_aligned_region_restriction(const gen_device_info *devinfo,
+has_dst_aligned_region_restriction(const intel_device_info *devinfo,
                                    const fs_inst *inst,
                                    brw_reg_type dst_type)
 {
@@ -570,7 +570,7 @@ has_dst_aligned_region_restriction(const gen_device_info *devinfo,
 
    if (type_sz(dst_type) > 4 || type_sz(exec_type) > 4 ||
        (type_sz(exec_type) == 4 && is_dword_multiply))
-      return devinfo->is_cherryview || gen_device_info_is_9lp(devinfo) ||
+      return devinfo->is_cherryview || intel_device_info_is_9lp(devinfo) ||
              devinfo->verx10 >= 125;
 
    else if (brw_reg_type_is_floating_point(inst->dst.type))
@@ -581,7 +581,7 @@ has_dst_aligned_region_restriction(const gen_device_info *devinfo,
 }
 
 static inline bool
-has_dst_aligned_region_restriction(const gen_device_info *devinfo,
+has_dst_aligned_region_restriction(const intel_device_info *devinfo,
                                    const fs_inst *inst)
 {
    return has_dst_aligned_region_restriction(devinfo, inst, inst->dst.type);
@@ -687,6 +687,6 @@ is_coalescing_payload(const brw::simple_allocator &alloc, const fs_inst *inst)
 }
 
 bool
-has_bank_conflict(const gen_device_info *devinfo, const fs_inst *inst);
+has_bank_conflict(const intel_device_info *devinfo, const fs_inst *inst);
 
 #endif
diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp
index 6198eb81a85..32fade99ef5 100644
--- a/src/intel/compiler/brw_ir_performance.cpp
+++ b/src/intel/compiler/brw_ir_performance.cpp
@@ -120,7 +120,7 @@ namespace {
     * instructions.
     */
    struct instruction_info {
-      instruction_info(const gen_device_info *devinfo, const fs_inst *inst) :
+      instruction_info(const intel_device_info *devinfo, const fs_inst *inst) :
          devinfo(devinfo), op(inst->opcode),
          td(inst->dst.type), sd(DIV_ROUND_UP(inst->size_written, REG_SIZE)),
          tx(get_exec_type(inst)), sx(0), ss(0),
@@ -150,7 +150,7 @@ namespace {
             tx = brw_int_type(8, tx == BRW_REGISTER_TYPE_D);
       }
 
-      instruction_info(const gen_device_info *devinfo,
+      instruction_info(const intel_device_info *devinfo,
                        const vec4_instruction *inst) :
          devinfo(devinfo), op(inst->opcode),
          td(inst->dst.type), sd(DIV_ROUND_UP(inst->size_written, REG_SIZE)),
@@ -174,7 +174,7 @@ namespace {
       }
 
       /** Device information. */
-      const struct gen_device_info *devinfo;
+      const struct intel_device_info *devinfo;
       /** Instruction opcode. */
       opcode op;
       /** Destination type. */
@@ -289,7 +289,7 @@ namespace {
    const perf_desc
    instruction_desc(const instruction_info &info)
    {
-      const struct gen_device_info *devinfo = info.devinfo;
+      const struct intel_device_info *devinfo = info.devinfo;
 
       switch (info.op) {
       case BRW_OPCODE_SYNC:
@@ -1176,7 +1176,7 @@ namespace {
     * Return the dependency ID of a backend_reg, offset by \p delta GRFs.
     */
    dependency_id
-   reg_dependency_id(const gen_device_info *devinfo, const backend_reg &r,
+   reg_dependency_id(const intel_device_info *devinfo, const backend_reg &r,
                      const int delta)
    {
       if (r.file == VGRF) {
@@ -1262,7 +1262,7 @@ namespace {
     * instruction.
     */
    unsigned
-   accum_reg_of_channel(const gen_device_info *devinfo,
+   accum_reg_of_channel(const intel_device_info *devinfo,
                         const backend_instruction *inst,
                         brw_reg_type tx, unsigned i)
    {
@@ -1277,7 +1277,7 @@ namespace {
     * Model the performance behavior of an FS back-end instruction.
     */
    void
-   issue_fs_inst(state &st, const gen_device_info *devinfo,
+   issue_fs_inst(state &st, const intel_device_info *devinfo,
                  const backend_instruction *be_inst)
    {
       const fs_inst *inst = static_cast<const fs_inst *>(be_inst);
@@ -1397,7 +1397,7 @@ namespace {
     * Model the performance behavior of a VEC4 back-end instruction.
     */
    void
-   issue_vec4_instruction(state &st, const gen_device_info *devinfo,
+   issue_vec4_instruction(state &st, const intel_device_info *devinfo,
                           const backend_instruction *be_inst)
    {
       const vec4_instruction *inst =
@@ -1508,7 +1508,7 @@ namespace {
    void
    calculate_performance(performance &p, const backend_shader *s,
                          void (*issue_instruction)(
-                            state &, const gen_device_info *,
+                            state &, const intel_device_info *,
                             const backend_instruction *),
                          unsigned dispatch_width)
    {
diff --git a/src/intel/compiler/brw_ir_vec4.h b/src/intel/compiler/brw_ir_vec4.h
index 3023cc11828..58d6e32b00b 100644
--- a/src/intel/compiler/brw_ir_vec4.h
+++ b/src/intel/compiler/brw_ir_vec4.h
@@ -287,12 +287,12 @@ public:
 
    bool is_send_from_grf() const;
    unsigned size_read(unsigned arg) const;
-   bool can_reswizzle(const struct gen_device_info *devinfo, int dst_writemask,
+   bool can_reswizzle(const struct intel_device_info *devinfo, int dst_writemask,
                       int swizzle, int swizzle_mask);
    void reswizzle(int dst_writemask, int swizzle);
-   bool can_do_source_mods(const struct gen_device_info *devinfo);
+   bool can_do_source_mods(const struct intel_device_info *devinfo);
    bool can_do_cmod();
-   bool can_do_writemask(const struct gen_device_info *devinfo);
+   bool can_do_writemask(const struct intel_device_info *devinfo);
    bool can_change_types() const;
    bool has_source_and_destination_hazard() const;
    unsigned implied_mrf_writes() const;
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index f6321901bc6..931a3ac8247 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -404,7 +404,7 @@ lower_barycentric_at_offset(nir_builder *b, nir_instr *instr, void *data)
 
 void
 brw_nir_lower_fs_inputs(nir_shader *nir,
-                        const struct gen_device_info *devinfo,
+                        const struct intel_device_info *devinfo,
                         const struct brw_wm_prog_key *key)
 {
    nir_foreach_shader_in_variable(var, nir) {
@@ -515,7 +515,7 @@ static nir_variable_mode
 brw_nir_no_indirect_mask(const struct brw_compiler *compiler,
                          gl_shader_stage stage)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    const bool is_scalar = compiler->scalar_stage[stage];
    nir_variable_mode indirect_mask = 0;
 
@@ -679,7 +679,7 @@ static unsigned
 lower_bit_size_callback(const nir_instr *instr, UNUSED void *data)
 {
    const struct brw_compiler *compiler = (const struct brw_compiler *) data;
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
 
    switch (instr->type) {
    case nir_instr_type_alu: {
@@ -795,7 +795,7 @@ void
 brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
                    const nir_shader *softfp64)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    UNUSED bool progress; /* Written by OPT */
 
    const bool is_scalar = compiler->scalar_stage[nir->info.stage];
@@ -1031,7 +1031,7 @@ brw_vectorize_lower_mem_access(nir_shader *nir,
                                bool is_scalar,
                                bool robust_buffer_access)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    bool progress = false;
 
    if (is_scalar) {
@@ -1087,7 +1087,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
                     bool is_scalar, bool debug_enabled,
                     bool robust_buffer_access)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
 
    UNUSED bool progress; /* Written by OPT */
 
@@ -1236,7 +1236,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
                           const struct brw_compiler *compiler,
                           const struct brw_sampler_prog_key_data *key_tex)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    nir_lower_tex_options tex_options = {
       .lower_txd_clamp_bindless_sampler = true,
       .lower_txd_clamp_if_sampler_index_not_lt_16 = true,
@@ -1468,7 +1468,7 @@ brw_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic)
 }
 
 enum brw_reg_type
-brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type)
+brw_type_for_nir_type(const struct intel_device_info *devinfo, nir_alu_type type)
 {
    switch (type) {
    case nir_type_uint:
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 17ce12c7fdf..d8314e29bd4 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -110,7 +110,7 @@ void brw_nir_lower_vue_inputs(nir_shader *nir,
                               const struct brw_vue_map *vue_map);
 void brw_nir_lower_tes_inputs(nir_shader *nir, const struct brw_vue_map *vue);
 void brw_nir_lower_fs_inputs(nir_shader *nir,
-                             const struct gen_device_info *devinfo,
+                             const struct intel_device_info *devinfo,
                              const struct brw_wm_prog_key *key);
 void brw_nir_lower_vue_outputs(nir_shader *nir);
 void brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue,
@@ -122,7 +122,7 @@ bool brw_nir_lower_conversions(nir_shader *nir);
 bool brw_nir_lower_scoped_barriers(nir_shader *nir);
 
 bool brw_nir_lower_image_load_store(nir_shader *nir,
-                                    const struct gen_device_info *devinfo,
+                                    const struct intel_device_info *devinfo,
                                     bool *uses_atomic_load_store);
 void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
                                      nir_ssa_def *index);
@@ -130,7 +130,7 @@ void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin,
                                               nir_ssa_def *handle);
 
 bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
-                                        const struct gen_device_info *devinfo);
+                                        const struct intel_device_info *devinfo);
 
 void brw_postprocess_nir(nir_shader *nir,
                          const struct brw_compiler *compiler,
@@ -155,7 +155,7 @@ void brw_nir_apply_key(nir_shader *nir,
 
 enum brw_conditional_mod brw_cmod_for_nir_comparison(nir_op op);
 uint32_t brw_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic);
-enum brw_reg_type brw_type_for_nir_type(const struct gen_device_info *devinfo,
+enum brw_reg_type brw_type_for_nir_type(const struct intel_device_info *devinfo,
                                         nir_alu_type type);
 
 void brw_nir_setup_glsl_uniforms(void *mem_ctx, nir_shader *shader,
@@ -195,7 +195,7 @@ nir_shader *brw_nir_create_passthrough_tcs(void *mem_ctx,
 bool brw_nir_move_interpolation_to_top(nir_shader *nir);
 bool brw_nir_demote_sample_qualifiers(nir_shader *nir);
 void brw_nir_populate_wm_prog_data(const nir_shader *shader,
-                                   const struct gen_device_info *devinfo,
+                                   const struct intel_device_info *devinfo,
                                    const struct brw_wm_prog_key *key,
                                    struct brw_wm_prog_data *prog_data);
 
diff --git a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c
index e14fc3ace63..bc70db299bf 100644
--- a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c
+++ b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c
@@ -200,7 +200,7 @@ brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler,
                            const struct brw_vs_prog_key *vs_key,
                            struct brw_ubo_range out_ranges[4])
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
 
    if ((devinfo->ver <= 7 && !devinfo->is_haswell) ||
        !compiler->scalar_stage[nir->info.stage]) {
diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index f96698b084f..e7d44840938 100644
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -89,7 +89,7 @@ image_coord_is_in_bounds(nir_builder *b, nir_deref_instr *deref,
  * the hardware tiling format.
  */
 static nir_ssa_def *
-image_address(nir_builder *b, const struct gen_device_info *devinfo,
+image_address(nir_builder *b, const struct intel_device_info *devinfo,
               nir_deref_instr *deref, nir_ssa_def *coord)
 {
    if (glsl_get_sampler_dim(deref->type) == GLSL_SAMPLER_DIM_1D &&
@@ -259,7 +259,7 @@ get_format_info(enum isl_format fmt)
 }
 
 static nir_ssa_def *
-convert_color_for_load(nir_builder *b, const struct gen_device_info *devinfo,
+convert_color_for_load(nir_builder *b, const struct intel_device_info *devinfo,
                        nir_ssa_def *color,
                        enum isl_format image_fmt, enum isl_format lower_fmt,
                        unsigned dest_components)
@@ -362,7 +362,7 @@ expand_vec:
 
 static bool
 lower_image_load_instr(nir_builder *b,
-                       const struct gen_device_info *devinfo,
+                       const struct intel_device_info *devinfo,
                        nir_intrinsic_instr *intrin)
 {
    nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
@@ -446,7 +446,7 @@ lower_image_load_instr(nir_builder *b,
 }
 
 static nir_ssa_def *
-convert_color_for_store(nir_builder *b, const struct gen_device_info *devinfo,
+convert_color_for_store(nir_builder *b, const struct intel_device_info *devinfo,
                         nir_ssa_def *color,
                         enum isl_format image_fmt, enum isl_format lower_fmt)
 {
@@ -514,7 +514,7 @@ convert_color_for_store(nir_builder *b, const struct gen_device_info *devinfo,
 
 static bool
 lower_image_store_instr(nir_builder *b,
-                        const struct gen_device_info *devinfo,
+                        const struct intel_device_info *devinfo,
                         nir_intrinsic_instr *intrin)
 {
    nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
@@ -592,7 +592,7 @@ lower_image_store_instr(nir_builder *b,
 
 static bool
 lower_image_atomic_instr(nir_builder *b,
-                         const struct gen_device_info *devinfo,
+                         const struct intel_device_info *devinfo,
                          nir_intrinsic_instr *intrin)
 {
    if (devinfo->is_haswell || devinfo->ver >= 8)
@@ -627,7 +627,7 @@ lower_image_atomic_instr(nir_builder *b,
 
 static bool
 lower_image_size_instr(nir_builder *b,
-                       const struct gen_device_info *devinfo,
+                       const struct intel_device_info *devinfo,
                        nir_intrinsic_instr *intrin)
 {
    nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
@@ -676,7 +676,7 @@ lower_image_size_instr(nir_builder *b,
 
 bool
 brw_nir_lower_image_load_store(nir_shader *shader,
-                               const struct gen_device_info *devinfo,
+                               const struct intel_device_info *devinfo,
                                bool *uses_atomic_load_store)
 {
    bool progress = false;
diff --git a/src/intel/compiler/brw_nir_lower_intersection_shader.c b/src/intel/compiler/brw_nir_lower_intersection_shader.c
index 8bd42171758..55924f79b19 100644
--- a/src/intel/compiler/brw_nir_lower_intersection_shader.c
+++ b/src/intel/compiler/brw_nir_lower_intersection_shader.c
@@ -130,7 +130,7 @@ lower_any_hit_for_intersection(nir_shader *any_hit)
 void
 brw_nir_lower_intersection_shader(nir_shader *intersection,
                                   const nir_shader *any_hit,
-                                  const struct gen_device_info *devinfo)
+                                  const struct intel_device_info *devinfo)
 {
    void *dead_ctx = ralloc_context(intersection);
 
diff --git a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
index ea79f3b1879..5b175fd3534 100644
--- a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
+++ b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
@@ -78,7 +78,7 @@ dup_mem_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
 
 static bool
 lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
-                        const struct gen_device_info *devinfo)
+                        const struct intel_device_info *devinfo)
 {
    const bool needs_scalar =
       intrin->intrinsic == nir_intrinsic_load_scratch;
@@ -152,7 +152,7 @@ lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
 
 static bool
 lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
-                         const struct gen_device_info *devinfo)
+                         const struct intel_device_info *devinfo)
 {
    const bool needs_scalar =
       intrin->intrinsic == nir_intrinsic_store_scratch;
@@ -239,7 +239,7 @@ lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
 
 static bool
 lower_mem_access_bit_sizes_impl(nir_function_impl *impl,
-                                const struct gen_device_info *devinfo)
+                                const struct intel_device_info *devinfo)
 {
    bool progress = false;
 
@@ -312,7 +312,7 @@ lower_mem_access_bit_sizes_impl(nir_function_impl *impl,
  */
 bool
 brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
-                                   const struct gen_device_info *devinfo)
+                                   const struct intel_device_info *devinfo)
 {
    bool progress = false;
 
diff --git a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
index 926e29d7266..55f3eb3e31d 100644
--- a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
+++ b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
@@ -46,7 +46,7 @@ build_leaf_is_procedural(nir_builder *b, struct brw_nir_rt_mem_hit_defs *hit)
 
 static void
 lower_rt_intrinsics_impl(nir_function_impl *impl,
-                         const struct gen_device_info *devinfo)
+                         const struct intel_device_info *devinfo)
 {
    nir_builder build;
    nir_builder_init(&build, impl);
@@ -400,7 +400,7 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
  */
 void
 brw_nir_lower_rt_intrinsics(nir_shader *nir,
-                            const struct gen_device_info *devinfo)
+                            const struct intel_device_info *devinfo)
 {
    nir_foreach_function(function, nir) {
       if (function->impl)
diff --git a/src/intel/compiler/brw_nir_rt.c b/src/intel/compiler/brw_nir_rt.c
index 62323e33e81..099b2755d9c 100644
--- a/src/intel/compiler/brw_nir_rt.c
+++ b/src/intel/compiler/brw_nir_rt.c
@@ -266,7 +266,7 @@ build_terminate_ray(nir_builder *b)
  */
 static bool
 lower_ray_walk_intrinsics(nir_shader *shader,
-                          const struct gen_device_info *devinfo)
+                          const struct intel_device_info *devinfo)
 {
    assert(shader->info.stage == MESA_SHADER_ANY_HIT ||
           shader->info.stage == MESA_SHADER_INTERSECTION);
@@ -352,7 +352,7 @@ brw_nir_lower_raygen(nir_shader *nir)
 }
 
 void
-brw_nir_lower_any_hit(nir_shader *nir, const struct gen_device_info *devinfo)
+brw_nir_lower_any_hit(nir_shader *nir, const struct intel_device_info *devinfo)
 {
    assert(nir->info.stage == MESA_SHADER_ANY_HIT);
    NIR_PASS_V(nir, brw_nir_lower_shader_returns);
@@ -387,7 +387,7 @@ brw_nir_lower_callable(nir_shader *nir)
 void
 brw_nir_lower_combined_intersection_any_hit(nir_shader *intersection,
                                             const nir_shader *any_hit,
-                                            const struct gen_device_info *devinfo)
+                                            const struct intel_device_info *devinfo)
 {
    assert(intersection->info.stage == MESA_SHADER_INTERSECTION);
    assert(any_hit == NULL || any_hit->info.stage == MESA_SHADER_ANY_HIT);
@@ -415,7 +415,7 @@ nir_shader *
 brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler,
                                  void *mem_ctx)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    const nir_shader_compiler_options *nir_options =
       compiler->glsl_compiler_options[MESA_SHADER_COMPUTE].NirOptions;
 
diff --git a/src/intel/compiler/brw_nir_rt.h b/src/intel/compiler/brw_nir_rt.h
index baff0e60748..2c48aa1d4de 100644
--- a/src/intel/compiler/brw_nir_rt.h
+++ b/src/intel/compiler/brw_nir_rt.h
@@ -33,13 +33,13 @@ extern "C" {
 
 void brw_nir_lower_raygen(nir_shader *nir);
 void brw_nir_lower_any_hit(nir_shader *nir,
-                           const struct gen_device_info *devinfo);
+                           const struct intel_device_info *devinfo);
 void brw_nir_lower_closest_hit(nir_shader *nir);
 void brw_nir_lower_miss(nir_shader *nir);
 void brw_nir_lower_callable(nir_shader *nir);
 void brw_nir_lower_combined_intersection_any_hit(nir_shader *intersection,
                                                  const nir_shader *any_hit,
-                                                 const struct gen_device_info *devinfo);
+                                                 const struct intel_device_info *devinfo);
 
 /* We reserve the first 16B of the stack for callee data pointers */
 #define BRW_BTD_STACK_RESUME_BSR_ADDR_OFFSET 0
@@ -58,10 +58,10 @@ bool brw_nir_lower_shader_calls(nir_shader *shader,
                                 void *mem_ctx);
 
 void brw_nir_lower_rt_intrinsics(nir_shader *shader,
-                                 const struct gen_device_info *devinfo);
+                                 const struct intel_device_info *devinfo);
 void brw_nir_lower_intersection_shader(nir_shader *intersection,
                                        const nir_shader *any_hit,
-                                       const struct gen_device_info *devinfo);
+                                       const struct intel_device_info *devinfo);
 
 nir_shader *
 brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler,
diff --git a/src/intel/compiler/brw_nir_rt_builder.h b/src/intel/compiler/brw_nir_rt_builder.h
index 9c7b95d1c8f..88912dbf5e9 100644
--- a/src/intel/compiler/brw_nir_rt_builder.h
+++ b/src/intel/compiler/brw_nir_rt_builder.h
@@ -93,10 +93,10 @@ assert_def_size(nir_ssa_def *def, unsigned num_components, unsigned bit_size)
 
 static inline nir_ssa_def *
 brw_nir_num_rt_stacks(nir_builder *b,
-                      const struct gen_device_info *devinfo)
+                      const struct intel_device_info *devinfo)
 {
    return nir_imul_imm(b, nir_load_ray_num_dss_rt_stacks_intel(b),
-                          gen_device_info_num_dual_subslices(devinfo));
+                          intel_device_info_num_dual_subslices(devinfo));
 }
 
 static inline nir_ssa_def *
@@ -109,7 +109,7 @@ brw_nir_rt_stack_id(nir_builder *b)
 
 static inline nir_ssa_def *
 brw_nir_rt_sw_hotzone_addr(nir_builder *b,
-                           const struct gen_device_info *devinfo)
+                           const struct intel_device_info *devinfo)
 {
    nir_ssa_def *offset32 =
       nir_imul_imm(b, brw_nir_rt_stack_id(b), BRW_RT_SIZEOF_HOTZONE);
@@ -175,7 +175,7 @@ brw_nir_rt_mem_ray_addr(nir_builder *b,
 
 static inline nir_ssa_def *
 brw_nir_rt_sw_stack_addr(nir_builder *b,
-                         const struct gen_device_info *devinfo)
+                         const struct intel_device_info *devinfo)
 {
    nir_ssa_def *addr = nir_load_ray_base_mem_addr_intel(b);
 
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index fb84536e7fe..069d80f1a9a 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -53,7 +53,7 @@
 extern "C" {
 #endif
 
-struct gen_device_info;
+struct intel_device_info;
 
 /** Number of general purpose registers (VS, WM, etc) */
 #define BRW_MAX_GRF 128
diff --git a/src/intel/compiler/brw_reg_type.c b/src/intel/compiler/brw_reg_type.c
index e389937cde8..93f1b55cadf 100644
--- a/src/intel/compiler/brw_reg_type.c
+++ b/src/intel/compiler/brw_reg_type.c
@@ -320,7 +320,7 @@ static const struct hw_3src_type {
  * The hardware encoding may depend on whether the value is an immediate.
  */
 unsigned
-brw_reg_type_to_hw_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_hw_type(const struct intel_device_info *devinfo,
                         enum brw_reg_file file,
                         enum brw_reg_type type)
 {
@@ -364,7 +364,7 @@ brw_reg_type_to_hw_type(const struct gen_device_info *devinfo,
  * The hardware encoding may depend on whether the value is an immediate.
  */
 enum brw_reg_type
-brw_hw_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_hw_type_to_reg_type(const struct intel_device_info *devinfo,
                         enum brw_reg_file file, unsigned hw_type)
 {
    const struct hw_type *table;
@@ -406,7 +406,7 @@ brw_hw_type_to_reg_type(const struct gen_device_info *devinfo,
  * for a 3-src align16 instruction
  */
 unsigned
-brw_reg_type_to_a16_hw_3src_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_a16_hw_3src_type(const struct intel_device_info *devinfo,
                                  enum brw_reg_type type)
 {
    const struct hw_3src_type *table;
@@ -431,7 +431,7 @@ brw_reg_type_to_a16_hw_3src_type(const struct gen_device_info *devinfo,
  * for a 3-src align1 instruction
  */
 unsigned
-brw_reg_type_to_a1_hw_3src_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_a1_hw_3src_type(const struct intel_device_info *devinfo,
                                 enum brw_reg_type type)
 {
    if (devinfo->verx10 >= 125) {
@@ -454,7 +454,7 @@ brw_reg_type_to_a1_hw_3src_type(const struct gen_device_info *devinfo,
  * brw_reg_type enumeration value.
  */
 enum brw_reg_type
-brw_a16_hw_3src_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_a16_hw_3src_type_to_reg_type(const struct intel_device_info *devinfo,
                                  unsigned hw_type)
 {
    const struct hw_3src_type *table = NULL;
@@ -480,7 +480,7 @@ brw_a16_hw_3src_type_to_reg_type(const struct gen_device_info *devinfo,
  * brw_reg_type enumeration value.
  */
 enum brw_reg_type
-brw_a1_hw_3src_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_a1_hw_3src_type_to_reg_type(const struct intel_device_info *devinfo,
                                 unsigned hw_type, unsigned exec_type)
 {
    const struct hw_3src_type *table =
diff --git a/src/intel/compiler/brw_reg_type.h b/src/intel/compiler/brw_reg_type.h
index 9263a987060..0013c9bb6aa 100644
--- a/src/intel/compiler/brw_reg_type.h
+++ b/src/intel/compiler/brw_reg_type.h
@@ -37,7 +37,7 @@ extern "C" {
 #endif
 
 enum brw_reg_file;
-struct gen_device_info;
+struct intel_device_info;
 
 /*
  * The ordering has been chosen so that no enum value is the same as a
@@ -164,27 +164,27 @@ brw_reg_type_from_bit_size(unsigned bit_size,
 #define INVALID_HW_REG_TYPE ((unsigned)-1)
 
 unsigned
-brw_reg_type_to_hw_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_hw_type(const struct intel_device_info *devinfo,
                         enum brw_reg_file file, enum brw_reg_type type);
 
 enum brw_reg_type ATTRIBUTE_PURE
-brw_hw_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_hw_type_to_reg_type(const struct intel_device_info *devinfo,
                         enum brw_reg_file file, unsigned hw_type);
 
 unsigned
-brw_reg_type_to_a16_hw_3src_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_a16_hw_3src_type(const struct intel_device_info *devinfo,
                                  enum brw_reg_type type);
 
 unsigned
-brw_reg_type_to_a1_hw_3src_type(const struct gen_device_info *devinfo,
+brw_reg_type_to_a1_hw_3src_type(const struct intel_device_info *devinfo,
                                 enum brw_reg_type type);
 
 enum brw_reg_type
-brw_a16_hw_3src_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_a16_hw_3src_type_to_reg_type(const struct intel_device_info *devinfo,
                                  unsigned hw_type);
 
 enum brw_reg_type
-brw_a1_hw_3src_type_to_reg_type(const struct gen_device_info *devinfo,
+brw_a1_hw_3src_type_to_reg_type(const struct intel_device_info *devinfo,
                                 unsigned hw_type, unsigned exec_type);
 
 unsigned
diff --git a/src/intel/compiler/brw_rt.h b/src/intel/compiler/brw_rt.h
index f153257b6a4..add5ec66629 100644
--- a/src/intel/compiler/brw_rt.h
+++ b/src/intel/compiler/brw_rt.h
@@ -192,13 +192,13 @@ struct brw_rt_raygen_trampoline_params {
 
 static inline void
 brw_rt_compute_scratch_layout(struct brw_rt_scratch_layout *layout,
-                              const struct gen_device_info *devinfo,
+                              const struct intel_device_info *devinfo,
                               uint32_t stack_ids_per_dss,
                               uint32_t sw_stack_size)
 {
    layout->stack_ids_per_dss = stack_ids_per_dss;
 
-   const uint32_t dss_count = gen_device_info_num_dual_subslices(devinfo);
+   const uint32_t dss_count = intel_device_info_num_dual_subslices(devinfo);
    const uint32_t num_stack_ids = dss_count * stack_ids_per_dss;
 
    uint64_t size = 0;
diff --git a/src/intel/compiler/brw_schedule_instructions.cpp b/src/intel/compiler/brw_schedule_instructions.cpp
index 3821114bf99..f9d0bbc54a3 100644
--- a/src/intel/compiler/brw_schedule_instructions.cpp
+++ b/src/intel/compiler/brw_schedule_instructions.cpp
@@ -916,7 +916,7 @@ vec4_instruction_scheduler::get_register_pressure_benefit(backend_instruction *)
 schedule_node::schedule_node(backend_instruction *inst,
                              instruction_scheduler *sched)
 {
-   const struct gen_device_info *devinfo = sched->bs->devinfo;
+   const struct intel_device_info *devinfo = sched->bs->devinfo;
 
    this->inst = inst;
    this->child_array_size = 0;
@@ -1706,7 +1706,7 @@ vec4_instruction_scheduler::issue_time(backend_instruction *)
 void
 instruction_scheduler::schedule_instructions(bblock_t *block)
 {
-   const struct gen_device_info *devinfo = bs->devinfo;
+   const struct intel_device_info *devinfo = bs->devinfo;
    int time = 0;
    int instructions_to_schedule = block->end_ip - block->start_ip + 1;
 
diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
index 128c1685937..91ee7c08603 100644
--- a/src/intel/compiler/brw_shader.cpp
+++ b/src/intel/compiler/brw_shader.cpp
@@ -161,7 +161,7 @@ brw_texture_offset(const nir_tex_instr *tex, unsigned src,
 }
 
 const char *
-brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op)
+brw_instruction_name(const struct intel_device_info *devinfo, enum opcode op)
 {
    switch (op) {
    case 0 ... NUM_BRW_OPCODES - 1:
@@ -878,7 +878,7 @@ backend_instruction::is_commutative() const
 }
 
 bool
-backend_instruction::is_3src(const struct gen_device_info *devinfo) const
+backend_instruction::is_3src(const struct intel_device_info *devinfo) const
 {
    return ::is_3src(devinfo, opcode);
 }
@@ -1079,7 +1079,7 @@ backend_instruction::reads_accumulator_implicitly() const
 }
 
 bool
-backend_instruction::writes_accumulator_implicitly(const struct gen_device_info *devinfo) const
+backend_instruction::writes_accumulator_implicitly(const struct intel_device_info *devinfo) const
 {
    return writes_accumulator ||
           (devinfo->ver < 6 &&
@@ -1311,7 +1311,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
                 struct brw_compile_stats *stats,
                 char **error_str)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL];
    const bool debug_enabled = INTEL_DEBUG & DEBUG_TES;
    const unsigned *assembly;
diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h
index b222b354b71..7b7035293ed 100644
--- a/src/intel/compiler/brw_shader.h
+++ b/src/intel/compiler/brw_shader.h
@@ -56,7 +56,7 @@ public:
    const struct brw_compiler *compiler;
    void *log_data; /* Passed to compiler->*_log functions */
 
-   const struct gen_device_info * const devinfo;
+   const struct intel_device_info * const devinfo;
    const nir_shader *nir;
    struct brw_stage_prog_data * const stage_prog_data;
 
@@ -96,7 +96,7 @@ struct backend_shader;
 enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type);
 enum brw_conditional_mod brw_conditional_for_comparison(unsigned int op);
 uint32_t brw_math_function(enum opcode op);
-const char *brw_instruction_name(const struct gen_device_info *devinfo,
+const char *brw_instruction_name(const struct intel_device_info *devinfo,
                                  enum opcode op);
 bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg);
 bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg);
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index 8fb1c5e3283..17ef9ddf2b5 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -236,7 +236,7 @@ vec4_instruction::size_read(unsigned arg) const
 }
 
 bool
-vec4_instruction::can_do_source_mods(const struct gen_device_info *devinfo)
+vec4_instruction::can_do_source_mods(const struct intel_device_info *devinfo)
 {
    if (devinfo->ver == 6 && is_math())
       return false;
@@ -271,7 +271,7 @@ vec4_instruction::can_do_cmod()
 }
 
 bool
-vec4_instruction::can_do_writemask(const struct gen_device_info *devinfo)
+vec4_instruction::can_do_writemask(const struct intel_device_info *devinfo)
 {
    switch (opcode) {
    case SHADER_OPCODE_GFX4_SCRATCH_READ:
@@ -1124,7 +1124,7 @@ vec4_visitor::opt_set_dependency_control()
 }
 
 bool
-vec4_instruction::can_reswizzle(const struct gen_device_info *devinfo,
+vec4_instruction::can_reswizzle(const struct intel_device_info *devinfo,
                                 int dst_writemask,
                                 int swizzle,
                                 int swizzle_mask)
@@ -2173,7 +2173,7 @@ stage_uses_interleaved_attributes(unsigned stage,
  * instruction's original execution size.
  */
 static unsigned
-get_lowered_simd_width(const struct gen_device_info *devinfo,
+get_lowered_simd_width(const struct intel_device_info *devinfo,
                        enum shader_dispatch_mode dispatch_mode,
                        unsigned stage, const vec4_instruction *inst)
 {
diff --git a/src/intel/compiler/brw_vec4_copy_propagation.cpp b/src/intel/compiler/brw_vec4_copy_propagation.cpp
index c86ba4bbe38..6c5dd28044b 100644
--- a/src/intel/compiler/brw_vec4_copy_propagation.cpp
+++ b/src/intel/compiler/brw_vec4_copy_propagation.cpp
@@ -299,7 +299,7 @@ is_align1_opcode(unsigned opcode)
 }
 
 static bool
-try_copy_propagate(const struct gen_device_info *devinfo,
+try_copy_propagate(const struct intel_device_info *devinfo,
                    vec4_instruction *inst, int arg,
                    const copy_entry *entry, int attributes_per_reg)
 {
diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index ac582e8d2a4..055aaf6f9e5 100644
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -114,7 +114,7 @@ generate_tex(struct brw_codegen *p,
              struct brw_reg surface_index,
              struct brw_reg sampler_index)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    int msg_type = -1;
 
    if (devinfo->ver >= 5) {
@@ -737,7 +737,7 @@ generate_gs_set_primitive_id(struct brw_codegen *p, struct brw_reg dst)
 static void
 generate_tcs_get_instance_id(struct brw_codegen *p, struct brw_reg dst)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
 
    /* "Instance Count" comes as part of the payload in r0.2 bits 23:17.
@@ -768,7 +768,7 @@ generate_tcs_urb_write(struct brw_codegen *p,
                        vec4_instruction *inst,
                        struct brw_reg urb_header)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, send, brw_null_reg());
@@ -952,7 +952,7 @@ generate_vec4_urb_read(struct brw_codegen *p,
                        struct brw_reg dst,
                        struct brw_reg header)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    assert(header.file == BRW_GENERAL_REGISTER_FILE);
    assert(header.type == BRW_REGISTER_TYPE_UD);
@@ -977,7 +977,7 @@ generate_tcs_release_input(struct brw_codegen *p,
                            struct brw_reg vertex,
                            struct brw_reg is_unpaired)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
 
    assert(vertex.file == BRW_IMMEDIATE_VALUE);
    assert(vertex.type == BRW_REGISTER_TYPE_UD);
@@ -1057,7 +1057,7 @@ generate_tcs_create_barrier_header(struct brw_codegen *p,
                                    struct brw_vue_prog_data *prog_data,
                                    struct brw_reg dst)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
    struct brw_reg m0_2 = get_element_ud(dst, 2);
    unsigned instances = ((struct brw_tcs_prog_data *) prog_data)->instances;
@@ -1146,7 +1146,7 @@ generate_scratch_read(struct brw_codegen *p,
                       struct brw_reg dst,
                       struct brw_reg index)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    struct brw_reg header = brw_vec8_grf(0, 0);
 
    gfx6_resolve_implied_move(p, &header, inst->base_mrf);
@@ -1192,7 +1192,7 @@ generate_scratch_write(struct brw_codegen *p,
                        struct brw_reg src,
                        struct brw_reg index)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 7 ? GFX7_SFID_DATAPORT_DATA_CACHE :
        devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_RENDER_CACHE :
@@ -1270,7 +1270,7 @@ generate_pull_constant_load(struct brw_codegen *p,
                             struct brw_reg index,
                             struct brw_reg offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const unsigned target_cache =
       (devinfo->ver >= 6 ? GFX6_SFID_DATAPORT_SAMPLER_CACHE :
        BRW_SFID_DATAPORT_READ);
@@ -1356,7 +1356,7 @@ generate_pull_constant_load_gfx7(struct brw_codegen *p,
                                  struct brw_reg surf_index,
                                  struct brw_reg offset)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    assert(surf_index.type == BRW_REGISTER_TYPE_UD);
 
    if (surf_index.file == BRW_IMMEDIATE_VALUE) {
@@ -1476,7 +1476,7 @@ generate_code(struct brw_codegen *p,
               struct brw_compile_stats *stats,
               bool debug_enabled)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
+   const struct intel_device_info *devinfo = p->devinfo;
    const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->info.stage);
    struct disasm_info *disasm_info = disasm_initialize(devinfo, cfg);
 
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 664dda1dd26..84598d10463 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -282,7 +282,7 @@ vec4_visitor::get_indirect_offset(nir_intrinsic_instr *instr)
 static src_reg
 setup_imm_df(const vec4_builder &bld, double v)
 {
-   const gen_device_info *devinfo = bld.shader->devinfo;
+   const intel_device_info *devinfo = bld.shader->devinfo;
    assert(devinfo->ver == 7);
 
    /* gfx7.5 does not support DF immediates straighforward but the DIM
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 33646904577..bcd9d322f8a 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -365,7 +365,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
                 struct brw_compile_stats *stats,
                 char **error_str)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    struct brw_vue_prog_data *vue_prog_data = &prog_data->base;
    const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL];
    const bool debug_enabled = INTEL_DEBUG & DEBUG_TCS;
diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp
index cfad712e01a..dd74dde302b 100644
--- a/src/intel/compiler/brw_vec4_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_visitor.cpp
@@ -1245,7 +1245,7 @@ vec4_visitor::emit_urb_slot(dst_reg reg, int varying)
 }
 
 static unsigned
-align_interleaved_urb_mlen(const struct gen_device_info *devinfo, unsigned mlen)
+align_interleaved_urb_mlen(const struct intel_device_info *devinfo, unsigned mlen)
 {
    if (devinfo->ver >= 6) {
       /* URB data written (does not include the message header reg) must
diff --git a/src/intel/compiler/brw_vue_map.c b/src/intel/compiler/brw_vue_map.c
index 3bf4e712338..d478ed4387d 100644
--- a/src/intel/compiler/brw_vue_map.c
+++ b/src/intel/compiler/brw_vue_map.c
@@ -57,7 +57,7 @@ assign_vue_slot(struct brw_vue_map *vue_map, int varying, int slot)
  * Compute the VUE map for a shader stage.
  */
 void
-brw_compute_vue_map(const struct gen_device_info *devinfo,
+brw_compute_vue_map(const struct intel_device_info *devinfo,
                     struct brw_vue_map *vue_map,
                     uint64_t slots_valid,
                     bool separate,
diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp
index 759ed5cbce0..d096f15c71e 100644
--- a/src/intel/compiler/test_eu_compact.cpp
+++ b/src/intel/compiler/test_eu_compact.cpp
@@ -65,7 +65,7 @@ test_compact_instruction(struct brw_codegen *p, brw_inst src)
  * become meaningless once fuzzing twiddles a related bit.
  */
 static void
-clear_pad_bits(const struct gen_device_info *devinfo, brw_inst *inst)
+clear_pad_bits(const struct intel_device_info *devinfo, brw_inst *inst)
 {
    if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND &&
        brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC &&
@@ -83,7 +83,7 @@ clear_pad_bits(const struct gen_device_info *devinfo, brw_inst *inst)
 }
 
 static bool
-skip_bit(const struct gen_device_info *devinfo, brw_inst *src, int bit)
+skip_bit(const struct intel_device_info *devinfo, brw_inst *src, int bit)
 {
    /* pad bit */
    if (bit == 7)
@@ -285,7 +285,7 @@ struct {
 };
 
 static bool
-run_tests(const struct gen_device_info *devinfo)
+run_tests(const struct intel_device_info *devinfo)
 {
    bool fail = false;
 
@@ -330,7 +330,7 @@ run_tests(const struct gen_device_info *devinfo)
 int
 main(UNUSED int argc, UNUSED char **argv)
 {
-   struct gen_device_info *devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo));
+   struct intel_device_info *devinfo = (struct intel_device_info *)calloc(1, sizeof(*devinfo));
    bool fail = false;
 
    for (devinfo->ver = 5; devinfo->ver <= 12; devinfo->ver++) {
diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp
index 156c243f81f..fa95958ca32 100644
--- a/src/intel/compiler/test_eu_validate.cpp
+++ b/src/intel/compiler/test_eu_validate.cpp
@@ -58,7 +58,7 @@ public:
    virtual ~validation_test();
 
    struct brw_codegen *p;
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
 };
 
 validation_test::validation_test()
@@ -75,7 +75,7 @@ validation_test::~validation_test()
 void validation_test::SetUp()
 {
    struct gen_info info = GetParam();
-   int devid = gen_device_name_to_pci_device_id(info.name);
+   int devid = intel_device_name_to_pci_device_id(info.name);
 
    gen_get_device_info_from_pci_id(devid, &devinfo);
 
@@ -2312,7 +2312,7 @@ TEST_P(validation_test, qword_low_power_align1_regioning_restrictions)
       brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width);
       brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride);
 
-      if (devinfo.is_cherryview || gen_device_info_is_9lp(&devinfo)) {
+      if (devinfo.is_cherryview || intel_device_info_is_9lp(&devinfo)) {
          EXPECT_EQ(inst[i].expected_result, validate(p));
       } else {
          EXPECT_TRUE(validate(p));
@@ -2444,7 +2444,7 @@ TEST_P(validation_test, qword_low_power_no_indirect_addressing)
       brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width);
       brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride);
 
-      if (devinfo.is_cherryview || gen_device_info_is_9lp(&devinfo)) {
+      if (devinfo.is_cherryview || intel_device_info_is_9lp(&devinfo)) {
          EXPECT_EQ(inst[i].expected_result, validate(p));
       } else {
          EXPECT_TRUE(validate(p));
@@ -2591,7 +2591,7 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf)
       brw_inst_set_src0_width(&devinfo, last_inst, inst[i].src_width);
       brw_inst_set_src0_hstride(&devinfo, last_inst, inst[i].src_hstride);
 
-      if (devinfo.is_cherryview || gen_device_info_is_9lp(&devinfo)) {
+      if (devinfo.is_cherryview || intel_device_info_is_9lp(&devinfo)) {
          EXPECT_EQ(inst[i].expected_result, validate(p));
       } else {
          EXPECT_TRUE(validate(p));
@@ -2607,7 +2607,7 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf)
    brw_MAC(p, retype(g0, BRW_REGISTER_TYPE_DF),
               retype(stride(g0, 4, 4, 1), BRW_REGISTER_TYPE_DF),
               retype(stride(g0, 4, 4, 1), BRW_REGISTER_TYPE_DF));
-   if (devinfo.is_cherryview || gen_device_info_is_9lp(&devinfo)) {
+   if (devinfo.is_cherryview || intel_device_info_is_9lp(&devinfo)) {
       EXPECT_FALSE(validate(p));
    } else {
       EXPECT_TRUE(validate(p));
@@ -2809,7 +2809,7 @@ TEST_P(validation_test, qword_low_power_no_depctrl)
       brw_inst_set_no_dd_check(&devinfo, last_inst, inst[i].no_dd_check);
       brw_inst_set_no_dd_clear(&devinfo, last_inst, inst[i].no_dd_clear);
 
-      if (devinfo.is_cherryview || gen_device_info_is_9lp(&devinfo)) {
+      if (devinfo.is_cherryview || intel_device_info_is_9lp(&devinfo)) {
          EXPECT_EQ(inst[i].expected_result, validate(p));
       } else {
          EXPECT_TRUE(validate(p));
diff --git a/src/intel/compiler/test_fs_cmod_propagation.cpp b/src/intel/compiler/test_fs_cmod_propagation.cpp
index e9b03d54b43..ff4f9785fbb 100644
--- a/src/intel/compiler/test_fs_cmod_propagation.cpp
+++ b/src/intel/compiler/test_fs_cmod_propagation.cpp
@@ -34,7 +34,7 @@ class cmod_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct brw_wm_prog_data *prog_data;
    struct gl_shader_program *shader_prog;
@@ -67,7 +67,7 @@ void cmod_propagation_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_wm_prog_data);
diff --git a/src/intel/compiler/test_fs_copy_propagation.cpp b/src/intel/compiler/test_fs_copy_propagation.cpp
index d6619fa29dd..dc67be44ead 100644
--- a/src/intel/compiler/test_fs_copy_propagation.cpp
+++ b/src/intel/compiler/test_fs_copy_propagation.cpp
@@ -34,7 +34,7 @@ class copy_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct brw_wm_prog_data *prog_data;
    struct gl_shader_program *shader_prog;
@@ -57,7 +57,7 @@ void copy_propagation_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_wm_prog_data);
diff --git a/src/intel/compiler/test_fs_saturate_propagation.cpp b/src/intel/compiler/test_fs_saturate_propagation.cpp
index 6cbf96f9436..5a0b899d7c9 100644
--- a/src/intel/compiler/test_fs_saturate_propagation.cpp
+++ b/src/intel/compiler/test_fs_saturate_propagation.cpp
@@ -34,7 +34,7 @@ class saturate_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct brw_wm_prog_data *prog_data;
    struct gl_shader_program *shader_prog;
@@ -57,7 +57,7 @@ void saturate_propagation_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_wm_prog_data);
diff --git a/src/intel/compiler/test_fs_scoreboard.cpp b/src/intel/compiler/test_fs_scoreboard.cpp
index 1801911f973..41e5f21a315 100644
--- a/src/intel/compiler/test_fs_scoreboard.cpp
+++ b/src/intel/compiler/test_fs_scoreboard.cpp
@@ -34,7 +34,7 @@ class scoreboard_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct brw_wm_prog_data *prog_data;
    struct gl_shader_program *shader_prog;
@@ -45,7 +45,7 @@ void scoreboard_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_wm_prog_data);
diff --git a/src/intel/compiler/test_vec4_cmod_propagation.cpp b/src/intel/compiler/test_vec4_cmod_propagation.cpp
index 8e23ab32045..70539d4b875 100644
--- a/src/intel/compiler/test_vec4_cmod_propagation.cpp
+++ b/src/intel/compiler/test_vec4_cmod_propagation.cpp
@@ -37,7 +37,7 @@ class cmod_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct gl_shader_program *shader_prog;
    struct brw_vue_prog_data *prog_data;
@@ -100,7 +100,7 @@ void cmod_propagation_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_vue_prog_data);
diff --git a/src/intel/compiler/test_vec4_copy_propagation.cpp b/src/intel/compiler/test_vec4_copy_propagation.cpp
index b0645698347..f242a13507e 100644
--- a/src/intel/compiler/test_vec4_copy_propagation.cpp
+++ b/src/intel/compiler/test_vec4_copy_propagation.cpp
@@ -35,7 +35,7 @@ class copy_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct gl_shader_program *shader_prog;
    struct brw_vue_prog_data *prog_data;
@@ -92,7 +92,7 @@ void copy_propagation_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_vue_prog_data);
diff --git a/src/intel/compiler/test_vec4_dead_code_eliminate.cpp b/src/intel/compiler/test_vec4_dead_code_eliminate.cpp
index 0234b9c495a..4daf7f7fac0 100644
--- a/src/intel/compiler/test_vec4_dead_code_eliminate.cpp
+++ b/src/intel/compiler/test_vec4_dead_code_eliminate.cpp
@@ -33,7 +33,7 @@ class dead_code_eliminate_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct gl_shader_program *shader_prog;
    struct brw_vue_prog_data *prog_data;
@@ -90,7 +90,7 @@ void dead_code_eliminate_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_vue_prog_data);
diff --git a/src/intel/compiler/test_vec4_register_coalesce.cpp b/src/intel/compiler/test_vec4_register_coalesce.cpp
index 46bdc2c9a8c..f4e61841dd8 100644
--- a/src/intel/compiler/test_vec4_register_coalesce.cpp
+++ b/src/intel/compiler/test_vec4_register_coalesce.cpp
@@ -37,7 +37,7 @@ class register_coalesce_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
    void *ctx;
    struct gl_shader_program *shader_prog;
    struct brw_vue_prog_data *prog_data;
@@ -95,7 +95,7 @@ void register_coalesce_test::SetUp()
 {
    ctx = ralloc_context(NULL);
    compiler = rzalloc(ctx, struct brw_compiler);
-   devinfo = rzalloc(ctx, struct gen_device_info);
+   devinfo = rzalloc(ctx, struct intel_device_info);
    compiler->devinfo = devinfo;
 
    prog_data = ralloc(ctx, struct brw_vue_prog_data);
diff --git a/src/intel/dev/intel_dev_info.c b/src/intel/dev/intel_dev_info.c
index a3730310d9c..040886e32b9 100644
--- a/src/intel/dev/intel_dev_info.c
+++ b/src/intel/dev/intel_dev_info.c
@@ -57,7 +57,7 @@ main(int argc, char *argv[])
       return error("Not device found");
 
    for (int i = 0; i < max_devices; i++) {
-      struct gen_device_info devinfo;
+      struct intel_device_info devinfo;
       const char *path = devices[i]->nodes[DRM_NODE_RENDER];
       int fd = open(path, O_RDWR | O_CLOEXEC);
 
@@ -82,11 +82,11 @@ main(int argc, char *argv[])
          n_s += (devinfo.slice_masks & (1u << s)) ? 1 : 0;
          for (unsigned ss = 0; ss < devinfo.num_subslices[s]; ss++) {
             fprintf(stdout, "   slice%u.subslice%u: ", s, ss);
-            if (gen_device_info_subslice_available(&devinfo, s, ss)) {
+            if (intel_device_info_subslice_available(&devinfo, s, ss)) {
                n_ss++;
                for (unsigned eu = 0; eu < devinfo.num_eu_per_subslice; eu++) {
-                  n_eus += gen_device_info_eu_available(&devinfo, s, ss, eu) ? 1 : 0;
-                  fprintf(stdout, "%s", gen_device_info_eu_available(&devinfo, s, ss, eu) ? "1" : "0");
+                  n_eus += intel_device_info_eu_available(&devinfo, s, ss, eu) ? 1 : 0;
+                  fprintf(stdout, "%s", intel_device_info_eu_available(&devinfo, s, ss, eu) ? "1" : "0");
                }
             } else {
                fprintf(stderr, "fused");
diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c
index 1550b0f0c3d..bcf699a21ee 100644
--- a/src/intel/dev/intel_device_info.c
+++ b/src/intel/dev/intel_device_info.c
@@ -73,7 +73,7 @@ static const struct {
  * Returns -1 if the device is not known.
  */
 int
-gen_device_name_to_pci_device_id(const char *name)
+intel_device_name_to_pci_device_id(const char *name)
 {
    for (unsigned i = 0; i < ARRAY_SIZE(name_map); i++) {
       if (!strcmp(name_map[i].name, name))
@@ -83,13 +83,13 @@ gen_device_name_to_pci_device_id(const char *name)
    return -1;
 }
 
-static const struct gen_device_info gen_device_info_gfx3 = {
+static const struct intel_device_info intel_device_info_gfx3 = {
    .ver = 3,
    .simulator_id = -1,
    .cs_prefetch_size = 512,
 };
 
-static const struct gen_device_info gen_device_info_i965 = {
+static const struct intel_device_info intel_device_info_i965 = {
    .ver = 4,
    .has_negative_rhw_bug = true,
    .num_slices = 1,
@@ -107,7 +107,7 @@ static const struct gen_device_info gen_device_info_i965 = {
    .cs_prefetch_size = 512,
 };
 
-static const struct gen_device_info gen_device_info_g4x = {
+static const struct intel_device_info intel_device_info_g4x = {
    .ver = 4,
    .verx10 = 45,
    .has_pln = true,
@@ -129,7 +129,7 @@ static const struct gen_device_info gen_device_info_g4x = {
    .cs_prefetch_size = 512,
 };
 
-static const struct gen_device_info gen_device_info_ilk = {
+static const struct intel_device_info intel_device_info_ilk = {
    .ver = 5,
    .has_pln = true,
    .has_compr4 = true,
@@ -149,7 +149,7 @@ static const struct gen_device_info gen_device_info_ilk = {
    .cs_prefetch_size = 512,
 };
 
-static const struct gen_device_info gen_device_info_snb_gt1 = {
+static const struct intel_device_info intel_device_info_snb_gt1 = {
    .ver = 6,
    .gt = 1,
    .has_hiz_and_separate_stencil = true,
@@ -179,7 +179,7 @@ static const struct gen_device_info gen_device_info_snb_gt1 = {
    .cs_prefetch_size = 512,
 };
 
-static const struct gen_device_info gen_device_info_snb_gt2 = {
+static const struct intel_device_info intel_device_info_snb_gt2 = {
    .ver = 6,
    .gt = 2,
    .has_hiz_and_separate_stencil = true,
@@ -220,7 +220,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
    .timestamp_frequency = 12500000,                 \
    .cs_prefetch_size = 512
 
-static const struct gen_device_info gen_device_info_ivb_gt1 = {
+static const struct intel_device_info intel_device_info_ivb_gt1 = {
    GFX7_FEATURES, .is_ivybridge = true, .gt = 1,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -248,7 +248,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 = {
    .simulator_id = 7,
 };
 
-static const struct gen_device_info gen_device_info_ivb_gt2 = {
+static const struct intel_device_info intel_device_info_ivb_gt2 = {
    GFX7_FEATURES, .is_ivybridge = true, .gt = 2,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -277,7 +277,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 = {
    .simulator_id = 7,
 };
 
-static const struct gen_device_info gen_device_info_byt = {
+static const struct intel_device_info intel_device_info_byt = {
    GFX7_FEATURES, .is_baytrail = true, .gt = 1,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -312,7 +312,7 @@ static const struct gen_device_info gen_device_info_byt = {
    .verx10 = 75,                 \
    .supports_simd16_3src = true
 
-static const struct gen_device_info gen_device_info_hsw_gt1 = {
+static const struct intel_device_info intel_device_info_hsw_gt1 = {
    HSW_FEATURES, .gt = 1,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -340,7 +340,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 = {
    .simulator_id = 9,
 };
 
-static const struct gen_device_info gen_device_info_hsw_gt2 = {
+static const struct intel_device_info intel_device_info_hsw_gt2 = {
    HSW_FEATURES, .gt = 2,
    .num_slices = 1,
    .num_subslices = { 2, },
@@ -368,7 +368,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 = {
    .simulator_id = 9,
 };
 
-static const struct gen_device_info gen_device_info_hsw_gt3 = {
+static const struct intel_device_info intel_device_info_hsw_gt3 = {
    HSW_FEATURES, .gt = 3,
    .num_slices = 2,
    .num_subslices = { 2, },
@@ -420,7 +420,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
    .timestamp_frequency = 12500000,                 \
    .cs_prefetch_size = 512
 
-static const struct gen_device_info gen_device_info_bdw_gt1 = {
+static const struct intel_device_info intel_device_info_bdw_gt1 = {
    GFX8_FEATURES, .gt = 1,
    .is_broadwell = true,
    .num_slices = 1,
@@ -444,7 +444,7 @@ static const struct gen_device_info gen_device_info_bdw_gt1 = {
    .simulator_id = 11,
 };
 
-static const struct gen_device_info gen_device_info_bdw_gt2 = {
+static const struct intel_device_info intel_device_info_bdw_gt2 = {
    GFX8_FEATURES, .gt = 2,
    .is_broadwell = true,
    .num_slices = 1,
@@ -467,7 +467,7 @@ static const struct gen_device_info gen_device_info_bdw_gt2 = {
    .simulator_id = 11,
 };
 
-static const struct gen_device_info gen_device_info_bdw_gt3 = {
+static const struct intel_device_info intel_device_info_bdw_gt3 = {
    GFX8_FEATURES, .gt = 3,
    .is_broadwell = true,
    .num_slices = 2,
@@ -490,7 +490,7 @@ static const struct gen_device_info gen_device_info_bdw_gt3 = {
    .simulator_id = 11,
 };
 
-static const struct gen_device_info gen_device_info_chv = {
+static const struct intel_device_info intel_device_info_chv = {
    GFX8_FEATURES, .is_cherryview = 1, .gt = 1,
    .has_llc = false,
    .has_integer_dword_mul = false,
@@ -601,7 +601,7 @@ static const struct gen_device_info gen_device_info_chv = {
    GFX9_HW_INFO,                                    \
    .has_sample_with_hiz = true
 
-static const struct gen_device_info gen_device_info_skl_gt1 = {
+static const struct intel_device_info intel_device_info_skl_gt1 = {
    GFX9_FEATURES, .gt = 1,
    .is_skylake = true,
    .num_slices = 1,
@@ -615,7 +615,7 @@ static const struct gen_device_info gen_device_info_skl_gt1 = {
    .simulator_id = 12,
 };
 
-static const struct gen_device_info gen_device_info_skl_gt2 = {
+static const struct intel_device_info intel_device_info_skl_gt2 = {
    GFX9_FEATURES, .gt = 2,
    .is_skylake = true,
    .num_slices = 1,
@@ -625,7 +625,7 @@ static const struct gen_device_info gen_device_info_skl_gt2 = {
    .simulator_id = 12,
 };
 
-static const struct gen_device_info gen_device_info_skl_gt3 = {
+static const struct intel_device_info intel_device_info_skl_gt3 = {
    GFX9_FEATURES, .gt = 3,
    .is_skylake = true,
    .num_slices = 2,
@@ -635,7 +635,7 @@ static const struct gen_device_info gen_device_info_skl_gt3 = {
    .simulator_id = 12,
 };
 
-static const struct gen_device_info gen_device_info_skl_gt4 = {
+static const struct intel_device_info intel_device_info_skl_gt4 = {
    GFX9_FEATURES, .gt = 4,
    .is_skylake = true,
    .num_slices = 3,
@@ -653,14 +653,14 @@ static const struct gen_device_info gen_device_info_skl_gt4 = {
    .simulator_id = 12,
 };
 
-static const struct gen_device_info gen_device_info_bxt = {
+static const struct intel_device_info intel_device_info_bxt = {
    GFX9_LP_FEATURES_3X6,
    .is_broxton = true,
    .l3_banks = 2,
    .simulator_id = 14,
 };
 
-static const struct gen_device_info gen_device_info_bxt_2x6 = {
+static const struct intel_device_info intel_device_info_bxt_2x6 = {
    GFX9_LP_FEATURES_2X6,
    .is_broxton = true,
    .l3_banks = 1,
@@ -671,7 +671,7 @@ static const struct gen_device_info gen_device_info_bxt_2x6 = {
  * There's no KBL entry. Using the default SKL (GFX9) GS entries value.
  */
 
-static const struct gen_device_info gen_device_info_kbl_gt1 = {
+static const struct intel_device_info intel_device_info_kbl_gt1 = {
    GFX9_FEATURES,
    .is_kabylake = true,
    .gt = 1,
@@ -689,7 +689,7 @@ static const struct gen_device_info gen_device_info_kbl_gt1 = {
    .simulator_id = 16,
 };
 
-static const struct gen_device_info gen_device_info_kbl_gt1_5 = {
+static const struct intel_device_info intel_device_info_kbl_gt1_5 = {
    GFX9_FEATURES,
    .is_kabylake = true,
    .gt = 1,
@@ -702,7 +702,7 @@ static const struct gen_device_info gen_device_info_kbl_gt1_5 = {
    .simulator_id = 16,
 };
 
-static const struct gen_device_info gen_device_info_kbl_gt2 = {
+static const struct intel_device_info intel_device_info_kbl_gt2 = {
    GFX9_FEATURES,
    .is_kabylake = true,
    .gt = 2,
@@ -714,7 +714,7 @@ static const struct gen_device_info gen_device_info_kbl_gt2 = {
    .simulator_id = 16,
 };
 
-static const struct gen_device_info gen_device_info_kbl_gt3 = {
+static const struct intel_device_info intel_device_info_kbl_gt3 = {
    GFX9_FEATURES,
    .is_kabylake = true,
    .gt = 3,
@@ -726,7 +726,7 @@ static const struct gen_device_info gen_device_info_kbl_gt3 = {
    .simulator_id = 16,
 };
 
-static const struct gen_device_info gen_device_info_kbl_gt4 = {
+static const struct intel_device_info intel_device_info_kbl_gt4 = {
    GFX9_FEATURES,
    .is_kabylake = true,
    .gt = 4,
@@ -748,21 +748,21 @@ static const struct gen_device_info gen_device_info_kbl_gt4 = {
    .simulator_id = 16,
 };
 
-static const struct gen_device_info gen_device_info_glk = {
+static const struct intel_device_info intel_device_info_glk = {
    GFX9_LP_FEATURES_3X6,
    .is_geminilake = true,
    .l3_banks = 2,
    .simulator_id = 17,
 };
 
-static const struct gen_device_info gen_device_info_glk_2x6 = {
+static const struct intel_device_info intel_device_info_glk_2x6 = {
    GFX9_LP_FEATURES_2X6,
    .is_geminilake = true,
    .l3_banks = 2,
    .simulator_id = 17,
 };
 
-static const struct gen_device_info gen_device_info_cfl_gt1 = {
+static const struct intel_device_info intel_device_info_cfl_gt1 = {
    GFX9_FEATURES,
    .is_coffeelake = true,
    .gt = 1,
@@ -778,7 +778,7 @@ static const struct gen_device_info gen_device_info_cfl_gt1 = {
    .urb.max_entries[MESA_SHADER_GEOMETRY] = 256,
    .simulator_id = 24,
 };
-static const struct gen_device_info gen_device_info_cfl_gt2 = {
+static const struct intel_device_info intel_device_info_cfl_gt2 = {
    GFX9_FEATURES,
    .is_coffeelake = true,
    .gt = 2,
@@ -790,7 +790,7 @@ static const struct gen_device_info gen_device_info_cfl_gt2 = {
    .simulator_id = 24,
 };
 
-static const struct gen_device_info gen_device_info_cfl_gt3 = {
+static const struct intel_device_info intel_device_info_cfl_gt3 = {
    GFX9_FEATURES,
    .is_coffeelake = true,
    .gt = 3,
@@ -837,7 +837,7 @@ static const struct gen_device_info gen_device_info_cfl_gt3 = {
       [MESA_SHADER_GEOMETRY]  = 1032,                 \
    }
 
-static const struct gen_device_info gen_device_info_icl_gt2 = {
+static const struct intel_device_info intel_device_info_icl_gt2 = {
    GFX11_FEATURES(2, 1, subslices(8), 8),
    .urb = {
       GFX11_URB_MIN_MAX_ENTRIES,
@@ -845,7 +845,7 @@ static const struct gen_device_info gen_device_info_icl_gt2 = {
    .simulator_id = 19,
 };
 
-static const struct gen_device_info gen_device_info_icl_gt1_5 = {
+static const struct intel_device_info intel_device_info_icl_gt1_5 = {
    GFX11_FEATURES(1, 1, subslices(6), 6),
    .urb = {
       GFX11_URB_MIN_MAX_ENTRIES,
@@ -853,7 +853,7 @@ static const struct gen_device_info gen_device_info_icl_gt1_5 = {
    .simulator_id = 19,
 };
 
-static const struct gen_device_info gen_device_info_icl_gt1 = {
+static const struct intel_device_info intel_device_info_icl_gt1 = {
    GFX11_FEATURES(1, 1, subslices(4), 6),
    .urb = {
       GFX11_URB_MIN_MAX_ENTRIES,
@@ -861,7 +861,7 @@ static const struct gen_device_info gen_device_info_icl_gt1 = {
    .simulator_id = 19,
 };
 
-static const struct gen_device_info gen_device_info_icl_gt0_5 = {
+static const struct intel_device_info intel_device_info_icl_gt0_5 = {
    GFX11_FEATURES(1, 1, subslices(1), 6),
    .urb = {
       GFX11_URB_MIN_MAX_ENTRIES,
@@ -877,35 +877,35 @@ static const struct gen_device_info gen_device_info_icl_gt0_5 = {
    .disable_ccs_repack = true,                      \
    .simulator_id = 28
 
-static const struct gen_device_info gen_device_info_ehl_4x8 = {
+static const struct intel_device_info intel_device_info_ehl_4x8 = {
    GFX11_FEATURES(1, 1, subslices(4), 4),
    GFX11_LP_FEATURES,
 };
 
-static const struct gen_device_info gen_device_info_ehl_4x6 = {
+static const struct intel_device_info intel_device_info_ehl_4x6 = {
    GFX11_FEATURES(1, 1, subslices(4), 4),
    GFX11_LP_FEATURES,
    .num_eu_per_subslice = 6,
 };
 
-static const struct gen_device_info gen_device_info_ehl_4x5 = {
+static const struct intel_device_info intel_device_info_ehl_4x5 = {
    GFX11_FEATURES(1, 1, subslices(4), 4),
    GFX11_LP_FEATURES,
    .num_eu_per_subslice = 5,
 };
 
-static const struct gen_device_info gen_device_info_ehl_4x4 = {
+static const struct intel_device_info intel_device_info_ehl_4x4 = {
    GFX11_FEATURES(1, 1, subslices(4), 4),
    GFX11_LP_FEATURES,
    .num_eu_per_subslice = 4,
 };
 
-static const struct gen_device_info gen_device_info_ehl_2x8 = {
+static const struct intel_device_info intel_device_info_ehl_2x8 = {
    GFX11_FEATURES(1, 1, subslices(2), 4),
    GFX11_LP_FEATURES,
 };
 
-static const struct gen_device_info gen_device_info_ehl_2x4 = {
+static const struct intel_device_info intel_device_info_ehl_2x4 = {
    GFX11_FEATURES(1, 1, subslices(2), 4),
    GFX11_LP_FEATURES,
    .num_eu_per_subslice =4,
@@ -958,32 +958,32 @@ static const struct gen_device_info gen_device_info_ehl_2x4 = {
    GFX12_FEATURES(_gt, 1, _gt == 1 ? 4 : 8),                    \
    .num_subslices = dual_subslices(_gt == 1 ? 2 : 6)
 
-static const struct gen_device_info gen_device_info_tgl_gt1 = {
+static const struct intel_device_info intel_device_info_tgl_gt1 = {
    GFX12_GT_FEATURES(1),
    .is_tigerlake = true,
 };
 
-static const struct gen_device_info gen_device_info_tgl_gt2 = {
+static const struct intel_device_info intel_device_info_tgl_gt2 = {
    GFX12_GT_FEATURES(2),
    .is_tigerlake = true,
 };
 
-static const struct gen_device_info gen_device_info_rkl_gt05 = {
+static const struct intel_device_info intel_device_info_rkl_gt05 = {
    GFX12_GT05_FEATURES,
    .is_rocketlake = true,
 };
 
-static const struct gen_device_info gen_device_info_rkl_gt1 = {
+static const struct intel_device_info intel_device_info_rkl_gt1 = {
    GFX12_GT_FEATURES(1),
    .is_rocketlake = true,
 };
 
-static const struct gen_device_info gen_device_info_adl_gt05 = {
+static const struct intel_device_info intel_device_info_adl_gt05 = {
    GFX12_GT05_FEATURES,
    .is_alderlake = true,
 };
 
-static const struct gen_device_info gen_device_info_adl_gt1 = {
+static const struct intel_device_info intel_device_info_adl_gt1 = {
    GFX12_GT_FEATURES(1),
    .is_alderlake = true,
 };
@@ -995,12 +995,12 @@ static const struct gen_device_info gen_device_info_adl_gt1 = {
    .urb.size = 768,                             \
    .simulator_id = 30
 
-UNUSED static const struct gen_device_info gen_device_info_dg1 = {
+UNUSED static const struct intel_device_info intel_device_info_dg1 = {
    GFX12_DG1_FEATURES,
 };
 
 static void
-gen_device_info_set_eu_mask(struct gen_device_info *devinfo,
+intel_device_info_set_eu_mask(struct intel_device_info *devinfo,
                             unsigned slice,
                             unsigned subslice,
                             unsigned eu_mask)
@@ -1015,7 +1015,7 @@ gen_device_info_set_eu_mask(struct gen_device_info *devinfo,
 }
 
 /* Generate slice/subslice/eu masks from number of
- * slices/subslices/eu_per_subslices in the per generation/gt gen_device_info
+ * slices/subslices/eu_per_subslices in the per generation/gt intel_device_info
  * structure.
  *
  * These can be overridden with values reported by the kernel either from
@@ -1023,7 +1023,7 @@ gen_device_info_set_eu_mask(struct gen_device_info *devinfo,
  * through the i915 query uapi.
  */
 static void
-fill_masks(struct gen_device_info *devinfo)
+fill_masks(struct intel_device_info *devinfo)
 {
    devinfo->slice_masks = (1U << devinfo->num_slices) - 1;
 
@@ -1044,14 +1044,14 @@ fill_masks(struct gen_device_info *devinfo)
 
    for (int s = 0; s < devinfo->num_slices; s++) {
       for (int ss = 0; ss < devinfo->num_subslices[s]; ss++) {
-         gen_device_info_set_eu_mask(devinfo, s, ss,
+         intel_device_info_set_eu_mask(devinfo, s, ss,
                                      (1U << devinfo->num_eu_per_subslice) - 1);
       }
    }
 }
 
 static void
-reset_masks(struct gen_device_info *devinfo)
+reset_masks(struct intel_device_info *devinfo)
 {
    devinfo->subslice_slice_stride = 0;
    devinfo->eu_subslice_stride = 0;
@@ -1068,7 +1068,7 @@ reset_masks(struct gen_device_info *devinfo)
 }
 
 static void
-update_from_topology(struct gen_device_info *devinfo,
+update_from_topology(struct intel_device_info *devinfo,
                      const struct drm_i915_query_topology_info *topology)
 {
    reset_masks(devinfo);
@@ -1144,7 +1144,7 @@ update_from_topology(struct gen_device_info *devinfo,
 }
 
 static bool
-update_from_masks(struct gen_device_info *devinfo, uint32_t slice_mask,
+update_from_masks(struct intel_device_info *devinfo, uint32_t slice_mask,
                   uint32_t subslice_mask, uint32_t n_eus)
 {
    struct drm_i915_query_topology_info *topology;
@@ -1223,18 +1223,18 @@ getparam(int fd, uint32_t param, int *value)
 
 bool
 gen_get_device_info_from_pci_id(int pci_id,
-                                struct gen_device_info *devinfo)
+                                struct intel_device_info *devinfo)
 {
    switch (pci_id) {
 #undef CHIPSET
 #define CHIPSET(id, family, fam_str, name) \
-      case id: *devinfo = gen_device_info_##family; break;
+      case id: *devinfo = intel_device_info_##family; break;
 #include "pci_ids/i965_pci_ids.h"
 #include "pci_ids/iris_pci_ids.h"
 
 #undef CHIPSET
 #define CHIPSET(id, fam_str, name) \
-      case id: *devinfo = gen_device_info_gfx3; break;
+      case id: *devinfo = intel_device_info_gfx3; break;
 #include "pci_ids/i915_pci_ids.h"
 
    default:
@@ -1302,7 +1302,7 @@ gen_get_device_name(int devid)
  * (kernel 4.13+)
  */
 static bool
-getparam_topology(struct gen_device_info *devinfo, int fd)
+getparam_topology(struct intel_device_info *devinfo, int fd)
 {
    int slice_mask = 0;
    if (!getparam(fd, I915_PARAM_SLICE_MASK, &slice_mask))
@@ -1332,7 +1332,7 @@ getparam_topology(struct gen_device_info *devinfo, int fd)
  * preferred API for updating the topology in devinfo (kernel 4.17+)
  */
 static bool
-query_topology(struct gen_device_info *devinfo, int fd)
+query_topology(struct intel_device_info *devinfo, int fd)
 {
    struct drm_i915_query_item item = {
       .query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
@@ -1404,14 +1404,14 @@ gen_has_get_tiling(int fd)
 }
 
 bool
-gen_get_device_info_from_fd(int fd, struct gen_device_info *devinfo)
+gen_get_device_info_from_fd(int fd, struct intel_device_info *devinfo)
 {
    int devid = 0;
 
    const char *devid_override = getenv("INTEL_DEVID_OVERRIDE");
    if (devid_override && strlen(devid_override) > 0) {
       if (geteuid() == getuid()) {
-         devid = gen_device_name_to_pci_device_id(devid_override);
+         devid = intel_device_name_to_pci_device_id(devid_override);
          /* Fallback to PCI ID. */
          if (devid <= 0)
             devid = strtol(devid_override, NULL, 0);
diff --git a/src/intel/dev/intel_device_info.h b/src/intel/dev/intel_device_info.h
index d42d1c1c2ba..9549a4b25c3 100644
--- a/src/intel/dev/intel_device_info.h
+++ b/src/intel/dev/intel_device_info.h
@@ -44,7 +44,7 @@ struct drm_i915_query_topology_info;
 /**
  * Intel hardware information and quirks
  */
-struct gen_device_info
+struct intel_device_info
 {
    /* Driver internal numbers used to differentiate platforms. */
    int ver;
@@ -285,18 +285,18 @@ struct gen_device_info
 
 #ifdef GFX_VER
 
-#define gen_device_info_is_9lp(devinfo) \
+#define intel_device_info_is_9lp(devinfo) \
    (GFX_VER == 9 && ((devinfo)->is_broxton || (devinfo)->is_geminilake))
 
 #else
 
-#define gen_device_info_is_9lp(devinfo) \
+#define intel_device_info_is_9lp(devinfo) \
    ((devinfo)->is_broxton || (devinfo)->is_geminilake)
 
 #endif
 
 static inline bool
-gen_device_info_subslice_available(const struct gen_device_info *devinfo,
+intel_device_info_subslice_available(const struct intel_device_info *devinfo,
                                    int slice, int subslice)
 {
    return (devinfo->subslice_masks[slice * devinfo->subslice_slice_stride +
@@ -304,7 +304,7 @@ gen_device_info_subslice_available(const struct gen_device_info *devinfo,
 }
 
 static inline bool
-gen_device_info_eu_available(const struct gen_device_info *devinfo,
+intel_device_info_eu_available(const struct intel_device_info *devinfo,
                              int slice, int subslice, int eu)
 {
    unsigned subslice_offset = slice * devinfo->eu_slice_stride +
@@ -314,7 +314,7 @@ gen_device_info_eu_available(const struct gen_device_info *devinfo,
 }
 
 static inline uint32_t
-gen_device_info_subslice_total(const struct gen_device_info *devinfo)
+intel_device_info_subslice_total(const struct intel_device_info *devinfo)
 {
    uint32_t total = 0;
 
@@ -325,7 +325,7 @@ gen_device_info_subslice_total(const struct gen_device_info *devinfo)
 }
 
 static inline uint32_t
-gen_device_info_eu_total(const struct gen_device_info *devinfo)
+intel_device_info_eu_total(const struct intel_device_info *devinfo)
 {
    uint32_t total = 0;
 
@@ -336,24 +336,24 @@ gen_device_info_eu_total(const struct gen_device_info *devinfo)
 }
 
 static inline unsigned
-gen_device_info_num_dual_subslices(UNUSED const struct gen_device_info *devinfo)
+intel_device_info_num_dual_subslices(UNUSED const struct intel_device_info *devinfo)
 {
    unreachable("TODO");
 }
 
-int gen_device_name_to_pci_device_id(const char *name);
+int intel_device_name_to_pci_device_id(const char *name);
 const char *gen_get_device_name(int devid);
 
 static inline uint64_t
-gen_device_info_timebase_scale(const struct gen_device_info *devinfo,
+intel_device_info_timebase_scale(const struct intel_device_info *devinfo,
                                uint64_t gpu_timestamp)
 {
    return (1000000000ull * gpu_timestamp) / devinfo->timestamp_frequency;
 }
 
-bool gen_get_device_info_from_fd(int fh, struct gen_device_info *devinfo);
+bool gen_get_device_info_from_fd(int fh, struct intel_device_info *devinfo);
 bool gen_get_device_info_from_pci_id(int pci_id,
-                                     struct gen_device_info *devinfo);
+                                     struct intel_device_info *devinfo);
 int gen_get_aperture_size(int fd, uint64_t *size);
 
 #ifdef __cplusplus
diff --git a/src/intel/dev/intel_device_info_test.c b/src/intel/dev/intel_device_info_test.c
index 3b9e833d0a3..840102317ca 100644
--- a/src/intel/dev/intel_device_info_test.c
+++ b/src/intel/dev/intel_device_info_test.c
@@ -19,7 +19,7 @@ main(int argc, char *argv[])
    };
 
    for (uint32_t i = 0; i < ARRAY_SIZE(chipsets); i++) {
-      struct gen_device_info devinfo = { 0, };
+      struct intel_device_info devinfo = { 0, };
 
       assert(gen_get_device_info_from_pci_id(chipsets[i].pci_id, &devinfo));
 
diff --git a/src/intel/dev/meson.build b/src/intel/dev/meson.build
index a776843d291..7a800b923ae 100644
--- a/src/intel/dev/meson.build
+++ b/src/intel/dev/meson.build
@@ -37,9 +37,9 @@ libintel_dev = static_library(
 )
 
 if with_tests
-  test('gen_device_info_test',
+  test('intel_device_info_test',
        executable(
-         'gen_device_info_test',
+         'intel_device_info_test',
          'intel_device_info_test.c',
          include_directories : [inc_include, inc_src],
          link_with : libintel_dev,
diff --git a/src/intel/genxml/gen_bits_header.py b/src/intel/genxml/gen_bits_header.py
index 7cfdcacd0a3..2b84eb20f20 100644
--- a/src/intel/genxml/gen_bits_header.py
+++ b/src/intel/genxml/gen_bits_header.py
@@ -77,7 +77,7 @@ from operator import itemgetter
 % endfor
 
 static inline uint32_t ATTRIBUTE_PURE
-${item.token_name}_${prop}(const struct gen_device_info *devinfo)
+${item.token_name}_${prop}(const struct intel_device_info *devinfo)
 {
    switch (devinfo->verx10) {
    case 125: return ${item.get_prop(prop, 12.5)};
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 8d2b2d41e82..c9d851983c0 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -190,7 +190,7 @@ isl_mocs(const struct isl_device *dev, isl_surf_usage_flags_t usage,
 
 void
 isl_device_init(struct isl_device *dev,
-                const struct gen_device_info *info,
+                const struct intel_device_info *info,
                 bool has_bit6_swizzling)
 {
    /* Gfx8+ don't have bit6 swizzling, ensure callsite is not confused. */
@@ -2793,7 +2793,7 @@ isl_surf_get_depth_format(const struct isl_device *dev,
 }
 
 bool
-isl_swizzle_supports_rendering(const struct gen_device_info *devinfo,
+isl_swizzle_supports_rendering(const struct intel_device_info *devinfo,
                                struct isl_swizzle swizzle)
 {
    if (devinfo->is_haswell) {
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index b413e4b3c6f..ce63b23a065 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -51,7 +51,7 @@
 extern "C" {
 #endif
 
-struct gen_device_info;
+struct intel_device_info;
 struct brw_image_param;
 
 #ifndef ISL_GFX_VER
@@ -1040,7 +1040,7 @@ typedef enum {
 } isl_memcpy_type;
 
 struct isl_device {
-   const struct gen_device_info *info;
+   const struct intel_device_info *info;
    bool use_separate_stencil;
    bool has_bit6_swizzling;
 
@@ -1525,7 +1525,7 @@ extern const struct isl_format_layout isl_format_layouts[];
 
 void
 isl_device_init(struct isl_device *dev,
-                const struct gen_device_info *info,
+                const struct intel_device_info *info,
                 bool has_bit6_swizzling);
 
 isl_sample_count_mask_t ATTRIBUTE_CONST
@@ -1549,28 +1549,28 @@ isl_format_get_name(enum isl_format fmt)
 
 enum isl_format isl_format_for_pipe_format(enum pipe_format pf);
 
-bool isl_format_supports_rendering(const struct gen_device_info *devinfo,
+bool isl_format_supports_rendering(const struct intel_device_info *devinfo,
                                    enum isl_format format);
-bool isl_format_supports_alpha_blending(const struct gen_device_info *devinfo,
+bool isl_format_supports_alpha_blending(const struct intel_device_info *devinfo,
                                         enum isl_format format);
-bool isl_format_supports_sampling(const struct gen_device_info *devinfo,
+bool isl_format_supports_sampling(const struct intel_device_info *devinfo,
                                   enum isl_format format);
-bool isl_format_supports_filtering(const struct gen_device_info *devinfo,
+bool isl_format_supports_filtering(const struct intel_device_info *devinfo,
                                    enum isl_format format);
-bool isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo,
+bool isl_format_supports_vertex_fetch(const struct intel_device_info *devinfo,
                                       enum isl_format format);
-bool isl_format_supports_typed_writes(const struct gen_device_info *devinfo,
+bool isl_format_supports_typed_writes(const struct intel_device_info *devinfo,
                                       enum isl_format format);
-bool isl_format_supports_typed_reads(const struct gen_device_info *devinfo,
+bool isl_format_supports_typed_reads(const struct intel_device_info *devinfo,
                                      enum isl_format format);
-bool isl_format_supports_ccs_d(const struct gen_device_info *devinfo,
+bool isl_format_supports_ccs_d(const struct intel_device_info *devinfo,
                                enum isl_format format);
-bool isl_format_supports_ccs_e(const struct gen_device_info *devinfo,
+bool isl_format_supports_ccs_e(const struct intel_device_info *devinfo,
                                enum isl_format format);
-bool isl_format_supports_multisampling(const struct gen_device_info *devinfo,
+bool isl_format_supports_multisampling(const struct intel_device_info *devinfo,
                                        enum isl_format format);
 
-bool isl_formats_are_ccs_e_compatible(const struct gen_device_info *devinfo,
+bool isl_formats_are_ccs_e_compatible(const struct intel_device_info *devinfo,
                                       enum isl_format format1,
                                       enum isl_format format2);
 uint8_t isl_format_get_aux_map_encoding(enum isl_format format);
@@ -1723,14 +1723,14 @@ void isl_color_value_unpack(union isl_color_value *value,
 bool isl_is_storage_image_format(enum isl_format fmt);
 
 enum isl_format
-isl_lower_storage_image_format(const struct gen_device_info *devinfo,
+isl_lower_storage_image_format(const struct intel_device_info *devinfo,
                                enum isl_format fmt);
 
 /* Returns true if this hardware supports typed load/store on a format with
  * the same size as the given format.
  */
 bool
-isl_has_matching_typed_storage_image_format(const struct gen_device_info *devinfo,
+isl_has_matching_typed_storage_image_format(const struct intel_device_info *devinfo,
                                             enum isl_format fmt);
 
 static inline enum isl_tiling
@@ -1914,7 +1914,7 @@ isl_drm_modifier_get_default_aux_state(uint64_t modifier)
  * such as VkImageDrmFormatModifierListCreateInfoEXT.
  */
 uint32_t
-isl_drm_modifier_get_score(const struct gen_device_info *devinfo,
+isl_drm_modifier_get_score(const struct intel_device_info *devinfo,
                            uint64_t modifier);
 
 struct isl_extent2d ATTRIBUTE_CONST
@@ -2018,7 +2018,7 @@ isl_swizzle_is_identity(struct isl_swizzle swizzle)
 }
 
 bool
-isl_swizzle_supports_rendering(const struct gen_device_info *devinfo,
+isl_swizzle_supports_rendering(const struct intel_device_info *devinfo,
                                struct isl_swizzle swizzle);
 
 struct isl_swizzle
diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
index 2b82cfcba0a..9a495af9b9a 100644
--- a/src/intel/isl/isl_drm.c
+++ b/src/intel/isl/isl_drm.c
@@ -136,7 +136,7 @@ isl_drm_modifier_get_info(uint64_t modifier)
 }
 
 uint32_t
-isl_drm_modifier_get_score(const struct gen_device_info *devinfo,
+isl_drm_modifier_get_score(const struct intel_device_info *devinfo,
                            uint64_t modifier)
 {
    /* FINISHME: Add gfx12 modifiers */
diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index a43ac1e65bf..95d5e51b7f7 100644
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -673,7 +673,7 @@ isl_format_for_pipe_format(enum pipe_format pf)
 }
 
 static unsigned
-format_gen(const struct gen_device_info *devinfo)
+format_gen(const struct intel_device_info *devinfo)
 {
    return devinfo->ver * 10 + (devinfo->is_g4x || devinfo->is_haswell) * 5;
 }
@@ -687,7 +687,7 @@ format_info_exists(enum isl_format format)
 }
 
 bool
-isl_format_supports_rendering(const struct gen_device_info *devinfo,
+isl_format_supports_rendering(const struct intel_device_info *devinfo,
                               enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -697,7 +697,7 @@ isl_format_supports_rendering(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_format_supports_alpha_blending(const struct gen_device_info *devinfo,
+isl_format_supports_alpha_blending(const struct intel_device_info *devinfo,
                                    enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -707,7 +707,7 @@ isl_format_supports_alpha_blending(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_format_supports_sampling(const struct gen_device_info *devinfo,
+isl_format_supports_sampling(const struct intel_device_info *devinfo,
                              enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -727,7 +727,7 @@ isl_format_supports_sampling(const struct gen_device_info *devinfo,
        */
       if (fmtl->txc == ISL_TXC_ASTC)
          return format < ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16;
-   } else if (gen_device_info_is_9lp(devinfo)) {
+   } else if (intel_device_info_is_9lp(devinfo)) {
       const struct isl_format_layout *fmtl = isl_format_get_layout(format);
       /* Support for ASTC HDR exists on Broxton even though big-core
        * GPUs didn't get it until Cannonlake.
@@ -740,7 +740,7 @@ isl_format_supports_sampling(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_format_supports_filtering(const struct gen_device_info *devinfo,
+isl_format_supports_filtering(const struct intel_device_info *devinfo,
                               enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -760,7 +760,7 @@ isl_format_supports_filtering(const struct gen_device_info *devinfo,
        */
       if (fmtl->txc == ISL_TXC_ASTC)
          return format < ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16;
-   } else if (gen_device_info_is_9lp(devinfo)) {
+   } else if (intel_device_info_is_9lp(devinfo)) {
       const struct isl_format_layout *fmtl = isl_format_get_layout(format);
       /* Support for ASTC HDR exists on Broxton even though big-core
        * GPUs didn't get it until Cannonlake.
@@ -773,7 +773,7 @@ isl_format_supports_filtering(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo,
+isl_format_supports_vertex_fetch(const struct intel_device_info *devinfo,
                                  enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -792,7 +792,7 @@ isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo,
  * Returns true if the given format can support typed writes.
  */
 bool
-isl_format_supports_typed_writes(const struct gen_device_info *devinfo,
+isl_format_supports_typed_writes(const struct intel_device_info *devinfo,
                                  enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -813,7 +813,7 @@ isl_format_supports_typed_writes(const struct gen_device_info *devinfo,
  * occurrences.
  */
 bool
-isl_format_supports_typed_reads(const struct gen_device_info *devinfo,
+isl_format_supports_typed_reads(const struct intel_device_info *devinfo,
                                 enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -829,7 +829,7 @@ isl_format_supports_typed_reads(const struct gen_device_info *devinfo,
  * and sample count.  See isl_surf_get_ccs_surf for details.
  */
 bool
-isl_format_supports_ccs_d(const struct gen_device_info *devinfo,
+isl_format_supports_ccs_d(const struct intel_device_info *devinfo,
                           enum isl_format format)
 {
    /* Clear-only compression was first added on Ivy Bridge and was last
@@ -853,7 +853,7 @@ isl_format_supports_ccs_d(const struct gen_device_info *devinfo,
  * such as tiling and sample count.  See isl_surf_get_ccs_surf for details.
  */
 bool
-isl_format_supports_ccs_e(const struct gen_device_info *devinfo,
+isl_format_supports_ccs_e(const struct intel_device_info *devinfo,
                           enum isl_format format)
 {
    if (!format_info_exists(format))
@@ -872,7 +872,7 @@ isl_format_supports_ccs_e(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_format_supports_multisampling(const struct gen_device_info *devinfo,
+isl_format_supports_multisampling(const struct intel_device_info *devinfo,
                                   enum isl_format format)
 {
    /* From the Sandybridge PRM, Volume 4 Part 1 p72, SURFACE_STATE, Surface
@@ -919,7 +919,7 @@ isl_format_supports_multisampling(const struct gen_device_info *devinfo,
  * format-dependent.
  */
 bool
-isl_formats_are_ccs_e_compatible(const struct gen_device_info *devinfo,
+isl_formats_are_ccs_e_compatible(const struct intel_device_info *devinfo,
                                  enum isl_format format1,
                                  enum isl_format format2)
 {
diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c
index 152be4b877a..4b53a8ed338 100644
--- a/src/intel/isl/isl_storage_image.c
+++ b/src/intel/isl/isl_storage_image.c
@@ -76,7 +76,7 @@ isl_is_storage_image_format(enum isl_format format)
 }
 
 enum isl_format
-isl_lower_storage_image_format(const struct gen_device_info *devinfo,
+isl_lower_storage_image_format(const struct intel_device_info *devinfo,
                                enum isl_format format)
 {
    switch (format) {
@@ -199,7 +199,7 @@ isl_lower_storage_image_format(const struct gen_device_info *devinfo,
 }
 
 bool
-isl_has_matching_typed_storage_image_format(const struct gen_device_info *devinfo,
+isl_has_matching_typed_storage_image_format(const struct intel_device_info *devinfo,
                                             enum isl_format fmt)
 {
    if (devinfo->ver >= 9) {
diff --git a/src/intel/isl/tests/isl_surf_get_image_offset_test.c b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
index d775621a2d0..03a5b154f97 100644
--- a/src/intel/isl/tests/isl_surf_get_image_offset_test.c
+++ b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
@@ -124,7 +124,7 @@ test_bdw_2d_r8g8b8a8_unorm_512x512_array01_samples01_noaux_tiley0(void)
 {
    bool ok;
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    t_assert(gen_get_device_info_from_pci_id(BDW_GT2_DEVID, &devinfo));
 
    struct isl_device dev;
@@ -172,7 +172,7 @@ test_bdw_2d_r8g8b8a8_unorm_1024x1024_array06_samples01_noaux_tiley0(void)
 {
    bool ok;
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    t_assert(gen_get_device_info_from_pci_id(BDW_GT2_DEVID, &devinfo));
 
    struct isl_device dev;
@@ -233,7 +233,7 @@ test_bdw_3d_r8g8b8a8_unorm_256x256x256_levels09_tiley0(void)
 {
    bool ok;
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    t_assert(gen_get_device_info_from_pci_id(BDW_GT2_DEVID, &devinfo));
 
    struct isl_device dev;
diff --git a/src/intel/perf/gen_perf.c b/src/intel/perf/gen_perf.c
index e815ab0f73f..29bc79cbee4 100644
--- a/src/intel/perf/gen_perf.c
+++ b/src/intel/perf/gen_perf.c
@@ -174,7 +174,7 @@ read_sysfs_drm_device_file_uint64(struct gen_perf_config *perf,
 
 static void
 register_oa_config(struct gen_perf_config *perf,
-                   const struct gen_device_info *devinfo,
+                   const struct intel_device_info *devinfo,
                    const struct gen_perf_query_info *query,
                    uint64_t config_id)
 {
@@ -191,7 +191,7 @@ register_oa_config(struct gen_perf_config *perf,
 
 static void
 enumerate_sysfs_metrics(struct gen_perf_config *perf,
-                        const struct gen_device_info *devinfo)
+                        const struct intel_device_info *devinfo)
 {
    DIR *metricsdir = NULL;
    struct dirent *metric_entry;
@@ -237,7 +237,7 @@ enumerate_sysfs_metrics(struct gen_perf_config *perf,
 
 static void
 add_all_metrics(struct gen_perf_config *perf,
-                const struct gen_device_info *devinfo)
+                const struct intel_device_info *devinfo)
 {
    hash_table_foreach(perf->oa_metrics_table, entry) {
       const struct gen_perf_query_info *query = entry->data;
@@ -342,7 +342,7 @@ i915_add_config(struct gen_perf_config *perf, int fd,
 
 static void
 init_oa_configs(struct gen_perf_config *perf, int fd,
-                const struct gen_device_info *devinfo)
+                const struct intel_device_info *devinfo)
 {
    hash_table_foreach(perf->oa_metrics_table, entry) {
       const struct gen_perf_query_info *query = entry->data;
@@ -368,7 +368,7 @@ init_oa_configs(struct gen_perf_config *perf, int fd,
 
 static void
 compute_topology_builtins(struct gen_perf_config *perf,
-                          const struct gen_device_info *devinfo)
+                          const struct intel_device_info *devinfo)
 {
    perf->sys_vars.slice_mask = devinfo->slice_masks;
    perf->sys_vars.n_eu_slices = devinfo->num_slices;
@@ -396,14 +396,14 @@ compute_topology_builtins(struct gen_perf_config *perf,
 
    for (int s = 0; s < util_last_bit(devinfo->slice_masks); s++) {
       for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) {
-         if (gen_device_info_subslice_available(devinfo, s, ss))
+         if (intel_device_info_subslice_available(devinfo, s, ss))
             perf->sys_vars.subslice_mask |= 1ULL << (s * bits_per_subslice + ss);
       }
    }
 }
 
 static bool
-init_oa_sys_vars(struct gen_perf_config *perf, const struct gen_device_info *devinfo)
+init_oa_sys_vars(struct gen_perf_config *perf, const struct intel_device_info *devinfo)
 {
    uint64_t min_freq_mhz = 0, max_freq_mhz = 0;
 
@@ -432,7 +432,7 @@ init_oa_sys_vars(struct gen_perf_config *perf, const struct gen_device_info *dev
 typedef void (*perf_register_oa_queries_t)(struct gen_perf_config *);
 
 static perf_register_oa_queries_t
-get_register_queries_function(const struct gen_device_info *devinfo)
+get_register_queries_function(const struct intel_device_info *devinfo)
 {
    if (devinfo->is_haswell)
       return gen_oa_register_queries_hsw;
@@ -503,7 +503,7 @@ sort_query(struct gen_perf_query_info *q)
 
 static void
 load_pipeline_statistic_metrics(struct gen_perf_config *perf_cfg,
-                                const struct gen_device_info *devinfo)
+                                const struct intel_device_info *devinfo)
 {
    struct gen_perf_query_info *query =
       gen_perf_append_query_info(perf_cfg, MAX_STAT_COUNTERS);
@@ -710,7 +710,7 @@ build_unique_counter_list(struct gen_perf_config *perf)
 
 static bool
 oa_metrics_available(struct gen_perf_config *perf, int fd,
-      const struct gen_device_info *devinfo)
+      const struct intel_device_info *devinfo)
 {
    perf_register_oa_queries_t oa_register = get_register_queries_function(devinfo);
    bool i915_perf_oa_available = false;
@@ -752,7 +752,7 @@ oa_metrics_available(struct gen_perf_config *perf, int fd,
 
 static void
 load_oa_metrics(struct gen_perf_config *perf, int fd,
-                const struct gen_device_info *devinfo)
+                const struct intel_device_info *devinfo)
 {
    int existing_queries = perf->n_queries;
 
@@ -1014,7 +1014,7 @@ gfx8_read_report_clock_ratios(const uint32_t *report,
 
 void
 gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
-                                       const struct gen_device_info *devinfo,
+                                       const struct intel_device_info *devinfo,
                                        const uint32_t *start,
                                        const uint32_t *end)
 {
@@ -1038,7 +1038,7 @@ gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 }
 
 static inline bool
-can_use_mi_rpc_bc_counters(const struct gen_device_info *devinfo)
+can_use_mi_rpc_bc_counters(const struct intel_device_info *devinfo)
 {
    return devinfo->ver <= 11;
 }
@@ -1046,7 +1046,7 @@ can_use_mi_rpc_bc_counters(const struct gen_device_info *devinfo)
 void
 gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
                                  const struct gen_perf_query_info *query,
-                                 const struct gen_device_info *devinfo,
+                                 const struct intel_device_info *devinfo,
                                  const uint32_t *start,
                                  const uint32_t *end)
 {
@@ -1112,7 +1112,7 @@ gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 
 void
 gen_perf_query_result_read_gt_frequency(struct gen_perf_query_result *result,
-                                        const struct gen_device_info *devinfo,
+                                        const struct intel_device_info *devinfo,
                                         const uint32_t start,
                                         const uint32_t end)
 {
@@ -1174,7 +1174,7 @@ query_accumulator_offset(const struct gen_perf_query_info *query,
 void
 gen_perf_query_result_accumulate_fields(struct gen_perf_query_result *result,
                                         const struct gen_perf_query_info *query,
-                                        const struct gen_device_info *devinfo,
+                                        const struct intel_device_info *devinfo,
                                         const void *start,
                                         const void *end,
                                         bool no_oa_accumulate)
@@ -1234,7 +1234,7 @@ gen_perf_query_result_clear(struct gen_perf_query_result *result)
 
 void
 gen_perf_query_result_print_fields(const struct gen_perf_query_info *query,
-                                   const struct gen_device_info *devinfo,
+                                   const struct intel_device_info *devinfo,
                                    const void *data)
 {
    const struct gen_perf_query_field_layout *layout = &query->perf->query_layout;
@@ -1299,7 +1299,7 @@ add_query_register(struct gen_perf_query_field_layout *layout,
 
 static void
 gen_perf_init_query_fields(struct gen_perf_config *perf_cfg,
-                           const struct gen_device_info *devinfo)
+                           const struct intel_device_info *devinfo)
 {
    struct gen_perf_query_field_layout *layout = &perf_cfg->query_layout;
 
@@ -1368,7 +1368,7 @@ gen_perf_init_query_fields(struct gen_perf_config *perf_cfg,
 
 void
 gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
-                      const struct gen_device_info *devinfo,
+                      const struct intel_device_info *devinfo,
                       int drm_fd,
                       bool include_pipeline_statistics)
 {
diff --git a/src/intel/perf/gen_perf.h b/src/intel/perf/gen_perf.h
index 6b061c4200a..f807365479b 100644
--- a/src/intel/perf/gen_perf.h
+++ b/src/intel/perf/gen_perf.h
@@ -41,7 +41,7 @@
 
 #include "drm-uapi/i915_drm.h"
 
-struct gen_device_info;
+struct intel_device_info;
 
 struct gen_perf_config;
 struct gen_perf_query_info;
@@ -383,7 +383,7 @@ struct gen_perf_counter_pass {
 };
 
 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
-                           const struct gen_device_info *devinfo,
+                           const struct intel_device_info *devinfo,
                            int drm_fd,
                            bool include_pipeline_statistics);
 
@@ -411,14 +411,14 @@ uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
  *  result.
  */
 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
-                                            const struct gen_device_info *devinfo,
+                                            const struct intel_device_info *devinfo,
                                             const uint32_t *start,
                                             const uint32_t *end);
 
 /** Store the GT frequency as reported by the RPSTAT register.
  */
 void gen_perf_query_result_read_gt_frequency(struct gen_perf_query_result *result,
-                                             const struct gen_device_info *devinfo,
+                                             const struct intel_device_info *devinfo,
                                              const uint32_t start,
                                              const uint32_t end);
 
@@ -433,7 +433,7 @@ void gen_perf_query_result_read_perfcnts(struct gen_perf_query_result *result,
  */
 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
                                       const struct gen_perf_query_info *query,
-                                      const struct gen_device_info *devinfo,
+                                      const struct intel_device_info *devinfo,
                                       const uint32_t *start,
                                       const uint32_t *end);
 
@@ -442,7 +442,7 @@ void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
  */
 void gen_perf_query_result_accumulate_fields(struct gen_perf_query_result *result,
                                              const struct gen_perf_query_info *query,
-                                             const struct gen_device_info *devinfo,
+                                             const struct intel_device_info *devinfo,
                                              const void *start,
                                              const void *end,
                                              bool no_oa_accumulate);
@@ -452,7 +452,7 @@ void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 /** Debug helper printing out query data.
  */
 void gen_perf_query_result_print_fields(const struct gen_perf_query_info *query,
-                                        const struct gen_device_info *devinfo,
+                                        const struct intel_device_info *devinfo,
                                         const void *data);
 
 static inline size_t
diff --git a/src/intel/perf/gen_perf_mdapi.c b/src/intel/perf/gen_perf_mdapi.c
index 6c8b9c69209..de5faf7477a 100644
--- a/src/intel/perf/gen_perf_mdapi.c
+++ b/src/intel/perf/gen_perf_mdapi.c
@@ -33,7 +33,7 @@
 
 int
 gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
-                                  const struct gen_device_info *devinfo,
+                                  const struct intel_device_info *devinfo,
                                   const struct gen_perf_query_info *query,
                                   const struct gen_perf_query_result *result)
 {
@@ -59,7 +59,7 @@ gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
 
       mdapi_data->ReportsCount = result->reports_accumulated;
       mdapi_data->TotalTime =
-         gen_device_info_timebase_scale(devinfo, result->accumulator[0]);
+         intel_device_info_timebase_scale(devinfo, result->accumulator[0]);
       mdapi_data->CoreFrequency = result->gt_frequency[1];
       mdapi_data->CoreFrequencyChanged = result->gt_frequency[1] != result->gt_frequency[0];
       mdapi_data->SplitOccured = result->query_disjoint;
@@ -84,9 +84,9 @@ gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
       mdapi_data->ReportId = result->hw_id;
       mdapi_data->ReportsCount = result->reports_accumulated;
       mdapi_data->TotalTime =
-         gen_device_info_timebase_scale(devinfo, result->accumulator[0]);
+         intel_device_info_timebase_scale(devinfo, result->accumulator[0]);
       mdapi_data->BeginTimestamp =
-         gen_device_info_timebase_scale(devinfo, result->begin_timestamp);
+         intel_device_info_timebase_scale(devinfo, result->begin_timestamp);
       mdapi_data->GPUTicks = result->accumulator[1];
       mdapi_data->CoreFrequency = result->gt_frequency[1];
       mdapi_data->CoreFrequencyChanged = result->gt_frequency[1] != result->gt_frequency[0];
@@ -118,9 +118,9 @@ gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
       mdapi_data->ReportId = result->hw_id;
       mdapi_data->ReportsCount = result->reports_accumulated;
       mdapi_data->TotalTime =
-         gen_device_info_timebase_scale(devinfo, result->accumulator[0]);
+         intel_device_info_timebase_scale(devinfo, result->accumulator[0]);
       mdapi_data->BeginTimestamp =
-         gen_device_info_timebase_scale(devinfo, result->begin_timestamp);
+         intel_device_info_timebase_scale(devinfo, result->begin_timestamp);
       mdapi_data->GPUTicks = result->accumulator[1];
       mdapi_data->CoreFrequency = result->gt_frequency[1];
       mdapi_data->CoreFrequencyChanged = result->gt_frequency[1] != result->gt_frequency[0];
@@ -138,7 +138,7 @@ gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
 
 void
 gen_perf_register_mdapi_statistic_query(struct gen_perf_config *perf_cfg,
-                                        const struct gen_device_info *devinfo)
+                                        const struct intel_device_info *devinfo)
 {
    if (!(devinfo->ver >= 7 && devinfo->ver <= 12))
       return;
@@ -230,7 +230,7 @@ fill_mdapi_perf_query_counter(struct gen_perf_query_info *query,
 
 void
 gen_perf_register_mdapi_oa_query(struct gen_perf_config *perf,
-                                 const struct gen_device_info *devinfo)
+                                 const struct intel_device_info *devinfo)
 {
    struct gen_perf_query_info *query = NULL;
 
diff --git a/src/intel/perf/gen_perf_mdapi.h b/src/intel/perf/gen_perf_mdapi.h
index 37ddb4d7fb7..0123c31922f 100644
--- a/src/intel/perf/gen_perf_mdapi.h
+++ b/src/intel/perf/gen_perf_mdapi.h
@@ -128,12 +128,12 @@ struct mdapi_pipeline_metrics {
 };
 
 int gen_perf_query_result_write_mdapi(void *data, uint32_t data_size,
-                                      const struct gen_device_info *devinfo,
+                                      const struct intel_device_info *devinfo,
                                       const struct gen_perf_query_info *query,
                                       const struct gen_perf_query_result *result);
 
 static inline void gen_perf_query_mdapi_write_marker(void *data, uint32_t data_size,
-                                                     const struct gen_device_info *devinfo,
+                                                     const struct intel_device_info *devinfo,
                                                      uint64_t value)
 {
    switch (devinfo->ver) {
diff --git a/src/intel/perf/gen_perf_private.h b/src/intel/perf/gen_perf_private.h
index acca9a2b48a..363061326de 100644
--- a/src/intel/perf/gen_perf_private.h
+++ b/src/intel/perf/gen_perf_private.h
@@ -88,9 +88,9 @@ gen_perf_append_query_info(struct gen_perf_config *perf, int max_counters)
 }
 
 void gen_perf_register_mdapi_statistic_query(struct gen_perf_config *perf_cfg,
-                                             const struct gen_device_info *devinfo);
+                                             const struct intel_device_info *devinfo);
 void gen_perf_register_mdapi_oa_query(struct gen_perf_config *perf,
-                                      const struct gen_device_info *devinfo);
+                                      const struct intel_device_info *devinfo);
 
 
 #endif /* GEN_PERF_PRIVATE_H */
diff --git a/src/intel/perf/gen_perf_query.c b/src/intel/perf/gen_perf_query.c
index da685d755e4..56e583275ac 100644
--- a/src/intel/perf/gen_perf_query.c
+++ b/src/intel/perf/gen_perf_query.c
@@ -256,7 +256,7 @@ struct gen_perf_context {
    void * mem_ctx; /* ralloc context */
    void * ctx;  /* driver context (eg, brw_context) */
    void * bufmgr;
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
 
    uint32_t hw_ctx;
    int drm_fd;
@@ -573,7 +573,7 @@ gen_perf_init_context(struct gen_perf_context *perf_ctx,
                       void * mem_ctx, /* ralloc context */
                       void * ctx,  /* driver context (eg, brw_context) */
                       void * bufmgr,  /* eg brw_bufmgr */
-                      const struct gen_device_info *devinfo,
+                      const struct intel_device_info *devinfo,
                       uint32_t hw_ctx,
                       int drm_fd)
 {
@@ -759,7 +759,7 @@ gen_perf_begin_query(struct gen_perf_context *perf_ctx,
 
       /* If the OA counters aren't already on, enable them. */
       if (perf_ctx->oa_stream_fd == -1) {
-         const struct gen_device_info *devinfo = perf_ctx->devinfo;
+         const struct intel_device_info *devinfo = perf_ctx->devinfo;
 
          /* The period_exponent gives a sampling period as follows:
           *   sample_period = timestamp_period * 2^(period_exponent + 1)
@@ -1191,7 +1191,7 @@ discard_all_queries(struct gen_perf_context *perf_ctx)
 
 /* Looks for the validity bit of context ID (dword 2) of an OA report. */
 static bool
-oa_report_ctx_id_valid(const struct gen_device_info *devinfo,
+oa_report_ctx_id_valid(const struct intel_device_info *devinfo,
                        const uint32_t *report)
 {
    assert(devinfo->ver >= 8);
@@ -1222,7 +1222,7 @@ static void
 accumulate_oa_reports(struct gen_perf_context *perf_ctx,
                       struct gen_perf_query_object *query)
 {
-   const struct gen_device_info *devinfo = perf_ctx->devinfo;
+   const struct intel_device_info *devinfo = perf_ctx->devinfo;
    uint32_t *start;
    uint32_t *last;
    uint32_t *end;
@@ -1287,7 +1287,7 @@ accumulate_oa_reports(struct gen_perf_context *perf_ctx,
             /* Ignore reports that come before the start marker.
              * (Note: takes care to allow overflow of 32bit timestamps)
              */
-            if (gen_device_info_timebase_scale(devinfo,
+            if (intel_device_info_timebase_scale(devinfo,
                                                report[1] - start[1]) > 5000000000) {
                continue;
             }
@@ -1295,7 +1295,7 @@ accumulate_oa_reports(struct gen_perf_context *perf_ctx,
             /* Ignore reports that come after the end marker.
              * (Note: takes care to allow overflow of 32bit timestamps)
              */
-            if (gen_device_info_timebase_scale(devinfo,
+            if (intel_device_info_timebase_scale(devinfo,
                                                report[1] - end[1]) <= 5000000000) {
                goto end;
             }
@@ -1552,7 +1552,7 @@ gen_perf_get_query_data(struct gen_perf_context *perf_ctx,
       if (query->queryinfo->kind == GEN_PERF_QUERY_TYPE_OA) {
          written = get_oa_counter_data(perf_ctx, query, data_size, (uint8_t *)data);
       } else {
-         const struct gen_device_info *devinfo = perf_ctx->devinfo;
+         const struct intel_device_info *devinfo = perf_ctx->devinfo;
 
          written = gen_perf_query_result_write_mdapi((uint8_t *)data, data_size,
                                                      devinfo, query->queryinfo,
diff --git a/src/intel/perf/gen_perf_query.h b/src/intel/perf/gen_perf_query.h
index b029e01d03e..fcb835e2fc5 100644
--- a/src/intel/perf/gen_perf_query.h
+++ b/src/intel/perf/gen_perf_query.h
@@ -26,7 +26,7 @@
 
 #include <stdint.h>
 
-struct gen_device_info;
+struct intel_device_info;
 
 struct gen_perf_config;
 struct gen_perf_context;
@@ -39,7 +39,7 @@ void gen_perf_init_context(struct gen_perf_context *perf_ctx,
                            void * mem_ctx, /* ralloc context */
                            void * ctx,  /* driver context (eg, brw_context) */
                            void * bufmgr,  /* eg brw_bufmgr */
-                           const struct gen_device_info *devinfo,
+                           const struct intel_device_info *devinfo,
                            uint32_t hw_ctx,
                            int drm_fd);
 
diff --git a/src/intel/tools/aub_read.h b/src/intel/tools/aub_read.h
index 7ca17e46075..4b815d1f6af 100644
--- a/src/intel/tools/aub_read.h
+++ b/src/intel/tools/aub_read.h
@@ -63,7 +63,7 @@ struct aub_read {
    uint32_t blitter_elsp[4];
    int blitter_elsp_index;
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
 };
 
 int aub_read_command(struct aub_read *read, const void *data, uint32_t data_len);
diff --git a/src/intel/tools/aub_write.c b/src/intel/tools/aub_write.c
index d534917a84d..ad7111ecb17 100644
--- a/src/intel/tools/aub_write.c
+++ b/src/intel/tools/aub_write.c
@@ -461,7 +461,7 @@ engine_from_engine_class(enum drm_i915_gem_engine_class engine_class)
 }
 
 static void
-get_context_init(const struct gen_device_info *devinfo,
+get_context_init(const struct intel_device_info *devinfo,
                  const struct gen_context_parameters *params,
                  enum drm_i915_gem_engine_class engine_class,
                  uint32_t *data,
diff --git a/src/intel/tools/aub_write.h b/src/intel/tools/aub_write.h
index e20e6a22b43..b4852d7de1b 100644
--- a/src/intel/tools/aub_write.h
+++ b/src/intel/tools/aub_write.h
@@ -86,7 +86,7 @@ struct aub_file {
    FILE *verbose_log_file;
 
    uint16_t pci_id;
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
 
    int addr_bits;
 
@@ -115,7 +115,7 @@ static inline bool aub_use_execlists(const struct aub_file *aub)
 uint32_t aub_gtt_size(struct aub_file *aub);
 
 static inline void
-aub_write_reloc(const struct gen_device_info *devinfo, void *p, uint64_t v)
+aub_write_reloc(const struct intel_device_info *devinfo, void *p, uint64_t v)
 {
    if (devinfo->ver >= 8) {
       *(uint64_t *)p = intel_canonical_address(v);
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index dcf3d32b192..8fbd99902fd 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -59,7 +59,7 @@ static enum { COLOR_AUTO, COLOR_ALWAYS, COLOR_NEVER } option_color;
 
 uint16_t pci_id = 0;
 char *input_file = NULL, *xml_path = NULL;
-struct gen_device_info devinfo;
+struct intel_device_info devinfo;
 struct intel_batch_decode_ctx batch_ctx;
 struct aub_mem mem;
 
@@ -309,7 +309,7 @@ int main(int argc, char *argv[])
    while ((c = getopt_long(argc, argv, "", aubinator_opts, &i)) != -1) {
       switch (c) {
       case 'g': {
-         const int id = gen_device_name_to_pci_device_id(optarg);
+         const int id = intel_device_name_to_pci_device_id(optarg);
          if (id < 0) {
             fprintf(stderr, "can't parse gen: '%s', expected brw, g4x, ilk, "
                             "snb, ivb, hsw, byt, bdw, chv, skl, bxt, kbl, "
diff --git a/src/intel/tools/aubinator_error_decode.c b/src/intel/tools/aubinator_error_decode.c
index 7ba3680f4b0..f560227f052 100644
--- a/src/intel/tools/aubinator_error_decode.c
+++ b/src/intel/tools/aubinator_error_decode.c
@@ -165,7 +165,7 @@ register_name_from_ring(const struct ring_register_mapping *mapping,
 }
 
 static const char *
-instdone_register_for_ring(const struct gen_device_info *devinfo,
+instdone_register_for_ring(const struct intel_device_info *devinfo,
                            const char *ring_name)
 {
    enum drm_i915_gem_engine_class class;
@@ -206,7 +206,7 @@ instdone_register_for_ring(const struct gen_device_info *devinfo,
 }
 
 static void
-print_pgtbl_err(unsigned int reg, struct gen_device_info *devinfo)
+print_pgtbl_err(unsigned int reg, struct intel_device_info *devinfo)
 {
    if (reg & (1 << 26))
       printf("    Invalid Sampler Cache GTT entry\n");
@@ -237,7 +237,7 @@ print_pgtbl_err(unsigned int reg, struct gen_device_info *devinfo)
 }
 
 static void
-print_snb_fence(struct gen_device_info *devinfo, uint64_t fence)
+print_snb_fence(struct intel_device_info *devinfo, uint64_t fence)
 {
    printf("    %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
           fence & 1 ? "" : "in",
@@ -248,7 +248,7 @@ print_snb_fence(struct gen_device_info *devinfo, uint64_t fence)
 }
 
 static void
-print_i965_fence(struct gen_device_info *devinfo, uint64_t fence)
+print_i965_fence(struct intel_device_info *devinfo, uint64_t fence)
 {
    printf("    %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
           fence & 1 ? "" : "in",
@@ -259,7 +259,7 @@ print_i965_fence(struct gen_device_info *devinfo, uint64_t fence)
 }
 
 static void
-print_fence(struct gen_device_info *devinfo, uint64_t fence)
+print_fence(struct intel_device_info *devinfo, uint64_t fence)
 {
    if (devinfo->ver == 6 || devinfo->ver == 7) {
       return print_snb_fence(devinfo, fence);
@@ -269,7 +269,7 @@ print_fence(struct gen_device_info *devinfo, uint64_t fence)
 }
 
 static void
-print_fault_data(struct gen_device_info *devinfo, uint32_t data1, uint32_t data0)
+print_fault_data(struct intel_device_info *devinfo, uint32_t data1, uint32_t data0)
 {
    uint64_t address;
 
@@ -422,7 +422,7 @@ read_data_file(FILE *file)
    uint32_t ring_head = UINT32_MAX, ring_tail = UINT32_MAX;
    bool ring_wraps = false;
    char *ring_name = NULL;
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
 
    while (getline(&line, &line_size, file) > 0) {
       char *new_ring_name = NULL;
diff --git a/src/intel/tools/aubinator_viewer.cpp b/src/intel/tools/aubinator_viewer.cpp
index cb67ab6b760..1e331f4cc51 100644
--- a/src/intel/tools/aubinator_viewer.cpp
+++ b/src/intel/tools/aubinator_viewer.cpp
@@ -61,7 +61,7 @@ struct aub_file {
    uint32_t idx_reg_write;
 
    /* Device state */
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    struct intel_spec *spec;
 };
 
diff --git a/src/intel/tools/aubinator_viewer.h b/src/intel/tools/aubinator_viewer.h
index 6508b54c363..defc6c17712 100644
--- a/src/intel/tools/aubinator_viewer.h
+++ b/src/intel/tools/aubinator_viewer.h
@@ -68,7 +68,7 @@ struct aub_viewer_decode_ctx {
 
    void *user_data;
 
-   const struct gen_device_info *devinfo;
+   const struct intel_device_info *devinfo;
    struct intel_spec *spec;
    enum drm_i915_gem_engine_class engine;
 
@@ -89,7 +89,7 @@ struct aub_viewer_decode_ctx {
 void aub_viewer_decode_ctx_init(struct aub_viewer_decode_ctx *ctx,
                                 struct aub_viewer_cfg *cfg,
                                 struct aub_viewer_decode_cfg *decode_cfg,
-                                const struct gen_device_info *devinfo,
+                                const struct intel_device_info *devinfo,
                                 struct intel_spec *spec,
                                 struct intel_batch_decode_bo (*get_bo)(void *, bool, uint64_t),
                                 unsigned (*get_state_size)(void *, uint32_t),
diff --git a/src/intel/tools/aubinator_viewer_decoder.cpp b/src/intel/tools/aubinator_viewer_decoder.cpp
index ff11b68add4..3d9e7bd5fde 100644
--- a/src/intel/tools/aubinator_viewer_decoder.cpp
+++ b/src/intel/tools/aubinator_viewer_decoder.cpp
@@ -31,7 +31,7 @@ void
 aub_viewer_decode_ctx_init(struct aub_viewer_decode_ctx *ctx,
                            struct aub_viewer_cfg *cfg,
                            struct aub_viewer_decode_cfg *decode_cfg,
-                           const struct gen_device_info *devinfo,
+                           const struct intel_device_info *devinfo,
                            struct intel_spec *spec,
                            struct intel_batch_decode_bo (*get_bo)(void *, bool, uint64_t),
                            unsigned (*get_state_size)(void *, uint32_t),
diff --git a/src/intel/tools/i965_asm.c b/src/intel/tools/i965_asm.c
index 6fae53c2eec..6bf0d33debc 100644
--- a/src/intel/tools/i965_asm.c
+++ b/src/intel/tools/i965_asm.c
@@ -101,10 +101,10 @@ print_instruction(FILE *output, bool compact, const brw_inst *instruction)
    }
 }
 
-static struct gen_device_info *
+static struct intel_device_info *
 i965_disasm_init(uint16_t pci_id)
 {
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
 
    devinfo = malloc(sizeof *devinfo);
    if (devinfo == NULL)
@@ -215,7 +215,7 @@ int main(int argc, char **argv)
    int offset = 0, err;
    int start_offset = 0;
    struct disasm_info *disasm_info;
-   struct gen_device_info *devinfo = NULL;
+   struct intel_device_info *devinfo = NULL;
    int result = EXIT_FAILURE;
    list_inithead(&instr_labels);
    list_inithead(&target_labels);
@@ -232,7 +232,7 @@ int main(int argc, char **argv)
    while ((c = getopt_long(argc, argv, ":t:g:o:h", i965_asm_opts, NULL)) != -1) {
       switch (c) {
       case 'g': {
-         const int id = gen_device_name_to_pci_device_id(optarg);
+         const int id = intel_device_name_to_pci_device_id(optarg);
          if (id < 0) {
             fprintf(stderr, "can't parse gen: '%s', expected 3 letter "
                             "platform name\n", optarg);
@@ -305,7 +305,7 @@ int main(int argc, char **argv)
    devinfo = i965_disasm_init(pci_id);
    if (!devinfo) {
       fprintf(stderr, "Unable to allocate memory for "
-                      "gen_device_info struct instance.\n");
+                      "intel_device_info struct instance.\n");
       goto end;
    }
 
diff --git a/src/intel/tools/i965_disasm.c b/src/intel/tools/i965_disasm.c
index 1f0e3fba566..80d7c1162fe 100644
--- a/src/intel/tools/i965_disasm.c
+++ b/src/intel/tools/i965_disasm.c
@@ -113,10 +113,10 @@ i965_disasm_read_binary(FILE *fp, size_t *end)
    return assembly;
 }
 
-static struct gen_device_info *
+static struct intel_device_info *
 i965_disasm_init(uint16_t pci_id)
 {
-   struct gen_device_info *devinfo;
+   struct intel_device_info *devinfo;
 
    devinfo = malloc(sizeof *devinfo);
    if (devinfo == NULL)
@@ -154,7 +154,7 @@ int main(int argc, char *argv[])
    size_t start = 0, end = 0;
    uint16_t pci_id = 0;
    int c;
-   struct gen_device_info *devinfo = NULL;
+   struct intel_device_info *devinfo = NULL;
    int result = EXIT_FAILURE;
 
    bool help = false;
@@ -169,7 +169,7 @@ int main(int argc, char *argv[])
    while ((c = getopt_long(argc, argv, ":i:t:g:h", i965_disasm_opts, NULL)) != -1) {
       switch (c) {
       case 'g': {
-         const int id = gen_device_name_to_pci_device_id(optarg);
+         const int id = intel_device_name_to_pci_device_id(optarg);
          if (id < 0) {
             fprintf(stderr, "can't parse gen: '%s', expected 3 letter "
                             "platform name\n", optarg);
@@ -224,7 +224,7 @@ int main(int argc, char *argv[])
    devinfo = i965_disasm_init(pci_id);
    if (!devinfo) {
       fprintf(stderr, "Unable to allocate memory for "
-                      "gen_device_info struct instance.\n");
+                      "intel_device_info struct instance.\n");
       goto end;
    }
 
diff --git a/src/intel/tools/intel_dump_gpu.c b/src/intel/tools/intel_dump_gpu.c
index eaa3ba757d8..fd88f691bb1 100644
--- a/src/intel/tools/intel_dump_gpu.c
+++ b/src/intel/tools/intel_dump_gpu.c
@@ -112,7 +112,7 @@ align_u32(uint32_t v, uint32_t a)
    return (v + a - 1) & ~(a - 1);
 }
 
-static struct gen_device_info devinfo = {0};
+static struct intel_device_info devinfo = {0};
 static int device = 0;
 static struct aub_file aub_file;
 
@@ -455,7 +455,7 @@ maybe_init(int fd)
          device_override = true;
       } else if (!strcmp(key, "platform")) {
          fail_if(device != 0, "Device/Platform override specified multiple times.\n");
-         device = gen_device_name_to_pci_device_id(value);
+         device = intel_device_name_to_pci_device_id(value);
          fail_if(device == -1, "Unknown platform '%s'\n", value);
          device_override = true;
       } else if (!strcmp(key, "file")) {
diff --git a/src/intel/tools/intel_noop_drm_shim.c b/src/intel/tools/intel_noop_drm_shim.c
index f45ec1bffbd..1d8d282d202 100644
--- a/src/intel/tools/intel_noop_drm_shim.c
+++ b/src/intel/tools/intel_noop_drm_shim.c
@@ -40,7 +40,7 @@
 #include "util/vma.h"
 
 struct i915_device {
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    uint32_t device_id;
 };
 
@@ -367,7 +367,7 @@ drm_shim_driver_init(void)
    const char *user_platform = getenv("INTEL_STUB_GPU_PLATFORM");
 
    /* Use SKL if nothing is specified. */
-   i915.device_id = gen_device_name_to_pci_device_id(user_platform ?: "skl");
+   i915.device_id = intel_device_name_to_pci_device_id(user_platform ?: "skl");
    if (!gen_get_device_info_from_pci_id(i915.device_id, &i915.devinfo))
       return;
 
diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c
index a71ea78b7a8..f6fbc92f8cb 100644
--- a/src/intel/vulkan/anv_allocator.c
+++ b/src/intel/vulkan/anv_allocator.c
@@ -1437,7 +1437,7 @@ anv_scratch_pool_alloc(struct anv_device *device, struct anv_scratch_pool *pool,
    if (bo != NULL)
       return bo;
 
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
 
    unsigned subslices = MAX2(device->physical->subslice_total, 1);
 
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 9add43fe947..9a988722150 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -996,7 +996,7 @@ anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer)
           * prefetch.
           */
          if (cmd_buffer->batch_bos.next == cmd_buffer->batch_bos.prev) {
-            const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+            const struct intel_device_info *devinfo = &cmd_buffer->device->info;
             /* Careful to have everything in signed integer. */
             int32_t prefetch_len = devinfo->cs_prefetch_size;
             int32_t batch_len =
diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index ac263d78f95..da3c90fdfa5 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -392,7 +392,7 @@ VkResult anv_ResetCommandBuffer(
 void
 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
 {
-   const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    anv_genX(devinfo, cmd_buffer_emit_state_base_address)(cmd_buffer);
 }
 
@@ -405,7 +405,7 @@ anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer *cmd_buffer,
                                   uint32_t base_layer,
                                   uint32_t layer_count)
 {
-   const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    anv_genX(devinfo, cmd_buffer_mark_image_written)(cmd_buffer, image,
                                                     aspect, aux_usage,
                                                     level, base_layer,
@@ -415,7 +415,7 @@ anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer *cmd_buffer,
 void
 anv_cmd_emit_conditional_render_predicate(struct anv_cmd_buffer *cmd_buffer)
 {
-   const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    anv_genX(devinfo, cmd_emit_conditional_render_predicate)(cmd_buffer);
 }
 
@@ -1045,7 +1045,7 @@ anv_cmd_buffer_gfx_push_constants(struct anv_cmd_buffer *cmd_buffer)
 struct anv_state
 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
 {
-   const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    struct anv_push_constants *data =
       &cmd_buffer->state.compute.base.push_constants;
    struct anv_compute_pipeline *pipeline = cmd_buffer->state.compute.pipeline;
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index a3e0c56c598..3006c296ddd 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -662,7 +662,7 @@ anv_physical_device_try_create(struct anv_instance *instance,
                         "Unable to open device %s: %m", path);
    }
 
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
    if (!gen_get_device_info_from_fd(fd, &devinfo)) {
       result = vk_error(VK_ERROR_INCOMPATIBLE_DRIVER);
       goto fail_fd;
@@ -831,8 +831,8 @@ anv_physical_device_try_create(struct anv_instance *instance,
       anv_gem_get_param(fd, I915_PARAM_MMAP_GTT_VERSION) >= 4;
 
    /* GENs prior to 8 do not support EU/Subslice info */
-   device->subslice_total = gen_device_info_subslice_total(&device->info);
-   device->eu_total = gen_device_info_eu_total(&device->info);
+   device->subslice_total = intel_device_info_subslice_total(&device->info);
+   device->eu_total = intel_device_info_eu_total(&device->info);
 
    if (device->info.is_cherryview) {
       /* Logical CS threads = EUs per subslice * num threads per EU */
@@ -1765,7 +1765,7 @@ void anv_GetPhysicalDeviceProperties(
     VkPhysicalDeviceProperties*                 pProperties)
 {
    ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice);
-   const struct gen_device_info *devinfo = &pdevice->info;
+   const struct intel_device_info *devinfo = &pdevice->info;
 
    /* See assertions made when programming the buffer surface state. */
    const uint32_t max_raw_buffer_sz = devinfo->ver >= 7 ?
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 85ab379c3f5..ce6060b9f3f 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -468,7 +468,7 @@ anv_format_has_npot_plane(const struct anv_format *anv_format) {
  * _cannot_ check for compatibility).
  */
 struct anv_format_plane
-anv_get_format_plane(const struct gen_device_info *devinfo, VkFormat vk_format,
+anv_get_format_plane(const struct intel_device_info *devinfo, VkFormat vk_format,
                      VkImageAspectFlagBits aspect, VkImageTiling tiling)
 {
    const struct anv_format *format = anv_get_format(vk_format);
@@ -542,7 +542,7 @@ anv_get_format_plane(const struct gen_device_info *devinfo, VkFormat vk_format,
 // Format capabilities
 
 VkFormatFeatureFlags
-anv_get_image_format_features(const struct gen_device_info *devinfo,
+anv_get_image_format_features(const struct intel_device_info *devinfo,
                               VkFormat vk_format,
                               const struct anv_format *anv_format,
                               VkImageTiling vk_tiling,
@@ -779,7 +779,7 @@ anv_get_image_format_features(const struct gen_device_info *devinfo,
 }
 
 static VkFormatFeatureFlags
-get_buffer_format_features(const struct gen_device_info *devinfo,
+get_buffer_format_features(const struct intel_device_info *devinfo,
                            VkFormat vk_format,
                            const struct anv_format *anv_format)
 {
@@ -823,7 +823,7 @@ get_drm_format_modifier_properties_list(const struct anv_physical_device *physic
                                         VkFormat vk_format,
                                         VkDrmFormatModifierPropertiesListEXT *list)
 {
-   const struct gen_device_info *devinfo = &physical_device->info;
+   const struct intel_device_info *devinfo = &physical_device->info;
    const struct anv_format *anv_format = anv_get_format(vk_format);
 
    VK_OUTARRAY_MAKE(out, list->pDrmFormatModifierProperties,
@@ -857,7 +857,7 @@ void anv_GetPhysicalDeviceFormatProperties(
     VkFormatProperties*                         pFormatProperties)
 {
    ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice);
-   const struct gen_device_info *devinfo = &physical_device->info;
+   const struct intel_device_info *devinfo = &physical_device->info;
    const struct anv_format *anv_format = anv_get_format(vk_format);
 
    *pFormatProperties = (VkFormatProperties) {
@@ -908,7 +908,7 @@ anv_get_image_format_properties(
    uint32_t maxArraySize;
    VkSampleCountFlags sampleCounts;
    struct anv_instance *instance = physical_device->instance;
-   const struct gen_device_info *devinfo = &physical_device->info;
+   const struct intel_device_info *devinfo = &physical_device->info;
    const struct anv_format *format = anv_get_format(info->format);
    const struct isl_drm_modifier_info *isl_mod_info = NULL;
    const VkImageFormatListCreateInfo *format_list_info =
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 86e164ffd38..9e26ba03cf7 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -257,7 +257,7 @@ choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
 }
 
 static isl_tiling_flags_t
-choose_isl_tiling_flags(const struct gen_device_info *devinfo,
+choose_isl_tiling_flags(const struct intel_device_info *devinfo,
                         const struct anv_image_create_info *anv_info,
                         const struct isl_drm_modifier_info *isl_mod_info,
                         bool legacy_scanout)
@@ -332,7 +332,7 @@ add_surface(struct anv_device *device,
  * @see anv_image::planes[]::shadow_surface
  */
 static bool
-anv_image_plane_needs_shadow_surface(const struct gen_device_info *devinfo,
+anv_image_plane_needs_shadow_surface(const struct intel_device_info *devinfo,
                                      struct anv_format_plane plane_format,
                                      VkImageTiling vk_tiling,
                                      VkImageUsageFlags vk_plane_usage,
@@ -367,7 +367,7 @@ anv_image_plane_needs_shadow_surface(const struct gen_device_info *devinfo,
 }
 
 bool
-anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
+anv_formats_ccs_e_compatible(const struct intel_device_info *devinfo,
                              VkImageCreateFlags create_flags,
                              VkFormat vk_format,
                              VkImageTiling vk_tiling,
@@ -1023,7 +1023,7 @@ add_all_surfaces_implicit_layout(
    isl_tiling_flags_t isl_tiling_flags,
    isl_surf_usage_flags_t isl_extra_usage_flags)
 {
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
    VkResult result;
 
    u_foreach_bit(b, image->aspects) {
@@ -1085,7 +1085,7 @@ add_all_surfaces_explicit_layout(
    isl_tiling_flags_t isl_tiling_flags,
    isl_surf_usage_flags_t isl_extra_usage_flags)
 {
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
    const uint32_t mod_plane_count = drm_info->drmFormatModifierPlaneCount;
    const struct isl_drm_modifier_info *isl_mod_info =
       isl_drm_modifier_get_info(drm_info->drmFormatModifier);
@@ -2078,7 +2078,7 @@ vk_image_layout_is_read_only(VkImageLayout layout,
  * @return The primary buffer that should be used for the given layout.
  */
 enum isl_aux_state ATTRIBUTE_PURE
-anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
+anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
                         const struct anv_image * const image,
                         const VkImageAspectFlagBits aspect,
                         const VkImageLayout layout)
@@ -2264,7 +2264,7 @@ anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
  * @return The primary buffer that should be used for the given layout.
  */
 enum isl_aux_usage ATTRIBUTE_PURE
-anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
+anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
                         const struct anv_image * const image,
                         const VkImageAspectFlagBits aspect,
                         const VkImageUsageFlagBits usage,
@@ -2331,7 +2331,7 @@ anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
  * @param layout The current layout of the image aspect(s).
  */
 enum anv_fast_clear_type ATTRIBUTE_PURE
-anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
+anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
                               const struct anv_image * const image,
                               const VkImageAspectFlagBits aspect,
                               const VkImageLayout layout)
diff --git a/src/intel/vulkan/anv_nir_compute_push_layout.c b/src/intel/vulkan/anv_nir_compute_push_layout.c
index 3222a77431a..b98297c30f5 100644
--- a/src/intel/vulkan/anv_nir_compute_push_layout.c
+++ b/src/intel/vulkan/anv_nir_compute_push_layout.c
@@ -35,7 +35,7 @@ anv_nir_compute_push_layout(const struct anv_physical_device *pdevice,
                             void *mem_ctx)
 {
    const struct brw_compiler *compiler = pdevice->compiler;
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    memset(map->push_ranges, 0, sizeof(map->push_ranges));
 
    bool has_const_ubo = false;
diff --git a/src/intel/vulkan/anv_perf.c b/src/intel/vulkan/anv_perf.c
index 1c21faf9101..7da9796d996 100644
--- a/src/intel/vulkan/anv_perf.c
+++ b/src/intel/vulkan/anv_perf.c
@@ -36,7 +36,7 @@
 void
 anv_physical_device_init_perf(struct anv_physical_device *device, int fd)
 {
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
 
    device->perf = NULL;
 
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 654611f8a12..a820691d5c7 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -362,7 +362,7 @@ static const uint32_t vk_to_gen_primitive_type[] = {
 };
 
 static void
-populate_sampler_prog_key(const struct gen_device_info *devinfo,
+populate_sampler_prog_key(const struct intel_device_info *devinfo,
                           struct brw_sampler_prog_key_data *key)
 {
    /* Almost all multisampled textures are compressed.  The only time when we
@@ -392,7 +392,7 @@ populate_sampler_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_base_prog_key(const struct gen_device_info *devinfo,
+populate_base_prog_key(const struct intel_device_info *devinfo,
                        VkPipelineShaderStageCreateFlags flags,
                        bool robust_buffer_acccess,
                        struct brw_base_prog_key *key)
@@ -408,7 +408,7 @@ populate_base_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_vs_prog_key(const struct gen_device_info *devinfo,
+populate_vs_prog_key(const struct intel_device_info *devinfo,
                      VkPipelineShaderStageCreateFlags flags,
                      bool robust_buffer_acccess,
                      struct brw_vs_prog_key *key)
@@ -423,7 +423,7 @@ populate_vs_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_tcs_prog_key(const struct gen_device_info *devinfo,
+populate_tcs_prog_key(const struct intel_device_info *devinfo,
                       VkPipelineShaderStageCreateFlags flags,
                       bool robust_buffer_acccess,
                       unsigned input_vertices,
@@ -437,7 +437,7 @@ populate_tcs_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_tes_prog_key(const struct gen_device_info *devinfo,
+populate_tes_prog_key(const struct intel_device_info *devinfo,
                       VkPipelineShaderStageCreateFlags flags,
                       bool robust_buffer_acccess,
                       struct brw_tes_prog_key *key)
@@ -448,7 +448,7 @@ populate_tes_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_gs_prog_key(const struct gen_device_info *devinfo,
+populate_gs_prog_key(const struct intel_device_info *devinfo,
                      VkPipelineShaderStageCreateFlags flags,
                      bool robust_buffer_acccess,
                      struct brw_gs_prog_key *key)
@@ -459,7 +459,7 @@ populate_gs_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_wm_prog_key(const struct gen_device_info *devinfo,
+populate_wm_prog_key(const struct intel_device_info *devinfo,
                      VkPipelineShaderStageCreateFlags flags,
                      bool robust_buffer_acccess,
                      const struct anv_subpass *subpass,
@@ -516,7 +516,7 @@ populate_wm_prog_key(const struct gen_device_info *devinfo,
 }
 
 static void
-populate_cs_prog_key(const struct gen_device_info *devinfo,
+populate_cs_prog_key(const struct intel_device_info *devinfo,
                      VkPipelineShaderStageCreateFlags flags,
                      bool robust_buffer_acccess,
                      const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT *rss_info,
@@ -1275,7 +1275,7 @@ anv_pipeline_compile_graphics(struct anv_graphics_pipeline *pipeline,
                                stages[stage].spec_info,
                                stages[stage].shader_sha1);
 
-      const struct gen_device_info *devinfo = &pipeline->base.device->info;
+      const struct intel_device_info *devinfo = &pipeline->base.device->info;
       switch (stage) {
       case MESA_SHADER_VERTEX:
          populate_vs_prog_key(devinfo, sinfo->flags,
@@ -2153,7 +2153,7 @@ anv_pipeline_validate_create_info(const VkGraphicsPipelineCreateInfo *info)
 void
 anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm)
 {
-   const struct gen_device_info *devinfo = &pipeline->device->info;
+   const struct intel_device_info *devinfo = &pipeline->device->info;
 
    const struct intel_l3_weights w =
       intel_get_default_l3_weights(devinfo, true, needs_slm);
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 1a6dff4fe83..b1f740c8885 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -891,7 +891,7 @@ struct anv_physical_device {
        uint8_t                                  device;
        uint8_t                                  function;
     }                                           pci_info;
-    struct gen_device_info                      info;
+    struct intel_device_info                      info;
     /** Amount of "GPU memory" we want to advertise
      *
      * Clearly, this value is bogus since Intel is a UMA architecture.  On
@@ -1182,7 +1182,7 @@ struct anv_device {
 
     struct anv_physical_device *                physical;
     bool                                        no_hw;
-    struct gen_device_info                      info;
+    struct intel_device_info                      info;
     struct isl_device                           isl_dev;
     int                                         context_id;
     int                                         fd;
@@ -3584,17 +3584,17 @@ anv_get_format_planes(VkFormat vk_format)
 }
 
 struct anv_format_plane
-anv_get_format_plane(const struct gen_device_info *devinfo, VkFormat vk_format,
+anv_get_format_plane(const struct intel_device_info *devinfo, VkFormat vk_format,
                      VkImageAspectFlagBits aspect, VkImageTiling tiling);
 
 static inline enum isl_format
-anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format,
+anv_get_isl_format(const struct intel_device_info *devinfo, VkFormat vk_format,
                    VkImageAspectFlags aspect, VkImageTiling tiling)
 {
    return anv_get_format_plane(devinfo, vk_format, aspect, tiling).isl_format;
 }
 
-bool anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
+bool anv_formats_ccs_e_compatible(const struct intel_device_info *devinfo,
                                   VkImageCreateFlags create_flags,
                                   VkFormat vk_format,
                                   VkImageTiling vk_tiling,
@@ -3911,7 +3911,7 @@ anv_image_get_compression_state_addr(const struct anv_device *device,
 
 /* Returns true if a HiZ-enabled depth buffer can be sampled from. */
 static inline bool
-anv_can_sample_with_hiz(const struct gen_device_info * const devinfo,
+anv_can_sample_with_hiz(const struct intel_device_info * const devinfo,
                         const struct anv_image *image)
 {
    if (!(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
@@ -4026,20 +4026,20 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer,
                          uint32_t base_layer, uint32_t layer_count);
 
 enum isl_aux_state ATTRIBUTE_PURE
-anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
+anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
                         const struct anv_image *image,
                         const VkImageAspectFlagBits aspect,
                         const VkImageLayout layout);
 
 enum isl_aux_usage ATTRIBUTE_PURE
-anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
+anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
                         const struct anv_image *image,
                         const VkImageAspectFlagBits aspect,
                         const VkImageUsageFlagBits usage,
                         const VkImageLayout layout);
 
 enum anv_fast_clear_type ATTRIBUTE_PURE
-anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
+anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
                               const struct anv_image * const image,
                               const VkImageAspectFlagBits aspect,
                               const VkImageLayout layout);
@@ -4199,7 +4199,7 @@ anv_sanitize_image_offset(const VkImageType imageType,
 }
 
 VkFormatFeatureFlags
-anv_get_image_format_features(const struct gen_device_info *devinfo,
+anv_get_image_format_features(const struct intel_device_info *devinfo,
                               VkFormat vk_format,
                               const struct anv_format *anv_format,
                               VkImageTiling vk_tiling,
@@ -4423,7 +4423,7 @@ anv_device_entrypoint_is_enabled(int index, uint32_t core_version,
                                  const struct vk_device_extension_table *device);
 
 const struct vk_device_dispatch_table *
-anv_get_device_dispatch_table(const struct gen_device_info *devinfo);
+anv_get_device_dispatch_table(const struct intel_device_info *devinfo);
 
 static inline uint32_t
 anv_get_subpass_id(const struct anv_cmd_state * const cmd_state)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 11cde846a21..73a731a36f8 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -52,7 +52,7 @@ void
 genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
 {
    struct anv_device *device = cmd_buffer->device;
-   UNUSED const struct gen_device_info *devinfo = &device->info;
+   UNUSED const struct intel_device_info *devinfo = &device->info;
    uint32_t mocs = isl_mocs(&device->isl_dev, 0, false);
 
    /* If we are emitting a new state base address we probably need to re-emit
@@ -1111,7 +1111,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
                         bool will_full_fast_clear)
 {
    struct anv_device *device = cmd_buffer->device;
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
    /* Validate the inputs. */
    assert(cmd_buffer);
    assert(image && image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
@@ -2039,7 +2039,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
 void
 genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
 {
-   UNUSED const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   UNUSED const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    enum anv_pipe_bits bits = cmd_buffer->state.pending_pipe_bits;
 
    if (unlikely(cmd_buffer->device->physical->always_flush_cache))
@@ -4800,7 +4800,7 @@ static void
 genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer,
                             uint32_t pipeline)
 {
-   UNUSED const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   UNUSED const struct intel_device_info *devinfo = &cmd_buffer->device->info;
 
    if (cmd_buffer->state.current_pipeline == pipeline)
       return;
@@ -5091,7 +5091,7 @@ genX(cmd_buffer_emit_hashing_mode)(struct anv_cmd_buffer *cmd_buffer,
                                    unsigned scale)
 {
 #if GFX_VER == 9
-   const struct gen_device_info *devinfo = &cmd_buffer->device->info;
+   const struct intel_device_info *devinfo = &cmd_buffer->device->info;
    const unsigned slice_hashing[] = {
       /* Because all Gfx9 platforms with more than one slice require
        * three-way subslice hashing, a single "normal" 16x16 slice hashing
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 8e3aeef9ff2..be3539fe722 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -268,7 +268,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
                      const unsigned entry_size[4],
                      enum intel_urb_deref_block_size *deref_block_size)
 {
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
 
    unsigned entries[4];
    unsigned start[4];
@@ -1595,7 +1595,7 @@ get_scratch_space(const struct anv_shader_bin *bin)
 static void
 emit_3dstate_vs(struct anv_graphics_pipeline *pipeline)
 {
-   const struct gen_device_info *devinfo = &pipeline->base.device->info;
+   const struct intel_device_info *devinfo = &pipeline->base.device->info;
    const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);
    const struct anv_shader_bin *vs_bin =
       pipeline->shaders[MESA_SHADER_VERTEX];
@@ -1679,7 +1679,7 @@ emit_3dstate_hs_te_ds(struct anv_graphics_pipeline *pipeline,
       return;
    }
 
-   const struct gen_device_info *devinfo = &pipeline->base.device->info;
+   const struct intel_device_info *devinfo = &pipeline->base.device->info;
    const struct anv_shader_bin *tcs_bin =
       pipeline->shaders[MESA_SHADER_TESS_CTRL];
    const struct anv_shader_bin *tes_bin =
@@ -1809,7 +1809,7 @@ emit_3dstate_hs_te_ds(struct anv_graphics_pipeline *pipeline,
 static void
 emit_3dstate_gs(struct anv_graphics_pipeline *pipeline)
 {
-   const struct gen_device_info *devinfo = &pipeline->base.device->info;
+   const struct intel_device_info *devinfo = &pipeline->base.device->info;
    const struct anv_shader_bin *gs_bin =
       pipeline->shaders[MESA_SHADER_GEOMETRY];
 
@@ -1995,7 +1995,7 @@ emit_3dstate_ps(struct anv_graphics_pipeline *pipeline,
                 const VkPipelineColorBlendStateCreateInfo *blend,
                 const VkPipelineMultisampleStateCreateInfo *multisample)
 {
-   UNUSED const struct gen_device_info *devinfo = &pipeline->base.device->info;
+   UNUSED const struct intel_device_info *devinfo = &pipeline->base.device->info;
    const struct anv_shader_bin *fs_bin =
       pipeline->shaders[MESA_SHADER_FRAGMENT];
 
@@ -2377,7 +2377,7 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
    const uint32_t subslices = MAX2(device->physical->subslice_total, 1);
 
    const UNUSED struct anv_shader_bin *cs_bin = pipeline->cs;
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
 
    anv_batch_emit(&pipeline->base.batch, GENX(CFE_STATE), cfe) {
       cfe.MaximumNumberofThreads =
@@ -2408,7 +2408,7 @@ emit_compute_state(struct anv_compute_pipeline *pipeline,
    const uint32_t subslices = MAX2(device->physical->subslice_total, 1);
 
    const struct anv_shader_bin *cs_bin = pipeline->cs;
-   const struct gen_device_info *devinfo = &device->info;
+   const struct intel_device_info *devinfo = &device->info;
 
    anv_batch_emit(&pipeline->base.batch, GENX(MEDIA_VFE_STATE), vfe) {
 #if GFX_VER > 7
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index 25647c82a2b..43284d15206 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -341,7 +341,7 @@ genX(emit_l3_config)(struct anv_batch *batch,
                      const struct anv_device *device,
                      const struct intel_l3_config *cfg)
 {
-   UNUSED const struct gen_device_info *devinfo = &device->info;
+   UNUSED const struct intel_device_info *devinfo = &device->info;
 
 #if GFX_VER >= 8
 
diff --git a/src/mesa/drivers/dri/i965/brw_batch.c b/src/mesa/drivers/dri/i965/brw_batch.c
index 92d6ec0f93e..c2d91a5c2a3 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.c
+++ b/src/mesa/drivers/dri/i965/brw_batch.c
@@ -128,7 +128,7 @@ brw_batch_init(struct brw_context *brw)
 {
    struct brw_screen *screen = brw->screen;
    struct brw_batch *batch = &brw->batch;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    if (INTEL_DEBUG & DEBUG_BATCH) {
       /* The shadow doesn't get relocs written so state decode fails. */
@@ -604,7 +604,7 @@ brw_new_batch(struct brw_context *brw)
 static void
 brw_finish_batch(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw->batch.no_wrap = true;
 
@@ -1095,7 +1095,7 @@ load_sized_register_mem(struct brw_context *brw,
                         uint32_t offset,
                         int size)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    int i;
 
    /* MI_LOAD_REGISTER_MEM only exists on Gfx7+. */
@@ -1145,7 +1145,7 @@ void
 brw_store_register_mem32(struct brw_context *brw,
                          struct brw_bo *bo, uint32_t reg, uint32_t offset)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 6);
 
@@ -1171,7 +1171,7 @@ void
 brw_store_register_mem64(struct brw_context *brw,
                          struct brw_bo *bo, uint32_t reg, uint32_t offset)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 6);
 
@@ -1271,7 +1271,7 @@ void
 brw_store_data_imm32(struct brw_context *brw, struct brw_bo *bo,
                      uint32_t offset, uint32_t imm)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 6);
 
@@ -1294,7 +1294,7 @@ void
 brw_store_data_imm64(struct brw_context *brw, struct brw_bo *bo,
                      uint32_t offset, uint64_t imm)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 6);
 
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index e865464a974..8ed56228a31 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -56,7 +56,7 @@ brw_upload_binding_table(struct brw_context *brw,
                          const struct brw_stage_prog_data *prog_data,
                          struct brw_stage_state *stage_state)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (prog_data->binding_table.size_bytes == 0) {
       /* There are no surfaces; skip making the binding table altogether. */
diff --git a/src/mesa/drivers/dri/i965/brw_blit.c b/src/mesa/drivers/dri/i965/brw_blit.c
index 167b704587b..ff689941603 100644
--- a/src/mesa/drivers/dri/i965/brw_blit.c
+++ b/src/mesa/drivers/dri/i965/brw_blit.c
@@ -83,7 +83,7 @@ set_blitter_tiling(struct brw_context *brw,
                    bool dst_y_tiled, bool src_y_tiled,
                    uint32_t *__map)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const unsigned n_dwords = devinfo->ver >= 8 ? 5 : 4;
    assert(devinfo->ver >= 6);
 
@@ -197,7 +197,7 @@ static bool
 alignment_valid(struct brw_context *brw, unsigned offset,
                 enum isl_tiling tiling)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Tiled buffers must be page-aligned (4K). */
    if (tiling != ISL_TILING_LINEAR)
@@ -256,7 +256,7 @@ emit_copy_blit(struct brw_context *brw,
                GLshort w, GLshort h,
                enum gl_logicop_mode logic_op)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    GLuint CMD, BR13;
    int dst_y2 = dst_y + h;
    int dst_x2 = dst_x + w;
@@ -628,7 +628,7 @@ brw_emit_immediate_color_expand_blit(struct brw_context *brw,
                                      GLshort w, GLshort h,
                                      enum gl_logicop_mode logic_op)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    int dwords = ALIGN(src_size, 8) / 4;
    uint32_t opcode, br13, blit_cmd;
 
@@ -709,7 +709,7 @@ brw_miptree_set_alpha_to_one(struct brw_context *brw,
                              struct brw_mipmap_tree *mt,
                              int x, int y, int width, int height)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t BR13, CMD;
    int pitch, cpp;
 
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index e839cfda1ae..4e94d86b779 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -70,7 +70,7 @@ brw_blorp_upload_shader(struct blorp_batch *batch, uint32_t stage,
 void
 brw_blorp_init(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    blorp_init(&brw->blorp, brw, &brw->isl_dev);
 
@@ -124,7 +124,7 @@ blorp_surf_for_miptree(struct brw_context *brw,
                        unsigned *level,
                        unsigned start_layer, unsigned num_layers)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY) {
       const unsigned num_samples = mt->surf.samples;
@@ -284,7 +284,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
                         GLenum gl_filter, bool mirror_x, bool mirror_y,
                         bool decode_srgb, bool encode_srgb)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    DBG("%s from %dx %s mt %p %d %d (%f,%f) (%f,%f) "
        "to %dx %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n",
@@ -601,7 +601,7 @@ try_blorp_blit(struct brw_context *brw,
                GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1,
                GLenum filter, GLbitfield buffer_bit)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    /* Sync up the state of window system buffers.  We need to do this before
@@ -1564,7 +1564,7 @@ brw_hiz_exec(struct brw_context *brw, struct brw_mipmap_tree *mt,
 {
    assert(brw_miptree_level_has_hiz(mt, level));
    assert(op != ISL_AUX_OP_NONE);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const char *opname = NULL;
 
    switch (op) {
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 1c72872835b..4da6f116fb6 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1838,7 +1838,7 @@ brw_bufmgr_ref(struct brw_bufmgr *bufmgr)
  * \param fd File descriptor of the opened DRM device.
  */
 static struct brw_bufmgr *
-brw_bufmgr_create(struct gen_device_info *devinfo, int fd, bool bo_reuse)
+brw_bufmgr_create(struct intel_device_info *devinfo, int fd, bool bo_reuse)
 {
    struct brw_bufmgr *bufmgr;
 
@@ -1924,7 +1924,7 @@ brw_bufmgr_create(struct gen_device_info *devinfo, int fd, bool bo_reuse)
 }
 
 struct brw_bufmgr *
-brw_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd, bool bo_reuse)
+brw_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd, bool bo_reuse)
 {
    struct stat st;
 
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index 9d9d5f0d5e2..55bde375799 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -47,7 +47,7 @@
 extern "C" {
 #endif
 
-struct gen_device_info;
+struct intel_device_info;
 struct brw_context;
 
 /**
@@ -351,7 +351,7 @@ int brw_bo_busy(struct brw_bo *bo);
 int brw_bo_madvise(struct brw_bo *bo, int madv);
 
 /* drm_bacon_bufmgr_gem.c */
-struct brw_bufmgr *brw_bufmgr_get_for_fd(struct gen_device_info *devinfo, int fd,
+struct brw_bufmgr *brw_bufmgr_get_for_fd(struct intel_device_info *devinfo, int fd,
                                          bool bo_reuse);
 
 struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index a10ea17cea4..bef2d86c08f 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -105,7 +105,7 @@ brw_fast_clear_depth(struct gl_context *ctx)
       brw_get_renderbuffer(fb, BUFFER_DEPTH);
    struct brw_mipmap_tree *mt = depth_irb->mt;
    struct gl_renderbuffer_attachment *depth_att = &fb->Attachment[BUFFER_DEPTH];
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
       return false;
@@ -242,7 +242,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
 {
    struct brw_context *brw = brw_context(ctx);
    struct gl_framebuffer *fb = ctx->DrawBuffer;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    bool partial_clear = ctx->Scissor.EnableFlags && !noop_scissor(fb);
 
    if (!_mesa_check_conditional_render(ctx))
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index 7cadad06f52..fa97f9a4a7e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -69,7 +69,7 @@ compile_clip_prog(struct brw_context *brw, struct brw_clip_prog_key *key)
 void
 brw_upload_clip_prog(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    struct brw_clip_prog_key key;
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index e80b03c00ce..7cb06ea28b5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -327,7 +327,7 @@ static void
 brw_init_driver_functions(struct brw_context *brw,
                           struct dd_function_table *functions)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    _mesa_init_driver_functions(functions);
 
@@ -417,7 +417,7 @@ brw_init_driver_functions(struct brw_context *brw,
 static void
 brw_initialize_spirv_supported_capabilities(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    /* The following SPIR-V capabilities are only supported on gfx7+. In theory
@@ -441,7 +441,7 @@ brw_initialize_spirv_supported_capabilities(struct brw_context *brw)
 static void
 brw_initialize_context_constants(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    const struct brw_compiler *compiler = brw->screen->compiler;
 
@@ -804,7 +804,7 @@ brw_initialize_cs_context_constants(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->ctx;
    const struct brw_screen *screen = brw->screen;
-   struct gen_device_info *devinfo = &brw->screen->devinfo;
+   struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* FINISHME: Do this for all platforms that the kernel supports */
    if (devinfo->is_cherryview &&
@@ -854,7 +854,7 @@ brw_initialize_cs_context_constants(struct brw_context *brw)
 static void
 brw_process_driconf_options(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    const driOptionCache *const options = &brw->screen->optionCache;
 
@@ -938,7 +938,7 @@ brw_create_context(gl_api api,
 {
    struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
    struct brw_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    struct dd_function_table functions;
 
    /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
@@ -1392,7 +1392,7 @@ void
 brw_resolve_for_dri2_flush(struct brw_context *brw,
                            __DRIdrawable *drawable)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver < 6) {
       /* MSAA and fast color clear are not supported, so don't waste time
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 6a26ecc0f4d..7ad5b6012cd 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1038,7 +1038,7 @@ struct brw_context
       GLuint cs_start;
       /**
        * URB size in the current configuration.  The units this is expressed
-       * in are somewhat inconsistent, see gen_device_info::urb::size.
+       * in are somewhat inconsistent, see intel_device_info::urb::size.
        *
        * FINISHME: Represent the URB size consistently in KB on all platforms.
        */
diff --git a/src/mesa/drivers/dri/i965/brw_copy_image.c b/src/mesa/drivers/dri/i965/brw_copy_image.c
index d53b53bcbc2..5b9f49a6387 100644
--- a/src/mesa/drivers/dri/i965/brw_copy_image.c
+++ b/src/mesa/drivers/dri/i965/brw_copy_image.c
@@ -42,7 +42,7 @@ copy_miptrees(struct brw_context *brw,
               int dst_x, int dst_y, int dst_z, unsigned dst_level,
               int src_width, int src_height)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver <= 5) {
       /* On gfx4-5, try BLT first.
diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c
index 03557d276ce..8cea5365df0 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.c
+++ b/src/mesa/drivers/dri/i965/brw_cs.c
@@ -63,7 +63,7 @@ brw_cs_get_parameters(const struct brw_context *brw)
 }
 
 static void
-assign_cs_binding_table_offsets(const struct gen_device_info *devinfo,
+assign_cs_binding_table_offsets(const struct intel_device_info *devinfo,
                                 const struct gl_program *prog,
                                 struct brw_cs_prog_data *prog_data)
 {
@@ -82,7 +82,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
                     struct brw_program *cp,
                     struct brw_cs_prog_key *key)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const GLuint *program;
    void *mem_ctx = ralloc_context(NULL);
    struct brw_cs_prog_data prog_data;
@@ -223,7 +223,7 @@ brw_cs_populate_default_key(const struct brw_compiler *compiler,
                             struct brw_cs_prog_key *key,
                             struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    memset(key, 0, sizeof(*key));
    brw_populate_default_base_prog_key(devinfo, brw_program(prog), &key->base);
 }
diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c
index 72cd73f0d59..2e23b347dcc 100644
--- a/src/mesa/drivers/dri/i965/brw_curbe.c
+++ b/src/mesa/drivers/dri/i965/brw_curbe.c
@@ -196,7 +196,7 @@ static const GLfloat fixed_plane[6][4] = {
 static void
 brw_upload_constant_buffer(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_PUSH_CONSTANT_ALLOCATION */
    const GLuint sz = brw->curbe.total_size;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 1798e1e497f..cc26dc92c65 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -166,7 +166,7 @@ brw_emit_prim(struct brw_context *brw,
               bool is_indirect,
               GLsizeiptr indirect_offset)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    int verts_per_instance;
    int vertex_access_type;
    int indirect_flag;
@@ -333,7 +333,7 @@ static uint8_t get_wa_flags(const struct gl_vertex_format *glformat)
 static void
 brw_merge_inputs(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct gl_context *ctx = &brw->ctx;
 
    if (devinfo->ver < 8 && !devinfo->is_haswell) {
@@ -929,7 +929,7 @@ gfx9_emit_preempt_wa(struct brw_context *brw,
                      const struct _mesa_prim *prim, GLuint num_instances)
 {
    bool object_preemption = true;
-   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Only apply these workarounds for gfx9 */
    assert(devinfo->ver == 9);
@@ -991,7 +991,7 @@ brw_draw_single_prim(struct gl_context *ctx,
                      GLsizeiptr indirect_offset)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    bool fail_next;
    bool is_indirect = brw->draw.draw_indirect_data != NULL;
 
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index f80ae3e383c..c37f7af21e0 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -252,7 +252,7 @@ brw_get_vertex_surface_type(struct brw_context *brw,
                             const struct gl_vertex_format *glformat)
 {
    int size = glformat->Size;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const bool is_ivybridge_or_older =
       devinfo->ver <= 7 && !devinfo->is_baytrail && !devinfo->is_haswell;
 
@@ -436,7 +436,7 @@ copy_array_to_vbo_array(struct brw_context *brw,
 void
 brw_prepare_vertices(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_VERTEX_PROGRAM */
    const struct gl_program *vp = brw->programs[MESA_SHADER_VERTEX];
diff --git a/src/mesa/drivers/dri/i965/brw_extensions.c b/src/mesa/drivers/dri/i965/brw_extensions.c
index f5f59a69f64..b4189271928 100644
--- a/src/mesa/drivers/dri/i965/brw_extensions.c
+++ b/src/mesa/drivers/dri/i965/brw_extensions.c
@@ -37,7 +37,7 @@ void
 brw_init_extensions(struct gl_context *ctx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 4);
 
@@ -374,7 +374,7 @@ brw_init_extensions(struct gl_context *ctx)
       ctx->Extensions.ARB_fragment_shader_interlock = true;
    }
 
-   if (gen_device_info_is_9lp(devinfo))
+   if (intel_device_info_is_9lp(devinfo))
       ctx->Extensions.KHR_texture_compression_astc_hdr = true;
 
    if (devinfo->ver >= 6)
diff --git a/src/mesa/drivers/dri/i965/brw_fbo.c b/src/mesa/drivers/dri/i965/brw_fbo.c
index 7695546d216..01ac6cb3b83 100644
--- a/src/mesa/drivers/dri/i965/brw_fbo.c
+++ b/src/mesa/drivers/dri/i965/brw_fbo.c
@@ -249,7 +249,7 @@ static mesa_format
 brw_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat)
 {
    struct brw_context *brw = brw_context(ctx);
-   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    switch (internalFormat) {
    default:
@@ -647,7 +647,7 @@ static void
 brw_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_renderbuffer *depthRb =
       brw_get_renderbuffer(fb, BUFFER_DEPTH);
    struct brw_renderbuffer *stencilRb =
@@ -895,7 +895,7 @@ brw_blit_framebuffer(struct gl_context *ctx,
                      GLbitfield mask, GLenum filter)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Page 679 of OpenGL 4.4 spec says:
     *    "Added BlitFramebuffer to commands affected by conditional rendering in
@@ -1014,7 +1014,7 @@ brw_cache_sets_clear(struct brw_context *brw)
 static void
 flush_depth_and_render_caches(struct brw_context *brw, struct brw_bo *bo)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver >= 6) {
       brw_emit_pipe_control_flush(brw,
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs.c b/src/mesa/drivers/dri/i965/brw_ff_gs.c
index a78f65abe2a..84d1063c17c 100644
--- a/src/mesa/drivers/dri/i965/brw_ff_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_ff_gs.c
@@ -47,7 +47,7 @@ void
 brw_codegen_ff_gs_prog(struct brw_context *brw,
                        struct brw_ff_gs_prog_key *key)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_ff_gs_compile c;
    const GLuint *program;
    void *mem_ctx;
@@ -162,7 +162,7 @@ static void
 brw_ff_gs_populate_key(struct brw_context *brw,
                        struct brw_ff_gs_prog_key *key)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    static const unsigned swizzle_for_offset[4] = {
       BRW_SWIZZLE4(0, 1, 2, 3),
       BRW_SWIZZLE4(1, 2, 3, 3),
diff --git a/src/mesa/drivers/dri/i965/brw_formatquery.c b/src/mesa/drivers/dri/i965/brw_formatquery.c
index 86dd4835135..67d603f1690 100644
--- a/src/mesa/drivers/dri/i965/brw_formatquery.c
+++ b/src/mesa/drivers/dri/i965/brw_formatquery.c
@@ -32,7 +32,7 @@ brw_query_samples_for_format(struct gl_context *ctx, GLenum target,
                              GLenum internalFormat, int samples[16])
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    (void) target;
    (void) internalFormat;
diff --git a/src/mesa/drivers/dri/i965/brw_generate_mipmap.c b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c
index 767432dfcfc..e533f84496c 100644
--- a/src/mesa/drivers/dri/i965/brw_generate_mipmap.c
+++ b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c
@@ -39,7 +39,7 @@ brw_generate_mipmap(struct gl_context *ctx, GLenum target,
                     struct gl_texture_object *tex_obj)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gen_device_info *devinfo = &brw->screen->devinfo;
+   struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_texture_object *intel_obj = brw_texture_object(tex_obj);
    const unsigned base_level = tex_obj->Attrib.BaseLevel;
    unsigned last_level, first_layer, last_layer;
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 346638aab05..a4b4fb8c74d 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -36,7 +36,7 @@
 #include "compiler/glsl/ir_uniform.h"
 
 static void
-assign_gs_binding_table_offsets(const struct gen_device_info *devinfo,
+assign_gs_binding_table_offsets(const struct intel_device_info *devinfo,
                                 const struct gl_program *prog,
                                 struct brw_gs_prog_data *prog_data)
 {
@@ -55,7 +55,7 @@ brw_codegen_gs_prog(struct brw_context *brw,
                     struct brw_gs_prog_key *key)
 {
    struct brw_compiler *compiler = brw->screen->compiler;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_stage_state *stage_state = &brw->gs.base;
    struct brw_gs_prog_data prog_data;
    bool start_busy = false;
@@ -188,7 +188,7 @@ brw_gs_populate_default_key(const struct brw_compiler *compiler,
                             struct brw_gs_prog_key *key,
                             struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
 
    memset(key, 0, sizeof(*key));
 
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index e86e6fb7764..e584793b287 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -78,7 +78,7 @@ static void
 brw_lower_packing_builtins(struct brw_context *brw,
                            exec_list *ir)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Gens < 7 don't have instructions to convert to or from half-precision,
     * and Gens < 6 don't expose that functionality.
@@ -94,7 +94,7 @@ process_glsl_ir(struct brw_context *brw,
                 struct gl_shader_program *shader_prog,
                 struct gl_linked_shader *shader)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    /* Temporary memory context for any new IR. */
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index 8e813ff70c5..eca367d61d4 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -285,7 +285,7 @@ brw_is_color_fast_clear_compatible(struct brw_context *brw,
                                    const struct brw_mipmap_tree *mt,
                                    const union gl_color_union *color)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct gl_context *ctx = &brw->ctx;
 
    /* If we're mapping the render format to a different format than the
diff --git a/src/mesa/drivers/dri/i965/brw_mipmap_tree.c b/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
index 9a599e2864e..75af22f72dd 100644
--- a/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
@@ -69,7 +69,7 @@ static void brw_miptree_unmap_raw(struct brw_mipmap_tree *mt);
  * format variant for check for CCS_E compatibility.
  */
 static bool
-format_ccs_e_compat_with_miptree(const struct gen_device_info *devinfo,
+format_ccs_e_compat_with_miptree(const struct intel_device_info *devinfo,
                                  const struct brw_mipmap_tree *mt,
                                  enum isl_format access_format)
 {
@@ -146,7 +146,7 @@ needs_separate_stencil(const struct brw_context *brw,
                        struct brw_mipmap_tree *mt,
                        mesa_format format)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (_mesa_get_format_base_format(format) != GL_DEPTH_STENCIL)
       return false;
@@ -195,7 +195,7 @@ brw_miptree_choose_aux_usage(struct brw_context *brw,
 mesa_format
 brw_lower_compressed_format(struct brw_context *brw, mesa_format format)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* No need to lower ETC formats on these platforms,
     * they are supported natively.
@@ -332,7 +332,7 @@ static bool
 need_to_retile_as_x(const struct brw_context *brw, uint64_t size,
                     enum isl_tiling tiling)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* If the BO is too large to fit in the aperture, we need to use the
     * BLT engine to support it.  Prior to Sandybridge, the BLT paths can't
@@ -478,7 +478,7 @@ miptree_create(struct brw_context *brw,
                GLuint num_samples,
                enum brw_miptree_create_flags flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const uint32_t alloc_flags =
       (flags & MIPTREE_CREATE_BUSY || num_samples > 1) ? BO_ALLOC_BUSY : 0;
    isl_tiling_flags_t tiling_flags = ISL_TILING_ANY_MASK;
@@ -585,7 +585,7 @@ brw_miptree_create_for_bo(struct brw_context *brw,
                           enum isl_tiling tiling,
                           enum brw_miptree_create_flags flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_mipmap_tree *mt;
    const GLenum target = depth > 1 ? GL_TEXTURE_2D_ARRAY : GL_TEXTURE_2D;
    const GLenum base_format = _mesa_get_format_base_format(format);
@@ -848,7 +848,7 @@ brw_miptree_create_for_dri_image(struct brw_context *brw,
     * for EGL images from non-tile aligned sufaces in gfx4 hw and earlier which has
     * trouble resolving back to destination image due to alignment issues.
     */
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    if (!devinfo->has_surface_tile_offset) {
       uint32_t draw_x, draw_y;
       brw_miptree_get_tile_offsets(mt, 0, 0, &draw_x, &draw_y);
@@ -1282,7 +1282,7 @@ brw_miptree_copy_slice(struct brw_context *brw,
                        struct brw_mipmap_tree *dst_mt,
                        unsigned dst_level, unsigned dst_layer)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    mesa_format format = src_mt->format;
    unsigned width = minify(src_mt->surf.phys_level0_sa.width,
                            src_level - src_mt->first_level);
@@ -1483,7 +1483,7 @@ brw_miptree_level_enable_hiz(struct brw_context *brw,
                              struct brw_mipmap_tree *mt,
                              uint32_t level)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(mt->aux_buf);
    assert(mt->surf.size_B > 0);
@@ -1620,7 +1620,7 @@ bool
 brw_miptree_sample_with_hiz(struct brw_context *brw,
                             struct brw_mipmap_tree *mt)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (!devinfo->has_sample_with_hiz) {
       return false;
@@ -1805,7 +1805,7 @@ brw_miptree_finish_write(struct brw_context *brw,
                          uint32_t start_layer, uint32_t num_layers,
                          enum isl_aux_usage aux_usage)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (mt->format == MESA_FORMAT_S_UINT8 && devinfo->ver <= 7) {
       mt->shadow_needs_update = true;
@@ -2013,7 +2013,7 @@ brw_miptree_render_aux_usage(struct brw_context *brw,
                              bool blend_enabled,
                              bool draw_aux_disabled)
 {
-   struct gen_device_info *devinfo = &brw->screen->devinfo;
+   struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (draw_aux_disabled)
       return ISL_AUX_USAGE_NONE;
@@ -2287,7 +2287,7 @@ void
 brw_update_r8stencil(struct brw_context *brw,
                        struct brw_mipmap_tree *mt)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 7);
    struct brw_mipmap_tree *src =
@@ -2429,7 +2429,7 @@ brw_miptree_unmap_blit(struct brw_context *brw,
                        unsigned int level,
                        unsigned int slice)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    brw_miptree_unmap_raw(map->linear_mt);
@@ -2607,7 +2607,7 @@ brw_miptree_map_blit(struct brw_context *brw,
                      struct brw_miptree_map *map,
                      unsigned int level, unsigned int slice)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    map->linear_mt = make_surface(brw, GL_TEXTURE_2D, mt->format,
                                  0, 0, map->w, map->h, 1, 1,
                                  ISL_TILING_LINEAR_BIT,
@@ -3027,7 +3027,7 @@ use_blitter_to_map(struct brw_context *brw,
                    struct brw_mipmap_tree *mt,
                    const struct brw_miptree_map *map)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->has_llc &&
       /* It's probably not worth swapping to the blit ring because of
@@ -3076,7 +3076,7 @@ brw_miptree_map(struct brw_context *brw,
                 void **out_ptr,
                 ptrdiff_t *out_stride)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_miptree_map *map;
 
    assert(mt->surf.samples == 1);
@@ -3163,7 +3163,7 @@ get_isl_surf_dim(GLenum target)
 }
 
 enum isl_dim_layout
-get_isl_dim_layout(const struct gen_device_info *devinfo,
+get_isl_dim_layout(const struct intel_device_info *devinfo,
                    enum isl_tiling tiling, GLenum target)
 {
    switch (target) {
diff --git a/src/mesa/drivers/dri/i965/brw_mipmap_tree.h b/src/mesa/drivers/dri/i965/brw_mipmap_tree.h
index 231fdbe378f..c17e72e344a 100644
--- a/src/mesa/drivers/dri/i965/brw_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/brw_mipmap_tree.h
@@ -456,7 +456,7 @@ enum isl_surf_dim
 get_isl_surf_dim(GLenum target);
 
 enum isl_dim_layout
-get_isl_dim_layout(const struct gen_device_info *devinfo,
+get_isl_dim_layout(const struct intel_device_info *devinfo,
                    enum isl_tiling tiling, GLenum target);
 
 void
@@ -716,7 +716,7 @@ static inline bool
 brw_miptree_needs_fake_etc(struct brw_context *brw,
                              struct brw_mipmap_tree *mt)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    bool is_etc = _mesa_is_format_etc2(mt->format) ||
                  (mt->format == MESA_FORMAT_ETC1_RGB8);
 
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index ec44ba9f3c3..993d14c4914 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -54,7 +54,7 @@
 static void
 upload_pipelined_state_pointers(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver == 5) {
       /* Need to flush before changing clip max threads for errata. */
@@ -136,7 +136,7 @@ static bool
 rebase_depth_stencil(struct brw_context *brw, struct brw_renderbuffer *irb,
                      bool invalidate)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    uint32_t tile_mask_x = 0, tile_mask_y = 0;
 
@@ -198,7 +198,7 @@ void
 brw_workaround_depthstencil_alignment(struct brw_context *brw,
                                       GLbitfield clear_mask)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    struct brw_renderbuffer *depth_irb = brw_get_renderbuffer(fb, BUFFER_DEPTH);
@@ -286,7 +286,7 @@ brw_emit_depth_stencil_hiz(struct brw_context *brw,
       tiled_surface = depth_mt->surf.tiling != ISL_TILING_LINEAR;
    }
 
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const unsigned len = (devinfo->is_g4x || devinfo->ver == 5) ? 6 : 5;
 
    BEGIN_BATCH(len);
@@ -321,7 +321,7 @@ brw_emit_depth_stencil_hiz(struct brw_context *brw,
 void
 brw_emit_depthbuffer(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    /* _NEW_BUFFERS */
@@ -468,7 +468,7 @@ const struct brw_tracked_state brw_depthbuffer = {
 void
 brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const bool is_965 = devinfo->ver == 4 && !devinfo->is_g4x;
    const uint32_t _3DSTATE_PIPELINE_SELECT =
       is_965 ? CMD_PIPELINE_SELECT_965 : CMD_PIPELINE_SELECT_GM45;
@@ -622,7 +622,7 @@ void
 brw_emit_hashing_mode(struct brw_context *brw, unsigned width,
                       unsigned height, unsigned scale)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver == 9) {
       const uint32_t slice_hashing[] = {
@@ -697,7 +697,7 @@ brw_emit_hashing_mode(struct brw_context *brw, unsigned width,
 void
 brw_upload_invariant_state(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const bool is_965 = devinfo->ver == 4 && !devinfo->is_g4x;
 
    brw_emit_select_pipeline(brw, BRW_RENDER_PIPELINE);
@@ -740,7 +740,7 @@ brw_upload_invariant_state(struct brw_context *brw)
 void
 brw_upload_state_base_address(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (brw->batch.state_base_address_emitted)
       return;
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c
index ce48a41396c..7f5167a59e5 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -372,11 +372,11 @@ brw_delete_perf_query(struct gl_context *ctx,
 }
 
 /******************************************************************************/
-/* gen_device_info will have incorrect default topology values for unsupported kernels.
+/* intel_device_info will have incorrect default topology values for unsupported kernels.
  * verify kernel support to ensure OA metrics are accurate.
  */
 static bool
-oa_metrics_kernel_support(int fd, const struct gen_device_info *devinfo)
+oa_metrics_kernel_support(int fd, const struct intel_device_info *devinfo)
 {
    if (devinfo->ver >= 10) {
       /* topology uAPI required for CNL+ (kernel 4.17+) make a call to the api
@@ -476,7 +476,7 @@ static unsigned
 brw_init_perf_query_info(struct gl_context *ctx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    struct gen_perf_context *perf_ctx = brw->perf_ctx;
    struct gen_perf_config *perf_cfg = gen_perf_config(perf_ctx);
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 9bbc2306c47..0e9a25d6167 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -36,7 +36,7 @@
 void
 brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver >= 6 &&
        (flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
@@ -90,7 +90,7 @@ brw_emit_pipe_control_write(struct brw_context *brw, uint32_t flags,
 void
 brw_emit_depth_stall_flushes(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver >= 6);
 
@@ -118,7 +118,7 @@ brw_emit_depth_stall_flushes(struct brw_context *brw)
 void
 gfx7_emit_vs_workaround_flush(struct brw_context *brw)
 {
-   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver == 7);
    brw_emit_pipe_control_write(brw,
@@ -272,7 +272,7 @@ brw_emit_post_sync_nonzero_flush(struct brw_context *brw)
 void
 brw_emit_end_of_pipe_sync(struct brw_context *brw, uint32_t flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver >= 6) {
       /* From Sandybridge PRM, volume 2, "1.7.3.1 Writing a Value to Memory":
@@ -356,7 +356,7 @@ brw_emit_end_of_pipe_sync(struct brw_context *brw, uint32_t flags)
 void
 brw_emit_mi_flush(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    int flags = PIPE_CONTROL_RENDER_TARGET_FLUSH;
    if (devinfo->ver >= 6) {
@@ -394,7 +394,7 @@ init_identifier_bo(struct brw_context *brw)
 
 int
 brw_init_pipe_control(struct brw_context *brw,
-                      const struct gen_device_info *devinfo)
+                      const struct intel_device_info *devinfo)
 {
    switch (devinfo->ver) {
    case 11:
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.h b/src/mesa/drivers/dri/i965/brw_pipe_control.h
index 79bbc882424..1aed53ee111 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.h
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.h
@@ -25,7 +25,7 @@
 #define BRW_PIPE_CONTROL_DOT_H
 
 struct brw_context;
-struct gen_device_info;
+struct intel_device_info;
 struct brw_bo;
 
 /** @{
@@ -77,7 +77,7 @@ enum pipe_control_flags
 /** @} */
 
 int brw_init_pipe_control(struct brw_context *brw,
-                          const struct gen_device_info *info);
+                          const struct intel_device_info *info);
 void brw_fini_pipe_control(struct brw_context *brw);
 
 void brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags);
diff --git a/src/mesa/drivers/dri/i965/brw_pixel_read.c b/src/mesa/drivers/dri/i965/brw_pixel_read.c
index 3444ce3ab1e..1c874eca2f5 100644
--- a/src/mesa/drivers/dri/i965/brw_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/brw_pixel_read.c
@@ -73,7 +73,7 @@ brw_readpixels_tiled_memcpy(struct gl_context *ctx,
 {
    struct brw_context *brw = brw_context(ctx);
    struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorReadBuffer;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* This path supports reading from color buffers only */
    if (rb == NULL)
diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
index 05b81bb1a29..74eb236bdad 100644
--- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c
+++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
@@ -350,7 +350,7 @@ can_cut_index_handle_prims(struct gl_context *ctx,
                            unsigned restart_index)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Otherwise Haswell can do it all. */
    if (devinfo->ver >= 8 || devinfo->is_haswell)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index b88c704ec6c..cb490dc52c4 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -83,7 +83,7 @@ brw_create_nir(struct brw_context *brw,
                gl_shader_stage stage,
                bool is_scalar)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    const nir_shader_compiler_options *options =
       ctx->Const.ShaderCompilerOptions[stage].NirOptions;
@@ -179,7 +179,7 @@ shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
 void
 brw_nir_lower_resources(nir_shader *nir, struct gl_shader_program *shader_prog,
                         struct gl_program *prog,
-                        const struct gen_device_info *devinfo)
+                        const struct intel_device_info *devinfo)
 {
    NIR_PASS_V(nir, brw_nir_lower_uniforms, nir->options->lower_to_scalar);
    NIR_PASS_V(prog->nir, gl_nir_lower_samplers, shader_prog);
@@ -348,7 +348,7 @@ static void
 brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    unsigned bits = PIPE_CONTROL_DATA_CACHE_FLUSH | PIPE_CONTROL_CS_STALL;
    assert(devinfo->ver >= 7 && devinfo->ver <= 11);
 
@@ -386,7 +386,7 @@ static void
 brw_framebuffer_fetch_barrier(struct gl_context *ctx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (!ctx->Extensions.EXT_shader_framebuffer_fetch) {
       if (devinfo->ver >= 6) {
@@ -436,7 +436,7 @@ brw_alloc_stage_scratch(struct brw_context *brw,
    if (stage_state->scratch_bo)
       brw_bo_unreference(stage_state->scratch_bo);
 
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    unsigned thread_count;
    switch(stage_state->stage) {
    case MESA_SHADER_VERTEX:
@@ -823,7 +823,7 @@ brw_dump_arb_asm(const char *stage, struct gl_program *prog)
 }
 
 void
-brw_setup_tex_for_precompile(const struct gen_device_info *devinfo,
+brw_setup_tex_for_precompile(const struct intel_device_info *devinfo,
                              struct brw_sampler_prog_key_data *tex,
                              const struct gl_program *prog)
 {
@@ -850,7 +850,7 @@ brw_setup_tex_for_precompile(const struct gen_device_info *devinfo,
  * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
  */
 uint32_t
-brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
+brw_assign_common_binding_table_offsets(const struct intel_device_info *devinfo,
                                         const struct gl_program *prog,
                                         struct brw_stage_prog_data *stage_prog_data,
                                         uint32_t next_binding_table_offset)
diff --git a/src/mesa/drivers/dri/i965/brw_program.h b/src/mesa/drivers/dri/i965/brw_program.h
index a33f2a8394d..965ec1a3d3c 100644
--- a/src/mesa/drivers/dri/i965/brw_program.h
+++ b/src/mesa/drivers/dri/i965/brw_program.h
@@ -67,25 +67,25 @@ struct nir_shader *brw_create_nir(struct brw_context *brw,
 void brw_nir_lower_resources(nir_shader *nir,
                              struct gl_shader_program *shader_prog,
                              struct gl_program *prog,
-                             const struct gen_device_info *devinfo);
+                             const struct intel_device_info *devinfo);
 
 void brw_shader_gather_info(nir_shader *nir, struct gl_program *prog);
 
-void brw_setup_tex_for_precompile(const struct gen_device_info *devinfo,
+void brw_setup_tex_for_precompile(const struct intel_device_info *devinfo,
                                   struct brw_sampler_prog_key_data *tex,
                                   const struct gl_program *prog);
 
 void brw_populate_base_prog_key(struct gl_context *ctx,
                                 const struct brw_program *prog,
                                 struct brw_base_prog_key *key);
-void brw_populate_default_base_prog_key(const struct gen_device_info *devinfo,
+void brw_populate_default_base_prog_key(const struct intel_device_info *devinfo,
                                         const struct brw_program *prog,
                                         struct brw_base_prog_key *key);
 void brw_debug_recompile(struct brw_context *brw, gl_shader_stage stage,
                          unsigned api_id, struct brw_base_prog_key *key);
 
 uint32_t
-brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
+brw_assign_common_binding_table_offsets(const struct intel_device_info *devinfo,
                                         const struct gl_program *prog,
                                         struct brw_stage_prog_data *stage_prog_data,
                                         uint32_t next_binding_table_offset);
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 97d220cb493..efaa8fb4130 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -76,7 +76,7 @@ brw_raw_timestamp_delta(struct brw_context *brw, uint64_t time0, uint64_t time1)
 void
 brw_write_timestamp(struct brw_context *brw, struct brw_bo *query_bo, int idx)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver == 6) {
       /* Emit Sandybridge workaround flush: */
@@ -100,7 +100,7 @@ brw_write_timestamp(struct brw_context *brw, struct brw_bo *query_bo, int idx)
 void
 brw_write_depth_count(struct brw_context *brw, struct brw_bo *query_bo, int idx)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t flags = PIPE_CONTROL_WRITE_DEPTH_COUNT | PIPE_CONTROL_DEPTH_STALL;
 
    if (devinfo->ver == 9 && devinfo->gt == 4)
@@ -126,7 +126,7 @@ brw_queryobj_get_results(struct gl_context *ctx,
                          struct brw_query_object *query)
 {
    struct brw_context *brw = brw_context(ctx);
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    int i;
    uint64_t *results;
@@ -156,12 +156,12 @@ brw_queryobj_get_results(struct gl_context *ctx,
        * Subtract the two and convert to nanoseconds.
        */
       query->Base.Result = brw_raw_timestamp_delta(brw, results[0], results[1]);
-      query->Base.Result = gen_device_info_timebase_scale(devinfo, query->Base.Result);
+      query->Base.Result = intel_device_info_timebase_scale(devinfo, query->Base.Result);
       break;
 
    case GL_TIMESTAMP:
       /* The query BO contains a single timestamp value in results[0]. */
-      query->Base.Result = gen_device_info_timebase_scale(devinfo, results[0]);
+      query->Base.Result = intel_device_info_timebase_scale(devinfo, results[0]);
 
       /* Ensure the scaled timestamp overflows according to
        * GL_QUERY_COUNTER_BITS
@@ -253,7 +253,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q)
 {
    struct brw_context *brw = brw_context(ctx);
    struct brw_query_object *query = (struct brw_query_object *)q;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver < 6);
 
@@ -326,7 +326,7 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q)
 {
    struct brw_context *brw = brw_context(ctx);
    struct brw_query_object *query = (struct brw_query_object *)q;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver < 6);
 
@@ -379,7 +379,7 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q)
 static void brw_wait_query(struct gl_context *ctx, struct gl_query_object *q)
 {
    struct brw_query_object *query = (struct brw_query_object *)q;
-   UNUSED const struct gen_device_info *devinfo =
+   UNUSED const struct intel_device_info *devinfo =
       &brw_context(ctx)->screen->devinfo;
 
    assert(devinfo->ver < 6);
@@ -398,7 +398,7 @@ static void brw_check_query(struct gl_context *ctx, struct gl_query_object *q)
 {
    struct brw_context *brw = brw_context(ctx);
    struct brw_query_object *query = (struct brw_query_object *)q;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver < 6);
 
@@ -428,7 +428,7 @@ static void
 ensure_bo_has_space(struct gl_context *ctx, struct brw_query_object *query)
 {
    struct brw_context *brw = brw_context(ctx);
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(devinfo->ver < 6);
 
@@ -538,7 +538,7 @@ static uint64_t
 brw_get_timestamp(struct gl_context *ctx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint64_t result = 0;
 
    switch (brw->screen->hw_has_timestamp) {
@@ -555,7 +555,7 @@ brw_get_timestamp(struct gl_context *ctx)
    }
 
    /* Scale to nanosecond units */
-   result = gen_device_info_timebase_scale(devinfo, result);
+   result = intel_device_info_timebase_scale(devinfo, result);
 
    /* Ensure the scaled timestamp overflows according to
     * GL_QUERY_COUNTER_BITS.  Technically this isn't required if
diff --git a/src/mesa/drivers/dri/i965/brw_screen.c b/src/mesa/drivers/dri/i965/brw_screen.c
index 23eb5f57fce..c43cc4a79a2 100644
--- a/src/mesa/drivers/dri/i965/brw_screen.c
+++ b/src/mesa/drivers/dri/i965/brw_screen.c
@@ -355,7 +355,7 @@ static const struct {
 };
 
 static bool
-modifier_is_supported(const struct gen_device_info *devinfo,
+modifier_is_supported(const struct intel_device_info *devinfo,
                       const struct brw_image_format *fmt, int dri_format,
                       uint64_t modifier)
 {
@@ -685,7 +685,7 @@ const uint64_t priority_to_modifier[] = {
 };
 
 static uint64_t
-select_best_modifier(struct gen_device_info *devinfo,
+select_best_modifier(struct intel_device_info *devinfo,
                      int dri_format,
                      const uint64_t *modifiers,
                      const unsigned count)
@@ -1338,7 +1338,7 @@ brw_create_image_from_dma_bufs(__DRIscreen *dri_screen,
 }
 
 static bool
-brw_image_format_is_supported(const struct gen_device_info *devinfo,
+brw_image_format_is_supported(const struct intel_device_info *devinfo,
                                 const struct brw_image_format *fmt)
 {
    /* Currently, all formats with an brw_image_format are available on all
@@ -2082,7 +2082,7 @@ err:
 static bool
 brw_detect_pipelined_so(struct brw_screen *screen)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
 
    /* Supposedly, Broadwell just works. */
    if (devinfo->ver >= 8)
@@ -2233,7 +2233,7 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
    static const uint8_t singlesample_samples[1] = {0};
 
    struct brw_screen *screen = dri_screen->driverPrivate;
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    uint8_t depth_bits[4], stencil_bits[4];
    __DRIconfig **configs = NULL;
 
@@ -2541,7 +2541,7 @@ __DRIconfig **brw_init_screen(__DRIscreen *dri_screen)
    if (!gen_get_device_info_from_fd(dri_screen->fd, &screen->devinfo))
       return NULL;
 
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    screen->deviceID = devinfo->chipset_id;
    screen->no_hw = devinfo->no_hw;
 
@@ -2604,8 +2604,8 @@ __DRIconfig **brw_init_screen(__DRIscreen *dri_screen)
                    screen->hw_has_swizzling);
 
    /* GENs prior to 8 do not support EU/Subslice info */
-   screen->subslice_total = gen_device_info_subslice_total(devinfo);
-   screen->eu_total = gen_device_info_eu_total(devinfo);
+   screen->subslice_total = intel_device_info_subslice_total(devinfo);
+   screen->eu_total = intel_device_info_eu_total(devinfo);
 
    /* Gfx7-7.5 kernel requirements / command parser saga:
     *
diff --git a/src/mesa/drivers/dri/i965/brw_screen.h b/src/mesa/drivers/dri/i965/brw_screen.h
index 626d11f8986..ed1b0010c47 100644
--- a/src/mesa/drivers/dri/i965/brw_screen.h
+++ b/src/mesa/drivers/dri/i965/brw_screen.h
@@ -47,7 +47,7 @@ extern "C" {
 struct brw_screen
 {
    int deviceID;
-   struct gen_device_info devinfo;
+   struct intel_device_info devinfo;
 
    __DRIscreen *driScrnPriv;
 
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index f1e5b0f78e9..281ed9e571c 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -415,7 +415,7 @@ void gfx11_init_atoms(struct brw_context *brw);
 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 #define ICL_MOCS_PTE (1 << 1)
 
-uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo,
+uint32_t brw_get_bo_mocs(const struct intel_device_info *devinfo,
                          struct brw_bo *bo);
 
 #ifdef __cplusplus
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 8f1562c7eea..c8fb42f56bc 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -49,7 +49,7 @@
 void
 brw_enable_obj_preemption(struct brw_context *brw, bool enable)
 {
-   ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   ASSERTED const struct intel_device_info *devinfo = &brw->screen->devinfo;
    assert(devinfo->ver >= 9);
 
    if (enable == brw->object_preemption)
@@ -71,7 +71,7 @@ brw_enable_obj_preemption(struct brw_context *brw, bool enable)
 static void
 brw_upload_gfx11_slice_hashing_state(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    int subslices_delta =
       devinfo->ppipe_subslices[0] - devinfo->ppipe_subslices[1];
    if (subslices_delta == 0)
@@ -151,7 +151,7 @@ brw_upload_gfx11_slice_hashing_state(struct brw_context *brw)
 static void
 brw_upload_initial_gpu_state(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct brw_compiler *compiler = brw->screen->compiler;
 
    /* On platforms with hardware contexts, we can set our initial GPU state
@@ -302,7 +302,7 @@ brw_copy_pipeline_atoms(struct brw_context *brw,
 void brw_init_state( struct brw_context *brw )
 {
    struct gl_context *ctx = &brw->ctx;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Force the first brw_select_pipeline to emit pipeline select */
    brw->last_pipeline = BRW_NUM_PIPELINES;
@@ -527,7 +527,7 @@ brw_upload_programs(struct brw_context *brw,
                     enum brw_pipeline pipeline)
 {
    struct gl_context *ctx = &brw->ctx;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (pipeline == BRW_RENDER_PIPELINE) {
       brw_upload_vs_prog(brw);
@@ -606,7 +606,7 @@ static inline void
 brw_upload_pipeline_state(struct brw_context *brw,
                           enum brw_pipeline pipeline)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    int i;
    static int dirty_count = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 95202fed5a1..c3197832d6a 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -206,7 +206,7 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
 void
 brw_screen_init_surface_formats(struct brw_screen *screen)
 {
-   const struct gen_device_info *devinfo = &screen->devinfo;
+   const struct intel_device_info *devinfo = &screen->devinfo;
    mesa_format format;
 
    memset(&screen->mesa_format_supports_texture, 0,
@@ -415,7 +415,7 @@ bool
 brw_render_target_supported(struct brw_context *brw,
                             struct gl_renderbuffer *rb)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    mesa_format format = rb->Format;
 
    /* Many integer formats are promoted to RGBA (like XRGB8888 is), which means
@@ -519,7 +519,7 @@ translate_tex_format(struct brw_context *brw,
 uint32_t
 brw_depth_format(struct brw_context *brw, mesa_format format)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    switch (format) {
    case MESA_FORMAT_Z_UNORM16:
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 64a0f2ca618..786f1cb2ec7 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -40,7 +40,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
 {
    struct gl_context *ctx = &brw->ctx;
    const struct brw_compiler *compiler = brw->screen->compiler;
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    struct brw_stage_state *stage_state = &brw->tcs.base;
    nir_shader *nir;
    struct brw_tcs_prog_data prog_data;
@@ -159,7 +159,7 @@ void
 brw_tcs_populate_key(struct brw_context *brw,
                      struct brw_tcs_prog_key *key)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct brw_compiler *compiler = brw->screen->compiler;
    struct brw_program *tcp =
       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
@@ -239,7 +239,7 @@ brw_tcs_populate_default_key(const struct brw_compiler *compiler,
                              struct gl_shader_program *sh_prog,
                              struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    struct brw_program *btcp = brw_program(prog);
    const struct gl_linked_shader *tes =
       sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index b8fa1904eeb..4330ecebeb2 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -39,7 +39,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
                      struct brw_tes_prog_key *key)
 {
    const struct brw_compiler *compiler = brw->screen->compiler;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_stage_state *stage_state = &brw->tes.base;
    struct brw_tes_prog_data prog_data;
    bool start_busy = false;
@@ -187,7 +187,7 @@ brw_tes_populate_default_key(const struct brw_compiler *compiler,
                              struct gl_shader_program *sh_prog,
                              struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    struct brw_program *btep = brw_program(prog);
 
    memset(key, 0, sizeof(*key));
diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c
index 713e500b534..e9cd6fe963f 100644
--- a/src/mesa/drivers/dri/i965/brw_tex.c
+++ b/src/mesa/drivers/dri/i965/brw_tex.c
@@ -306,7 +306,7 @@ static void
 brw_texture_barrier(struct gl_context *ctx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->ver >= 6) {
       brw_emit_pipe_control_flush(brw,
diff --git a/src/mesa/drivers/dri/i965/brw_tex_image.c b/src/mesa/drivers/dri/i965/brw_tex_image.c
index 2f95918e56e..ff5a800e0fa 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_image.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_image.c
@@ -184,7 +184,7 @@ brw_texsubimage_tiled_memcpy(struct gl_context * ctx,
                              const struct gl_pixelstore_attrib *packing)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_texture_image *image = brw_texture_image(texImage);
    int src_pitch;
 
@@ -732,7 +732,7 @@ brw_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
                                 const struct gl_pixelstore_attrib *packing)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_texture_image *image = brw_texture_image(texImage);
    int dst_pitch;
 
@@ -970,8 +970,8 @@ brw_compressedtexsubimage(struct gl_context *ctx, GLuint dims,
    bool is_linear_astc = _mesa_is_astc_format(gl_format) &&
                         !_mesa_is_srgb_format(gl_format);
    struct brw_context *brw = (struct brw_context*) ctx;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
-   if (devinfo->ver == 9 && !gen_device_info_is_9lp(devinfo) && is_linear_astc)
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
+   if (devinfo->ver == 9 && !intel_device_info_is_9lp(devinfo) && is_linear_astc)
       flush_astc_denorms(ctx, dims, texImage,
                          xoffset, yoffset, zoffset,
                          width, height, depth);
diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c
index 3feae374094..a6bd447c5f1 100644
--- a/src/mesa/drivers/dri/i965/brw_urb.c
+++ b/src/mesa/drivers/dri/i965/brw_urb.c
@@ -116,7 +116,7 @@ void
 brw_calculate_urb_fence(struct brw_context *brw, unsigned csize,
                         unsigned vsize, unsigned sfsize)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (csize < limits[CS].min_entry_size)
       csize = limits[CS].min_entry_size;
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 257276843e1..7298d0ab9e4 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -73,7 +73,7 @@ static GLbitfield64
 brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key,
                        GLbitfield64 user_varyings)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    GLbitfield64 outputs_written = user_varyings;
 
    if (key->copy_edgeflag) {
@@ -117,7 +117,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
                     struct brw_vs_prog_key *key)
 {
    const struct brw_compiler *compiler = brw->screen->compiler;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const GLuint *program;
    struct brw_vs_prog_data prog_data;
    struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
@@ -257,7 +257,7 @@ brw_vs_populate_key(struct brw_context *brw,
    /* BRW_NEW_VERTEX_PROGRAM */
    struct gl_program *prog = brw->programs[MESA_SHADER_VERTEX];
    struct brw_program *vp = (struct brw_program *) prog;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    memset(key, 0, sizeof(*key));
 
@@ -333,7 +333,7 @@ brw_vs_populate_default_key(const struct brw_compiler *compiler,
                             struct brw_vs_prog_key *key,
                             struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
    struct brw_program *bvp = brw_program(prog);
 
    memset(key, 0, sizeof(*key));
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index c7a78b0a36a..e34d8e3c687 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -43,7 +43,7 @@
 #include "util/u_math.h"
 
 static void
-assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
+assign_fs_binding_table_offsets(const struct intel_device_info *devinfo,
                                 const struct gl_program *prog,
                                 const struct brw_wm_prog_key *key,
                                 struct brw_wm_prog_data *prog_data)
@@ -74,7 +74,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
                     struct brw_wm_prog_key *key,
                     struct brw_vue_map *vue_map)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    void *mem_ctx = ralloc_context(NULL);
    struct brw_wm_prog_data prog_data;
    const GLuint *program;
@@ -201,7 +201,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
                                    struct brw_sampler_prog_key_data *key)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    GLbitfield mask = prog->SamplersUsed;
 
    while (mask) {
@@ -360,7 +360,7 @@ brw_populate_base_prog_key(struct gl_context *ctx,
 }
 
 void
-brw_populate_default_base_prog_key(const struct gen_device_info *devinfo,
+brw_populate_default_base_prog_key(const struct intel_device_info *devinfo,
                                    const struct brw_program *prog,
                                    struct brw_base_prog_key *key)
 {
@@ -393,7 +393,7 @@ brw_wm_state_dirty(const struct brw_context *brw)
 void
 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_FRAGMENT_PROGRAM */
    const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
@@ -567,7 +567,7 @@ brw_wm_populate_default_key(const struct brw_compiler *compiler,
                             struct brw_wm_prog_key *key,
                             struct gl_program *prog)
 {
-   const struct gen_device_info *devinfo = compiler->devinfo;
+   const struct intel_device_info *devinfo = compiler->devinfo;
 
    memset(key, 0, sizeof(*key));
 
@@ -606,7 +606,7 @@ bool
 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_wm_prog_key key;
 
    struct brw_program *bfp = brw_program(prog);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 777ab5d5837..9265912796c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -72,7 +72,7 @@ static const uint32_t pte_mocs[] = {
 };
 
 uint32_t
-brw_get_bo_mocs(const struct gen_device_info *devinfo, struct brw_bo *bo)
+brw_get_bo_mocs(const struct intel_device_info *devinfo, struct brw_bo *bo)
 {
    return (bo && bo->external ? pte_mocs : wb_mocs)[devinfo->ver];
 }
@@ -85,7 +85,7 @@ get_isl_surf(struct brw_context *brw, struct brw_mipmap_tree *mt,
 {
    *surf = mt->surf;
 
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const enum isl_dim_layout dim_layout =
       get_isl_dim_layout(devinfo, mt->surf.tiling, target);
 
@@ -141,7 +141,7 @@ brw_emit_surface_state(struct brw_context *brw,
                        uint32_t *surf_offset, int surf_index,
                        unsigned reloc_flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t tile_x = mt->level[0].level_x;
    uint32_t tile_y = mt->level[0].level_y;
    uint32_t offset = mt->offset;
@@ -469,7 +469,7 @@ static void brw_update_texture_surface(struct gl_context *ctx,
                            uint32_t plane)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
 
    if (obj->Target == GL_TEXTURE_BUFFER) {
@@ -630,7 +630,7 @@ brw_emit_buffer_surface_state(struct brw_context *brw,
                               unsigned pitch,
                               unsigned reloc_flags)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t *dw = brw_state_batch(brw,
                                   brw->isl_dev.ss.size,
                                   brw->isl_dev.ss.align,
@@ -838,7 +838,7 @@ emit_null_surface_state(struct brw_context *brw,
                         const struct gl_framebuffer *fb,
                         uint32_t *out_offset)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t *surf = brw_state_batch(brw,
                                     brw->isl_dev.ss.size,
                                     brw->isl_dev.ss.align,
@@ -906,7 +906,7 @@ gfx4_update_renderbuffer_surface(struct brw_context *brw,
                                  unsigned unit,
                                  uint32_t surf_index)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
    struct brw_renderbuffer *irb = brw_renderbuffer(rb);
    struct brw_mipmap_tree *mt = irb->mt;
@@ -1002,7 +1002,7 @@ gfx4_update_renderbuffer_surface(struct brw_context *brw,
 static void
 update_renderbuffer_surfaces(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct gl_context *ctx = &brw->ctx;
 
    /* _NEW_BUFFERS | _NEW_COLOR */
@@ -1220,7 +1220,7 @@ update_stage_texture_surfaces(struct brw_context *brw,
 static void
 brw_update_texture_surfaces(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* BRW_NEW_VERTEX_PROGRAM */
    struct gl_program *vs = brw->programs[MESA_SHADER_VERTEX];
@@ -1288,7 +1288,7 @@ const struct brw_tracked_state brw_texture_surfaces = {
 static void
 brw_update_cs_texture_surfaces(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* BRW_NEW_COMPUTE_PROGRAM */
    struct gl_program *cs = brw->programs[MESA_SHADER_COMPUTE];
@@ -1469,7 +1469,7 @@ const struct brw_tracked_state brw_cs_image_surfaces = {
 static uint32_t
 get_image_format(struct brw_context *brw, mesa_format format, GLenum access)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    enum isl_format hw_format = brw_isl_format_for_mesa_format(format);
    if (access == GL_WRITE_ONLY || access == GL_NONE) {
       return hw_format;
diff --git a/src/mesa/drivers/dri/i965/genX_pipe_control.c b/src/mesa/drivers/dri/i965/genX_pipe_control.c
index 59e12d1da6e..8bd4f92a161 100644
--- a/src/mesa/drivers/dri/i965/genX_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/genX_pipe_control.c
@@ -83,7 +83,7 @@ void
 genX(emit_raw_pipe_control)(struct brw_context *brw, uint32_t flags,
                             struct brw_bo *bo, uint32_t offset, uint64_t imm)
 {
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
    enum pipe_control_flags post_sync_flags = get_post_sync_flags(flags);
    enum pipe_control_flags non_lri_post_sync_flags =
       post_sync_flags & ~PIPE_CONTROL_LRI_POST_SYNC_OP;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index f6d75d5f766..ec8114c558b 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -457,7 +457,7 @@ vf_invalidate_for_ib_48bit_transition(UNUSED struct brw_context *brw)
 static void
 genX(emit_vertices)(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t *dw;
 
    brw_prepare_vertices(brw);
@@ -1636,7 +1636,7 @@ genX(upload_sf)(struct brw_context *brw)
 
       /* _NEW_LINE */
 #if GFX_VER == 8
-      const struct gen_device_info *devinfo = &brw->screen->devinfo;
+      const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
       if (devinfo->is_cherryview)
          sf.CHVLineWidth = brw_get_line_width(brw);
@@ -1795,7 +1795,7 @@ genX(upload_wm)(struct brw_context *brw)
    UNUSED bool writes_depth =
       wm_prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF;
    UNUSED struct brw_stage_state *stage_state = &brw->wm.base;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
 #if GFX_VER == 6
    /* We can't fold this into gfx6_upload_wm_push_constants(), because
@@ -2121,7 +2121,7 @@ static void
 genX(upload_vs_state)(struct brw_context *brw)
 {
    UNUSED struct gl_context *ctx = &brw->ctx;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_stage_state *stage_state = &brw->vs.base;
 
    /* BRW_NEW_VS_PROG_DATA */
@@ -2554,7 +2554,7 @@ static void
 genX(upload_gs_state)(struct brw_context *brw)
 {
    UNUSED struct gl_context *ctx = &brw->ctx;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct brw_stage_state *stage_state = &brw->gs.base;
    const struct gl_program *gs_prog = brw->programs[MESA_SHADER_GEOMETRY];
    /* BRW_NEW_GEOMETRY_PROGRAM */
@@ -3079,7 +3079,7 @@ UNUSED static const uint32_t push_constant_opcodes[] = {
 static void
 genX(upload_push_constant_packets)(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    UNUSED uint32_t mocs = GFX_VER < 8 ? GFX7_MOCS_L3 : 0;
@@ -3850,7 +3850,7 @@ static void
 genX(upload_ps)(struct brw_context *brw)
 {
    UNUSED const struct gl_context *ctx = &brw->ctx;
-   UNUSED const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   UNUSED const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* BRW_NEW_FS_PROG_DATA */
    const struct brw_wm_prog_data *prog_data =
@@ -4013,7 +4013,7 @@ static const struct brw_tracked_state genX(ps_state) = {
 static void
 genX(upload_hs_state)(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct brw_stage_state *stage_state = &brw->tcs.base;
    struct brw_stage_prog_data *stage_prog_data = stage_state->prog_data;
    const struct brw_vue_prog_data *vue_prog_data =
@@ -4056,7 +4056,7 @@ static const struct brw_tracked_state genX(hs_state) = {
 static void
 genX(upload_ds_state)(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct brw_stage_state *stage_state = &brw->tes.base;
    struct brw_stage_prog_data *stage_prog_data = stage_state->prog_data;
 
@@ -4268,7 +4268,7 @@ genX(upload_cs_state)(struct brw_context *brw)
    struct brw_stage_state *stage_state = &brw->cs.base;
    struct brw_stage_prog_data *prog_data = stage_state->prog_data;
    struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    const struct brw_cs_parameters cs_params = brw_cs_get_parameters(brw);
 
diff --git a/src/mesa/drivers/dri/i965/gfx6_constant_state.c b/src/mesa/drivers/dri/i965/gfx6_constant_state.c
index 6241502f77a..a336ca9a5d1 100644
--- a/src/mesa/drivers/dri/i965/gfx6_constant_state.c
+++ b/src/mesa/drivers/dri/i965/gfx6_constant_state.c
@@ -133,7 +133,7 @@ gfx6_upload_push_constants(struct brw_context *brw,
                            const struct brw_stage_prog_data *prog_data,
                            struct brw_stage_state *stage_state)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    struct gl_context *ctx = &brw->ctx;
 
    bool active = prog_data &&
diff --git a/src/mesa/drivers/dri/i965/gfx6_queryobj.c b/src/mesa/drivers/dri/i965/gfx6_queryobj.c
index fcfe8bc5602..75508ab672b 100644
--- a/src/mesa/drivers/dri/i965/gfx6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gfx6_queryobj.c
@@ -79,7 +79,7 @@ static void
 write_primitives_generated(struct brw_context *brw,
                            struct brw_bo *query_bo, int stream, int idx)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw_emit_mi_flush(brw);
 
@@ -97,7 +97,7 @@ static void
 write_xfb_primitives_written(struct brw_context *brw,
                              struct brw_bo *bo, int stream, int idx)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw_emit_mi_flush(brw);
 
@@ -116,7 +116,7 @@ write_xfb_overflow_streams(struct gl_context *ctx,
                            int idx)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw_emit_mi_flush(brw);
 
@@ -172,7 +172,7 @@ static void
 emit_pipeline_stat(struct brw_context *brw, struct brw_bo *bo,
                    int stream, int target, int idx)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* One source of confusion is the tessellation shader statistics. The
     * hardware has no statistics specific to the TE unit. Ideally we could have
@@ -223,7 +223,7 @@ gfx6_queryobj_get_results(struct gl_context *ctx,
                           struct brw_query_object *query)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (query->bo == NULL)
       return;
@@ -235,12 +235,12 @@ gfx6_queryobj_get_results(struct gl_context *ctx,
        * Subtract the two and convert to nanoseconds.
        */
       query->Base.Result = brw_raw_timestamp_delta(brw, results[0], results[1]);
-      query->Base.Result = gen_device_info_timebase_scale(devinfo, query->Base.Result);
+      query->Base.Result = intel_device_info_timebase_scale(devinfo, query->Base.Result);
       break;
 
    case GL_TIMESTAMP:
       /* The query BO contains a single timestamp value in results[0]. */
-      query->Base.Result = gen_device_info_timebase_scale(devinfo, results[0]);
+      query->Base.Result = intel_device_info_timebase_scale(devinfo, results[0]);
 
       /* Ensure the scaled timestamp overflows according to
        * GL_QUERY_COUNTER_BITS
diff --git a/src/mesa/drivers/dri/i965/gfx6_sol.c b/src/mesa/drivers/dri/i965/gfx6_sol.c
index 4df644c8b58..56470dafcb5 100644
--- a/src/mesa/drivers/dri/i965/gfx6_sol.c
+++ b/src/mesa/drivers/dri/i965/gfx6_sol.c
@@ -279,7 +279,7 @@ void
 brw_save_primitives_written_counters(struct brw_context *brw,
                                      struct brw_transform_feedback_object *obj)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct gl_context *ctx = &brw->ctx;
    const int streams = ctx->Const.MaxVertexStreams;
 
diff --git a/src/mesa/drivers/dri/i965/gfx6_urb.c b/src/mesa/drivers/dri/i965/gfx6_urb.c
index bf69a563706..8b69409bc77 100644
--- a/src/mesa/drivers/dri/i965/gfx6_urb.c
+++ b/src/mesa/drivers/dri/i965/gfx6_urb.c
@@ -52,7 +52,7 @@ gfx6_upload_urb(struct brw_context *brw, unsigned vs_size,
 {
    int nr_vs_entries, nr_gs_entries;
    int total_urb_size = brw->urb.size * 1024; /* in bytes */
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* Calculate how many entries fit in each stage's section of the URB */
    if (gs_present) {
diff --git a/src/mesa/drivers/dri/i965/gfx7_l3_state.c b/src/mesa/drivers/dri/i965/gfx7_l3_state.c
index f9992fb392e..9d36be5e1f1 100644
--- a/src/mesa/drivers/dri/i965/gfx7_l3_state.c
+++ b/src/mesa/drivers/dri/i965/gfx7_l3_state.c
@@ -70,7 +70,7 @@ get_pipeline_state_l3_weights(const struct brw_context *brw)
 static void
 setup_l3_config(struct brw_context *brw, const struct intel_l3_config *cfg)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const bool has_dc = cfg->n[INTEL_L3P_DC] || cfg->n[INTEL_L3P_ALL];
    const bool has_is = cfg->n[INTEL_L3P_IS] || cfg->n[INTEL_L3P_RO] ||
                        cfg->n[INTEL_L3P_ALL];
@@ -194,7 +194,7 @@ setup_l3_config(struct brw_context *brw, const struct intel_l3_config *cfg)
 static void
 update_urb_size(struct brw_context *brw, const struct intel_l3_config *cfg)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const unsigned sz = intel_get_l3_config_urb_size(devinfo, cfg);
 
    if (brw->urb.size != sz) {
@@ -300,7 +300,7 @@ const struct brw_tracked_state gfx7_l3_state = {
 void
 gfx7_restore_default_l3_config(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    const struct intel_l3_config *const cfg = intel_get_default_l3_config(devinfo);
 
    if (cfg != brw->l3.config &&
diff --git a/src/mesa/drivers/dri/i965/gfx7_urb.c b/src/mesa/drivers/dri/i965/gfx7_urb.c
index 1f1757487f0..674a8845e3c 100644
--- a/src/mesa/drivers/dri/i965/gfx7_urb.c
+++ b/src/mesa/drivers/dri/i965/gfx7_urb.c
@@ -62,7 +62,7 @@
 static void
 gfx7_allocate_push_constants(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* BRW_NEW_GEOMETRY_PROGRAM */
    bool gs_present = brw->programs[MESA_SHADER_GEOMETRY];
@@ -115,7 +115,7 @@ gfx7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
                               unsigned hs_size, unsigned ds_size,
                               unsigned gs_size, unsigned fs_size)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    unsigned offset = 0;
 
    /* From the SKL PRM, Workarounds section (#878):
@@ -207,7 +207,7 @@ void
 gfx7_upload_urb(struct brw_context *brw, unsigned vs_size,
                 bool gs_present, bool tess_present)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    /* BRW_NEW_{VS,TCS,TES,GS}_PROG_DATA */
    struct brw_vue_prog_data *prog_data[4] = {
diff --git a/src/mesa/drivers/dri/i965/gfx8_depth_state.c b/src/mesa/drivers/dri/i965/gfx8_depth_state.c
index be54a858561..e041355369a 100644
--- a/src/mesa/drivers/dri/i965/gfx8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gfx8_depth_state.c
@@ -171,7 +171,7 @@ gfx8_write_pma_stall_bits(struct brw_context *brw, uint32_t pma_stall_bits)
 static void
 gfx8_emit_pma_stall_workaround(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t bits = 0;
 
    if (devinfo->ver >= 9)
diff --git a/src/mesa/drivers/dri/i965/hsw_queryobj.c b/src/mesa/drivers/dri/i965/hsw_queryobj.c
index f53f93c06bf..e459c7db8b9 100644
--- a/src/mesa/drivers/dri/i965/hsw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/hsw_queryobj.c
@@ -271,7 +271,7 @@ hsw_result_to_gpr0(struct gl_context *ctx, struct brw_query_object *query,
                    GLenum pname, GLenum ptype)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    assert(query->bo);
    assert(pname != GL_QUERY_TARGET);
@@ -409,7 +409,7 @@ store_query_result_reg(struct brw_context *brw, struct brw_bo *bo,
                        uint32_t offset, GLenum ptype, uint32_t reg,
                        const bool pipelined)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
    uint32_t cmd_size = devinfo->ver >= 8 ? 4 : 3;
    uint32_t dwords = (ptype == GL_INT || ptype == GL_UNSIGNED_INT) ? 1 : 2;
    assert(devinfo->ver >= 6);
diff --git a/src/mesa/drivers/dri/i965/hsw_sol.c b/src/mesa/drivers/dri/i965/hsw_sol.c
index 38c6092d23d..5c8fc7fa198 100644
--- a/src/mesa/drivers/dri/i965/hsw_sol.c
+++ b/src/mesa/drivers/dri/i965/hsw_sol.c
@@ -162,7 +162,7 @@ hsw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw_obj->primitive_mode = mode;
 
@@ -197,7 +197,7 @@ hsw_pause_transform_feedback(struct gl_context *ctx,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->is_haswell) {
       /* Flush any drawing so that the counters have the right values. */
@@ -227,7 +227,7 @@ hsw_resume_transform_feedback(struct gl_context *ctx,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    if (devinfo->is_haswell) {
       /* Reload the SOL buffer offset registers. */