From 5bea69cdd6fa4fcdc53a213a6c20c9ef0b4e1922 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tapani=20P=C3=A4lli?= <tapani.palli@intel.com>
Date: Tue, 30 Jan 2024 11:21:27 +0200
Subject: [PATCH] intel/blorp: add a TODO note about stencil buffer resolve
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27355>
---
 src/intel/blorp/blorp_genX_exec.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 543595d5a31..cd395aa33b2 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1851,6 +1851,9 @@ blorp_emit_gfx8_hiz_op(struct blorp_batch *batch,
       blorp_emit_depth_stencil_config(batch, params);
    }
 
+   /* TODO - If we ever start using 3DSTATE_WM_HZ_OP::StencilBufferResolveEnable
+    * we need to implement required steps, flushes documented in Wa_1605967699.
+    */
    blorp_emit(batch, GENX(3DSTATE_WM_HZ_OP), hzp) {
       switch (params->hiz_op) {
       case ISL_AUX_OP_FAST_CLEAR: