diff --git a/src/amd/vulkan/meta/radv_meta_bufimage.c b/src/amd/vulkan/meta/radv_meta_bufimage.c index f6261d77c55..d4ef7117c8d 100644 --- a/src/amd/vulkan/meta/radv_meta_bufimage.c +++ b/src/amd/vulkan/meta/radv_meta_bufimage.c @@ -908,11 +908,22 @@ build_nir_cleari_r32g32b32_compute_shader(struct radv_device *dev) } static VkResult -radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) +create_cleari_r32g32b32_pipeline(struct radv_device *device, VkPipeline *pipeline) { VkResult result; nir_shader *cs = build_nir_cleari_r32g32b32_compute_shader(device); + result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.cleari_r32g32b32.img_p_layout, pipeline); + + ralloc_free(cs); + return result; +} + +static VkResult +radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) +{ + VkResult result; + const VkDescriptorSetLayoutBinding binding = { .binding = 0, .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, @@ -923,7 +934,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) result = radv_meta_create_descriptor_set_layout(device, 1, &binding, &device->meta_state.cleari_r32g32b32.img_ds_layout); if (result != VK_SUCCESS) - goto fail; + return result; const VkPushConstantRange pc_range = { .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, @@ -933,14 +944,9 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) result = radv_meta_create_pipeline_layout(device, &device->meta_state.cleari_r32g32b32.img_ds_layout, 1, &pc_range, &device->meta_state.cleari_r32g32b32.img_p_layout); if (result != VK_SUCCESS) - goto fail; + return result; - result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.cleari_r32g32b32.img_p_layout, - &device->meta_state.cleari_r32g32b32.pipeline); - -fail: - ralloc_free(cs); - return result; + return create_cleari_r32g32b32_pipeline(device, &device->meta_state.cleari_r32g32b32.pipeline); } static void