From 5876d7421641d5a9d0fd7e674d051019ed5702dc Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 22 Feb 2021 11:43:46 -0800 Subject: [PATCH] i965: Rename the rest of intel_* functions to brw_* Acked-by: Jason Ekstrand Part-of: --- src/mesa/drivers/dri/i965/brw_blorp.c | 10 +- src/mesa/drivers/dri/i965/brw_blorp.h | 6 +- src/mesa/drivers/dri/i965/brw_bufmgr.c | 2 +- src/mesa/drivers/dri/i965/brw_clear.c | 13 +- src/mesa/drivers/dri/i965/brw_context.c | 206 +++++----- src/mesa/drivers/dri/i965/brw_context.h | 12 +- src/mesa/drivers/dri/i965/brw_draw.c | 44 +-- .../drivers/dri/i965/brw_generate_mipmap.c | 2 +- src/mesa/drivers/dri/i965/brw_misc_state.c | 16 +- .../drivers/dri/i965/brw_object_purgeable.c | 34 +- src/mesa/drivers/dri/i965/brw_sync.c | 2 +- src/mesa/drivers/dri/i965/brw_wm.c | 2 +- .../drivers/dri/i965/brw_wm_surface_state.c | 6 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 2 +- src/mesa/drivers/dri/i965/genX_state_upload.c | 26 +- src/mesa/drivers/dri/i965/intel_batchbuffer.h | 2 +- src/mesa/drivers/dri/i965/intel_buffers.c | 4 +- src/mesa/drivers/dri/i965/intel_copy_image.c | 18 +- src/mesa/drivers/dri/i965/intel_fbo.c | 158 ++++---- src/mesa/drivers/dri/i965/intel_fbo.h | 22 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 52 +-- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 12 +- src/mesa/drivers/dri/i965/intel_pixel.c | 2 +- src/mesa/drivers/dri/i965/intel_pixel.h | 4 +- .../drivers/dri/i965/intel_pixel_bitmap.c | 6 +- src/mesa/drivers/dri/i965/intel_pixel_copy.c | 2 +- src/mesa/drivers/dri/i965/intel_pixel_draw.c | 4 +- src/mesa/drivers/dri/i965/intel_pixel_read.c | 36 +- src/mesa/drivers/dri/i965/intel_screen.c | 356 +++++++++--------- src/mesa/drivers/dri/i965/intel_screen.h | 2 +- src/mesa/drivers/dri/i965/intel_state.c | 6 +- src/mesa/drivers/dri/i965/intel_tex.c | 60 +-- src/mesa/drivers/dri/i965/intel_tex.h | 2 +- src/mesa/drivers/dri/i965/intel_tex_image.c | 160 ++++---- .../drivers/dri/i965/intel_tex_validate.c | 12 +- 35 files changed, 645 insertions(+), 658 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 2219988b205..1163679d6e4 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -607,7 +607,7 @@ try_blorp_blit(struct brw_context *brw, /* Sync up the state of window system buffers. We need to do this before * we go looking for the buffers. */ - intel_prepare_render(brw); + brw_prepare_render(brw); bool mirror_x, mirror_y; if (brw_meta_mirror_clip_and_scissor(ctx, read_fb, draw_fb, @@ -706,7 +706,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw, /* Sync up the state of window system buffers. We need to do this before * we go looking at the src renderbuffer's miptree. */ - intel_prepare_render(brw); + brw_prepare_render(brw); struct brw_mipmap_tree *src_mt = src_irb->mt; struct brw_mipmap_tree *dst_mt = intel_image->mt; @@ -1558,9 +1558,9 @@ brw_blorp_mcs_partial_resolve(struct brw_context *brw, * - 7.5.3.3 Hierarchical Depth Buffer Resolve */ void -intel_hiz_exec(struct brw_context *brw, struct brw_mipmap_tree *mt, - unsigned int level, unsigned int start_layer, - unsigned int num_layers, enum isl_aux_op op) +brw_hiz_exec(struct brw_context *brw, struct brw_mipmap_tree *mt, + unsigned int level, unsigned int start_layer, + unsigned int num_layers, enum isl_aux_op op) { assert(brw_miptree_level_has_hiz(mt, level)); assert(op != ISL_AUX_OP_NONE); diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 7f35b48bceb..b89db624b92 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -107,9 +107,9 @@ brw_blorp_mcs_partial_resolve(struct brw_context *brw, uint32_t start_layer, uint32_t num_layers); void -intel_hiz_exec(struct brw_context *brw, struct brw_mipmap_tree *mt, - unsigned int level, unsigned int start_layer, - unsigned int num_layers, enum isl_aux_op op); +brw_hiz_exec(struct brw_context *brw, struct brw_mipmap_tree *mt, + unsigned int level, unsigned int start_layer, + unsigned int num_layers, enum isl_aux_op op); void gen4_blorp_exec(struct blorp_batch *batch, const struct blorp_params *params); diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c index 65488c85201..74d0909c52a 100644 --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c @@ -1318,7 +1318,7 @@ void brw_bo_wait_rendering(struct brw_bo *bo) { /* We require a kernel recent enough for WAIT_IOCTL support. - * See intel_init_bufmgr() + * See brw_init_bufmgr() */ brw_bo_wait(bo, -1); } diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index cbb989d002f..4ea24b8a361 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -103,7 +103,7 @@ brw_fast_clear_depth(struct gl_context *ctx) struct brw_context *brw = brw_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; struct brw_renderbuffer *depth_irb = - intel_get_renderbuffer(fb, BUFFER_DEPTH); + brw_get_renderbuffer(fb, BUFFER_DEPTH); struct brw_mipmap_tree *mt = depth_irb->mt; struct gl_renderbuffer_attachment *depth_att = &fb->Attachment[BUFFER_DEPTH]; const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -207,8 +207,7 @@ brw_fast_clear_depth(struct gl_context *ctx) * Fortunately, few applications ever change their depth clear * value so this shouldn't happen often. */ - intel_hiz_exec(brw, mt, level, layer, 1, - ISL_AUX_OP_FULL_RESOLVE); + brw_hiz_exec(brw, mt, level, layer, 1, ISL_AUX_OP_FULL_RESOLVE); brw_miptree_set_aux_state(brw, mt, level, layer, 1, ISL_AUX_STATE_RESOLVED); } @@ -224,9 +223,9 @@ brw_fast_clear_depth(struct gl_context *ctx) depth_irb->mt_layer + a); if (aux_state != ISL_AUX_STATE_CLEAR) { - intel_hiz_exec(brw, mt, depth_irb->mt_level, - depth_irb->mt_layer + a, 1, - ISL_AUX_OP_FAST_CLEAR); + brw_hiz_exec(brw, mt, depth_irb->mt_level, + depth_irb->mt_layer + a, 1, + ISL_AUX_OP_FAST_CLEAR); } } @@ -254,7 +253,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) brw->front_buffer_dirty = true; } - intel_prepare_render(brw); + brw_prepare_render(brw); brw_workaround_depthstencil_alignment(brw, partial_clear ? 0 : mask); if (mask & BUFFER_BIT_DEPTH) { diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 3039aedea0c..fcf296e78a1 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -122,7 +122,7 @@ brw_get_renderer_string(const struct brw_screen *screen) } static const GLubyte * -intel_get_string(struct gl_context * ctx, GLenum name) +brw_get_string(struct gl_context * ctx, GLenum name) { const struct brw_context *const brw = brw_context(ctx); @@ -158,7 +158,7 @@ brw_set_background_context(struct gl_context *ctx, } static void -intel_viewport(struct gl_context *ctx) +brw_viewport(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); __DRIcontext *driContext = brw->driContext; @@ -172,20 +172,18 @@ intel_viewport(struct gl_context *ctx) } static void -intel_update_framebuffer(struct gl_context *ctx, - struct gl_framebuffer *fb) +brw_update_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) { struct brw_context *brw = brw_context(ctx); /* Quantize the derived default number of samples */ fb->DefaultGeometry._NumSamples = - intel_quantize_num_samples(brw->screen, - fb->DefaultGeometry.NumSamples); + brw_quantize_num_samples(brw->screen, fb->DefaultGeometry.NumSamples); } static void -intel_update_state(struct gl_context * ctx) +brw_update_state(struct gl_context * ctx) { GLuint new_state = ctx->NewState; struct brw_context *brw = brw_context(ctx); @@ -209,16 +207,16 @@ intel_update_state(struct gl_context * ctx) brw->polygon_front_bit = _mesa_polygon_get_front_bit(ctx); if (new_state & _NEW_BUFFERS) { - intel_update_framebuffer(ctx, ctx->DrawBuffer); + brw_update_framebuffer(ctx, ctx->DrawBuffer); if (ctx->DrawBuffer != ctx->ReadBuffer) - intel_update_framebuffer(ctx, ctx->ReadBuffer); + brw_update_framebuffer(ctx, ctx->ReadBuffer); } } #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer) static void -intel_flush_front(struct gl_context *ctx) +brw_flush_front(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); __DRIcontext *driContext = brw->driContext; @@ -236,12 +234,12 @@ intel_flush_front(struct gl_context *ctx) * performance. And no one cares about front-buffer render * performance. */ - intel_resolve_for_dri2_flush(brw, driDrawable); + brw_resolve_for_dri2_flush(brw, driDrawable); brw_batch_flush(brw); flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate); - /* We set the dirty bit in intel_prepare_render() if we're + /* We set the dirty bit in brw_prepare_render() if we're * front buffer rendering once we get there. */ brw->front_buffer_dirty = false; @@ -279,18 +277,18 @@ brw_display_shared_buffer(struct brw_context *brw) } static void -intel_glFlush(struct gl_context *ctx) +brw_glFlush(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); brw_batch_flush(brw); - intel_flush_front(ctx); + brw_flush_front(ctx); brw_display_shared_buffer(brw); brw->need_flush_throttle = true; } static void -intel_glEnable(struct gl_context *ctx, GLenum cap, GLboolean state) +brw_glEnable(struct gl_context *ctx, GLenum cap, GLboolean state) { struct brw_context *brw = brw_context(ctx); @@ -315,11 +313,11 @@ intel_glEnable(struct gl_context *ctx, GLenum cap, GLboolean state) } static void -intel_finish(struct gl_context * ctx) +brw_finish(struct gl_context * ctx) { struct brw_context *brw = brw_context(ctx); - intel_glFlush(ctx); + brw_glFlush(ctx); if (brw->batch.last_bo) brw_bo_wait_rendering(brw->batch.last_bo); @@ -341,13 +339,13 @@ brw_init_driver_functions(struct brw_context *brw, * This should go away with DRI3000. */ if (!brw->driContext->driScreenPriv->dri2.useInvalidate) - functions->Viewport = intel_viewport; + functions->Viewport = brw_viewport; - functions->Enable = intel_glEnable; - functions->Flush = intel_glFlush; - functions->Finish = intel_finish; - functions->GetString = intel_get_string; - functions->UpdateState = intel_update_state; + functions->Enable = brw_glEnable; + functions->Flush = brw_glFlush; + functions->Finish = brw_finish; + functions->GetString = brw_get_string; + functions->UpdateState = brw_update_state; brw_init_draw_functions(functions); intelInitTextureFuncs(functions); @@ -577,7 +575,7 @@ brw_initialize_context_constants(struct brw_context *brw) !can_do_mi_math_and_lrr(brw->screen); int max_samples; - const int *msaa_modes = intel_supported_msaa_modes(brw->screen); + const int *msaa_modes = brw_supported_msaa_modes(brw->screen); const int clamp_max_samples = driQueryOptioni(&brw->screen->optionCache, "clamp_max_samples"); @@ -1055,7 +1053,7 @@ brwCreateContext(gl_api api, /* Reinitialize the context point state. It depends on ctx->Const values. */ _mesa_init_point(ctx); - intel_fbo_init(brw); + brw_fbo_init(brw); brw_batch_init(brw); @@ -1315,8 +1313,7 @@ intelUnbindContext(__DRIcontext * driContextPriv) * finds out. */ static void -intel_gles3_srgb_workaround(struct brw_context *brw, - struct gl_framebuffer *fb) +brw_gles3_srgb_workaround(struct brw_context *brw, struct gl_framebuffer *fb) { struct gl_context *ctx = &brw->ctx; @@ -1327,7 +1324,7 @@ intel_gles3_srgb_workaround(struct brw_context *brw, struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer; /* Check if sRGB was specifically asked for. */ - struct brw_renderbuffer *irb = intel_get_renderbuffer(fb, i); + struct brw_renderbuffer *irb = brw_get_renderbuffer(fb, i); if (irb && irb->need_srgb) return; @@ -1372,14 +1369,14 @@ intelMakeCurrent(__DRIcontext * driContextPriv, * the format before the renderbuffer's miptree get's allocated, otherwise * the formats of the renderbuffer and its miptree will differ. */ - intel_gles3_srgb_workaround(brw, fb); - intel_gles3_srgb_workaround(brw, readFb); + brw_gles3_srgb_workaround(brw, fb); + brw_gles3_srgb_workaround(brw, readFb); /* If the context viewport hasn't been initialized, force a call out to * the loader to get buffers so we have a drawable size for the initial * viewport. */ if (!brw->ctx.ViewportInitialized) - intel_prepare_render(brw); + brw_prepare_render(brw); _mesa_make_current(ctx, fb, readFb); } else { @@ -1392,8 +1389,8 @@ intelMakeCurrent(__DRIcontext * driContextPriv, } void -intel_resolve_for_dri2_flush(struct brw_context *brw, - __DRIdrawable *drawable) +brw_resolve_for_dri2_flush(struct brw_context *brw, + __DRIdrawable *drawable) { const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -1416,7 +1413,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, }; for (int i = 0; i < 2; ++i) { - rb = intel_get_renderbuffer(fb, buffers[i]); + rb = brw_get_renderbuffer(fb, buffers[i]); if (rb == NULL || rb->mt == NULL) continue; if (rb->mt->surf.samples == 1) { @@ -1445,29 +1442,29 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, } static unsigned -intel_bits_per_pixel(const struct brw_renderbuffer *rb) +brw_bits_per_pixel(const struct brw_renderbuffer *rb) { - return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; + return _mesa_get_format_bytes(brw_rb_format(rb)) * 8; } static void -intel_query_dri2_buffers(struct brw_context *brw, - __DRIdrawable *drawable, - __DRIbuffer **buffers, - int *count); +brw_query_dri2_buffers(struct brw_context *brw, + __DRIdrawable *drawable, + __DRIbuffer **buffers, + int *count); static void -intel_process_dri2_buffer(struct brw_context *brw, - __DRIdrawable *drawable, - __DRIbuffer *buffer, - struct brw_renderbuffer *rb, - const char *buffer_name); +brw_process_dri2_buffer(struct brw_context *brw, + __DRIdrawable *drawable, + __DRIbuffer *buffer, + struct brw_renderbuffer *rb, + const char *buffer_name); static void -intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable); +brw_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable); static void -intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) +brw_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) { struct gl_framebuffer *fb = drawable->driverPrivate; struct brw_renderbuffer *rb; @@ -1483,7 +1480,7 @@ intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) if (INTEL_DEBUG & DEBUG_DRI) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); - intel_query_dri2_buffers(brw, drawable, &buffers, &count); + brw_query_dri2_buffers(brw, drawable, &buffers, &count); if (buffers == NULL) return; @@ -1491,17 +1488,17 @@ intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) for (int i = 0; i < count; i++) { switch (buffers[i].attachment) { case __DRI_BUFFER_FRONT_LEFT: - rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + rb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); region_name = "dri2 front buffer"; break; case __DRI_BUFFER_FAKE_FRONT_LEFT: - rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + rb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); region_name = "dri2 fake front buffer"; break; case __DRI_BUFFER_BACK_LEFT: - rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); + rb = brw_get_renderbuffer(fb, BUFFER_BACK_LEFT); region_name = "dri2 back buffer"; break; @@ -1517,13 +1514,13 @@ intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) return; } - intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name); + brw_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name); } } void -intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) +brw_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) { struct brw_context *brw = context->driverPrivate; __DRIscreen *dri_screen = brw->screen->driScrnPriv; @@ -1537,9 +1534,9 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); if (dri_screen->image.loader) - intel_update_image_buffers(brw, drawable); + brw_update_image_buffers(brw, drawable); else - intel_update_dri2_buffers(brw, drawable); + brw_update_dri2_buffers(brw, drawable); driUpdateFramebufferSize(&brw->ctx, drawable); } @@ -1549,7 +1546,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) * state is required. */ void -intel_prepare_render(struct brw_context *brw) +brw_prepare_render(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; __DRIcontext *driContext = brw->driContext; @@ -1558,14 +1555,14 @@ intel_prepare_render(struct brw_context *brw) drawable = driContext->driDrawablePriv; if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { if (drawable->lastStamp != drawable->dri2.stamp) - intel_update_renderbuffers(driContext, drawable); + brw_update_renderbuffers(driContext, drawable); driContext->dri2.draw_stamp = drawable->dri2.stamp; } drawable = driContext->driReadablePriv; if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { if (drawable->lastStamp != drawable->dri2.stamp) - intel_update_renderbuffers(driContext, drawable); + brw_update_renderbuffers(driContext, drawable); driContext->dri2.read_stamp = drawable->dri2.stamp; } @@ -1591,21 +1588,21 @@ intel_prepare_render(struct brw_context *brw) * attached to the drawable's framebuffer. Then request the buffers with * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). * - * This is called from intel_update_renderbuffers(). + * This is called from brw_update_renderbuffers(). * * \param drawable Drawable whose buffers are queried. * \param buffers [out] List of buffers returned by DRI2 query. * \param buffer_count [out] Number of buffers returned. * - * \see intel_update_renderbuffers() + * \see brw_update_renderbuffers() * \see DRI2GetBuffers() * \see DRI2GetBuffersWithFormat() */ static void -intel_query_dri2_buffers(struct brw_context *brw, - __DRIdrawable *drawable, - __DRIbuffer **buffers, - int *buffer_count) +brw_query_dri2_buffers(struct brw_context *brw, + __DRIdrawable *drawable, + __DRIbuffer **buffers, + int *buffer_count) { __DRIscreen *dri_screen = brw->screen->driScrnPriv; struct gl_framebuffer *fb = drawable->driverPrivate; @@ -1615,8 +1612,8 @@ intel_query_dri2_buffers(struct brw_context *brw, struct brw_renderbuffer *front_rb; struct brw_renderbuffer *back_rb; - front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); - back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); + front_rb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + back_rb = brw_get_renderbuffer(fb, BUFFER_BACK_LEFT); memset(attachments, 0, sizeof(attachments)); if ((_mesa_is_front_buffer_drawing(fb) || @@ -1629,10 +1626,10 @@ intel_query_dri2_buffers(struct brw_context *brw, * real front buffer. */ brw_batch_flush(brw); - intel_flush_front(&brw->ctx); + brw_flush_front(&brw->ctx); attachments[i++] = __DRI_BUFFER_FRONT_LEFT; - attachments[i++] = intel_bits_per_pixel(front_rb); + attachments[i++] = brw_bits_per_pixel(front_rb); } else if (front_rb && brw->front_buffer_dirty) { /* We have pending front buffer rendering, but we aren't querying for a * front buffer. If the front buffer we have is a fake front buffer, @@ -1641,12 +1638,12 @@ intel_query_dri2_buffers(struct brw_context *brw, * landed in the real front buffer. */ brw_batch_flush(brw); - intel_flush_front(&brw->ctx); + brw_flush_front(&brw->ctx); } if (back_rb) { attachments[i++] = __DRI_BUFFER_BACK_LEFT; - attachments[i++] = intel_bits_per_pixel(back_rb); + attachments[i++] = brw_bits_per_pixel(back_rb); } assert(i <= ARRAY_SIZE(attachments)); @@ -1663,7 +1660,7 @@ intel_query_dri2_buffers(struct brw_context *brw, /** * \brief Assign a DRI buffer's DRM region to a renderbuffer. * - * This is called from intel_update_renderbuffers(). + * This is called from brw_update_renderbuffers(). * * \par Note: * DRI buffers whose attachment point is DRI2BufferStencil or @@ -1672,14 +1669,14 @@ intel_query_dri2_buffers(struct brw_context *brw, * \param buffer_name is a human readable name, such as "dri2 front buffer", * that is passed to brw_bo_gem_create_from_name(). * - * \see intel_update_renderbuffers() + * \see brw_update_renderbuffers() */ static void -intel_process_dri2_buffer(struct brw_context *brw, - __DRIdrawable *drawable, - __DRIbuffer *buffer, - struct brw_renderbuffer *rb, - const char *buffer_name) +brw_process_dri2_buffer(struct brw_context *brw, + __DRIdrawable *drawable, + __DRIbuffer *buffer, + struct brw_renderbuffer *rb, + const char *buffer_name) { struct gl_framebuffer *fb = drawable->driverPrivate; struct brw_bo *bo; @@ -1702,7 +1699,7 @@ intel_process_dri2_buffer(struct brw_context *brw, uint32_t old_name = 0; if (last_mt) { /* The bo already has a name because the miptree was created by a - * previous call to intel_process_dri2_buffer(). If a bo already has a + * previous call to brw_process_dri2_buffer(). If a bo already has a * name, then brw_bo_flink() is a low-cost getter. It does not * create a new name. */ @@ -1737,7 +1734,7 @@ intel_process_dri2_buffer(struct brw_context *brw, struct brw_mipmap_tree *mt = brw_miptree_create_for_bo(brw, bo, - intel_rb_format(rb), + brw_rb_format(rb), 0, drawable->w, drawable->h, @@ -1756,7 +1753,7 @@ intel_process_dri2_buffer(struct brw_context *brw, */ bo->cache_coherent = false; - if (!intel_update_winsys_renderbuffer_miptree(brw, rb, mt, + if (!brw_update_winsys_renderbuffer_miptree(brw, rb, mt, drawable->w, drawable->h, buffer->pitch)) { brw_bo_unreference(bo); @@ -1783,21 +1780,21 @@ intel_process_dri2_buffer(struct brw_context *brw, * attached to the drawable's framebuffer. Then request the buffers from * the image loader * - * This is called from intel_update_renderbuffers(). + * This is called from brw_update_renderbuffers(). * * \param drawable Drawable whose buffers are queried. * \param buffers [out] List of buffers returned by DRI2 query. * \param buffer_count [out] Number of buffers returned. * - * \see intel_update_renderbuffers() + * \see brw_update_renderbuffers() */ static void -intel_update_image_buffer(struct brw_context *intel, - __DRIdrawable *drawable, - struct brw_renderbuffer *rb, - __DRIimage *buffer, - enum __DRIimageBufferMask buffer_type) +brw_update_image_buffer(struct brw_context *intel, + __DRIdrawable *drawable, + struct brw_renderbuffer *rb, + __DRIimage *buffer, + enum __DRIimageBufferMask buffer_type) { struct gl_framebuffer *fb = drawable->driverPrivate; @@ -1832,12 +1829,12 @@ intel_update_image_buffer(struct brw_context *intel, struct brw_mipmap_tree *mt = brw_miptree_create_for_dri_image(intel, buffer, GL_TEXTURE_2D, - intel_rb_format(rb), + brw_rb_format(rb), allow_internal_aux); if (!mt) return; - if (!intel_update_winsys_renderbuffer_miptree(intel, rb, mt, + if (!brw_update_winsys_renderbuffer_miptree(intel, rb, mt, buffer->width, buffer->height, buffer->pitch)) { brw_miptree_release(&mt); @@ -1881,7 +1878,7 @@ intel_update_image_buffer(struct brw_context *intel, } static void -intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) +brw_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) { struct gl_framebuffer *fb = drawable->driverPrivate; __DRIscreen *dri_screen = brw->screen->driScrnPriv; @@ -1892,13 +1889,13 @@ intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) uint32_t buffer_mask = 0; int ret; - front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); - back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); + front_rb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + back_rb = brw_get_renderbuffer(fb, BUFFER_BACK_LEFT); if (back_rb) - format = intel_rb_format(back_rb); + format = brw_rb_format(back_rb); else if (front_rb) - format = intel_rb_format(front_rb); + format = brw_rb_format(front_rb); else return; @@ -1922,32 +1919,23 @@ intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) { drawable->w = images.front->width; drawable->h = images.front->height; - intel_update_image_buffer(brw, - drawable, - front_rb, - images.front, - __DRI_IMAGE_BUFFER_FRONT); + brw_update_image_buffer(brw, drawable, front_rb, images.front, + __DRI_IMAGE_BUFFER_FRONT); } if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) { drawable->w = images.back->width; drawable->h = images.back->height; - intel_update_image_buffer(brw, - drawable, - back_rb, - images.back, - __DRI_IMAGE_BUFFER_BACK); + brw_update_image_buffer(brw, drawable, back_rb, images.back, + __DRI_IMAGE_BUFFER_BACK); } if (images.image_mask & __DRI_IMAGE_BUFFER_SHARED) { assert(images.image_mask == __DRI_IMAGE_BUFFER_SHARED); drawable->w = images.back->width; drawable->h = images.back->height; - intel_update_image_buffer(brw, - drawable, - back_rb, - images.back, - __DRI_IMAGE_BUFFER_SHARED); + brw_update_image_buffer(brw, drawable, back_rb, images.back, + __DRI_IMAGE_BUFFER_SHARED); brw->is_shared_buffer_bound = true; } else { brw->is_shared_buffer_bound = false; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 5de6503d96b..2d25b77ad1d 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1269,9 +1269,9 @@ enum { DRI_CONF_BO_REUSE_ALL }; -void intel_update_renderbuffers(__DRIcontext *context, +void brw_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable); -void intel_prepare_render(struct brw_context *brw); +void brw_prepare_render(struct brw_context *brw); void gen9_apply_single_tex_astc5x5_wa(struct brw_context *brw, mesa_format format, @@ -1280,7 +1280,7 @@ void gen9_apply_single_tex_astc5x5_wa(struct brw_context *brw, void brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering, bool *draw_aux_buffer_disabled); -void intel_resolve_for_dri2_flush(struct brw_context *brw, +void brw_resolve_for_dri2_flush(struct brw_context *brw, __DRIdrawable *drawable); GLboolean brwCreateContext(gl_api api, @@ -1437,9 +1437,9 @@ void brw_init_performance_queries(struct brw_context *brw); extern void intelInitExtensions(struct gl_context *ctx); /* intel_state.c */ -extern int intel_translate_shadow_compare_func(GLenum func); -extern int intel_translate_compare_func(GLenum func); -extern int intel_translate_stencil_op(GLenum op); +extern int brw_translate_shadow_compare_func(GLenum func); +extern int brw_translate_compare_func(GLenum func); +extern int brw_translate_stencil_op(GLenum op); /* brw_sync.c */ void brw_init_syncobj_functions(struct dd_function_table *functions); diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index ddb99e63128..e1b4a9c0fc1 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -376,11 +376,11 @@ brw_merge_inputs(struct brw_context *brw) * incorrect pixels. */ static bool -intel_disable_rb_aux_buffer(struct brw_context *brw, - bool *draw_aux_buffer_disabled, - struct brw_mipmap_tree *tex_mt, - unsigned min_level, unsigned num_levels, - const char *usage) +brw_disable_rb_aux_buffer(struct brw_context *brw, + bool *draw_aux_buffer_disabled, + struct brw_mipmap_tree *tex_mt, + unsigned min_level, unsigned num_levels, + const char *usage) { const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; bool found = false; @@ -560,9 +560,9 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering, } if (rendering) { - intel_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled, - tex_obj->mt, min_level, num_levels, - "for sampling"); + brw_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled, + tex_obj->mt, min_level, num_levels, + "for sampling"); } brw_miptree_prepare_texture(brw, tex_obj->mt, view_format, @@ -588,7 +588,7 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering, if (tex_obj->base.StencilSampling || tex_obj->mt->format == MESA_FORMAT_S_UINT8) { - intel_update_r8stencil(brw, tex_obj->mt); + brw_update_r8stencil(brw, tex_obj->mt); } if (brw_miptree_has_etc_shadow(brw, tex_obj->mt) && @@ -609,9 +609,9 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering, if (tex_obj && tex_obj->mt) { if (rendering) { - intel_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled, - tex_obj->mt, 0, ~0, - "as a shader image"); + brw_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled, + tex_obj->mt, 0, ~0, + "as a shader image"); } brw_miptree_prepare_image(brw, tex_obj->mt); @@ -631,7 +631,7 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, struct brw_renderbuffer *depth_irb; /* Resolve the depth buffer's HiZ buffer. */ - depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); + depth_irb = brw_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); if (depth_irb && depth_irb->mt) { brw_miptree_prepare_depth(brw, depth_irb->mt, depth_irb->mt_level, @@ -672,7 +672,7 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, continue; mesa_format mesa_format = - _mesa_get_render_format(ctx, intel_rb_format(irb)); + _mesa_get_render_format(ctx, brw_rb_format(irb)); enum isl_format isl_format = brw_isl_format_for_mesa_format(mesa_format); bool blend_enabled = ctx->Color.BlendEnabled & (1 << i); enum isl_aux_usage aux_usage = @@ -715,13 +715,13 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) struct gl_framebuffer *fb = ctx->DrawBuffer; struct brw_renderbuffer *front_irb = NULL; - struct brw_renderbuffer *back_irb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); - struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct brw_renderbuffer *back_irb = brw_get_renderbuffer(fb, BUFFER_BACK_LEFT); + struct brw_renderbuffer *depth_irb = brw_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = brw_get_renderbuffer(fb, BUFFER_STENCIL); struct gl_renderbuffer_attachment *depth_att = &fb->Attachment[BUFFER_DEPTH]; if (_mesa_is_front_buffer_drawing(fb)) - front_irb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + front_irb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); if (front_irb) front_irb->need_downsample = true; @@ -763,7 +763,7 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) continue; mesa_format mesa_format = - _mesa_get_render_format(ctx, intel_rb_format(irb)); + _mesa_get_render_format(ctx, brw_rb_format(irb)); enum isl_format isl_format = brw_isl_format_for_mesa_format(mesa_format); enum isl_aux_usage aux_usage = brw->draw_aux_usage[i]; @@ -804,9 +804,9 @@ brw_postdraw_reconcile_align_wa_slices(struct brw_context *brw) struct gl_framebuffer *fb = ctx->DrawBuffer; struct brw_renderbuffer *depth_irb = - intel_get_renderbuffer(fb, BUFFER_DEPTH); + brw_get_renderbuffer(fb, BUFFER_DEPTH); struct brw_renderbuffer *stencil_irb = - intel_get_renderbuffer(fb, BUFFER_STENCIL); + brw_get_renderbuffer(fb, BUFFER_STENCIL); if (depth_irb && depth_irb->align_wa_mt) brw_renderbuffer_move_temp_back(brw, depth_irb); @@ -861,7 +861,7 @@ brw_prepare_drawing(struct gl_context *ctx, brw->vs.base.sampler_count = util_last_bit(ctx->VertexProgram._Current->info.textures_used); - intel_prepare_render(brw); + brw_prepare_render(brw); /* This workaround has to happen outside of brw_upload_render_state() * because it may flush the batchbuffer for a blit, affecting the state diff --git a/src/mesa/drivers/dri/i965/brw_generate_mipmap.c b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c index 5f6cd1acf40..b68a2393080 100644 --- a/src/mesa/drivers/dri/i965/brw_generate_mipmap.c +++ b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c @@ -74,7 +74,7 @@ brw_generate_mipmap(struct gl_context *ctx, GLenum target, * * After this, we'll have all mipmap levels in one resource. */ - intel_finalize_mipmap_tree(brw, tex_obj); + brw_finalize_mipmap_tree(brw, tex_obj); } struct brw_mipmap_tree *mt = intel_obj->mt; diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 4f933e19458..233c9416918 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -105,14 +105,14 @@ brw_depthbuffer_format(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct brw_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *drb = brw_get_renderbuffer(fb, BUFFER_DEPTH); struct brw_renderbuffer *srb; if (!drb && - (srb = intel_get_renderbuffer(fb, BUFFER_STENCIL)) && + (srb = brw_get_renderbuffer(fb, BUFFER_STENCIL)) && !srb->mt->stencil_mt && - (intel_rb_format(srb) == MESA_FORMAT_Z24_UNORM_S8_UINT || - intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_S8X24_UINT)) { + (brw_rb_format(srb) == MESA_FORMAT_Z24_UNORM_S8_UINT || + brw_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_S8X24_UINT)) { drb = srb; } @@ -201,8 +201,8 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; - struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct brw_renderbuffer *depth_irb = brw_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = brw_get_renderbuffer(fb, BUFFER_STENCIL); struct brw_mipmap_tree *depth_mt = NULL; bool invalidate_depth = clear_mask & BUFFER_BIT_DEPTH; bool invalidate_stencil = clear_mask & BUFFER_BIT_STENCIL; @@ -325,8 +325,8 @@ brw_emit_depthbuffer(struct brw_context *brw) struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; /* _NEW_BUFFERS */ - struct brw_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); - struct brw_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct brw_renderbuffer *depth_irb = brw_get_renderbuffer(fb, BUFFER_DEPTH); + struct brw_renderbuffer *stencil_irb = brw_get_renderbuffer(fb, BUFFER_STENCIL); struct brw_mipmap_tree *depth_mt = brw_renderbuffer_get_mt(depth_irb); struct brw_mipmap_tree *stencil_mt = get_stencil_miptree(stencil_irb); diff --git a/src/mesa/drivers/dri/i965/brw_object_purgeable.c b/src/mesa/drivers/dri/i965/brw_object_purgeable.c index 4989c23b69c..29890832526 100644 --- a/src/mesa/drivers/dri/i965/brw_object_purgeable.c +++ b/src/mesa/drivers/dri/i965/brw_object_purgeable.c @@ -37,7 +37,7 @@ #include "intel_mipmap_tree.h" static GLenum -intel_buffer_purgeable(struct brw_bo *buffer) +brw_buffer_purgeable(struct brw_bo *buffer) { int retained = 0; @@ -55,13 +55,13 @@ brw_buffer_object_purgeable(struct gl_context * ctx, struct brw_buffer_object *intel_obj = brw_buffer_object(obj); if (intel_obj->buffer != NULL) - return intel_buffer_purgeable(intel_obj->buffer); + return brw_buffer_purgeable(intel_obj->buffer); if (option == GL_RELEASED_APPLE) { return GL_RELEASED_APPLE; } else { /* XXX Create the buffer and madvise(MADV_DONTNEED)? */ - return intel_buffer_purgeable(intel_obj->buffer); + return brw_buffer_purgeable(intel_obj->buffer); } } @@ -79,13 +79,13 @@ brw_texture_object_purgeable(struct gl_context * ctx, if (intel->mt == NULL || intel->mt->bo == NULL) return GL_RELEASED_APPLE; - return intel_buffer_purgeable(intel->mt->bo); + return brw_buffer_purgeable(intel->mt->bo); } static GLenum -intel_render_object_purgeable(struct gl_context * ctx, - struct gl_renderbuffer *obj, - GLenum option) +brw_render_object_purgeable(struct gl_context * ctx, + struct gl_renderbuffer *obj, + GLenum option) { struct brw_renderbuffer *intel; @@ -96,11 +96,11 @@ intel_render_object_purgeable(struct gl_context * ctx, if (intel->mt == NULL) return GL_RELEASED_APPLE; - return intel_buffer_purgeable(intel->mt->bo); + return brw_buffer_purgeable(intel->mt->bo); } static int -intel_bo_unpurgeable(struct brw_bo *buffer) +brw_bo_unpurgeable(struct brw_bo *buffer) { int retained; @@ -123,7 +123,7 @@ brw_buffer_object_unpurgeable(struct gl_context * ctx, if (!intel->buffer) return GL_UNDEFINED_APPLE; - if (option == GL_UNDEFINED_APPLE || !intel_bo_unpurgeable(intel->buffer)) { + if (option == GL_UNDEFINED_APPLE || !brw_bo_unpurgeable(intel->buffer)) { brw_bo_unreference(intel->buffer); intel->buffer = NULL; return GL_UNDEFINED_APPLE; @@ -145,7 +145,7 @@ brw_texture_object_unpurgeable(struct gl_context * ctx, if (intel->mt == NULL || intel->mt->bo == NULL) return GL_UNDEFINED_APPLE; - if (option == GL_UNDEFINED_APPLE || !intel_bo_unpurgeable(intel->mt->bo)) { + if (option == GL_UNDEFINED_APPLE || !brw_bo_unpurgeable(intel->mt->bo)) { brw_miptree_release(&intel->mt); return GL_UNDEFINED_APPLE; } @@ -154,9 +154,9 @@ brw_texture_object_unpurgeable(struct gl_context * ctx, } static GLenum -intel_render_object_unpurgeable(struct gl_context * ctx, - struct gl_renderbuffer *obj, - GLenum option) +brw_render_object_unpurgeable(struct gl_context * ctx, + struct gl_renderbuffer *obj, + GLenum option) { struct brw_renderbuffer *intel; @@ -166,7 +166,7 @@ intel_render_object_unpurgeable(struct gl_context * ctx, if (intel->mt == NULL) return GL_UNDEFINED_APPLE; - if (option == GL_UNDEFINED_APPLE || !intel_bo_unpurgeable(intel->mt->bo)) { + if (option == GL_UNDEFINED_APPLE || !brw_bo_unpurgeable(intel->mt->bo)) { brw_miptree_release(&intel->mt); return GL_UNDEFINED_APPLE; } @@ -179,9 +179,9 @@ brw_init_object_purgeable_functions(struct dd_function_table *functions) { functions->BufferObjectPurgeable = brw_buffer_object_purgeable; functions->TextureObjectPurgeable = brw_texture_object_purgeable; - functions->RenderObjectPurgeable = intel_render_object_purgeable; + functions->RenderObjectPurgeable = brw_render_object_purgeable; functions->BufferObjectUnpurgeable = brw_buffer_object_unpurgeable; functions->TextureObjectUnpurgeable = brw_texture_object_unpurgeable; - functions->RenderObjectUnpurgeable = intel_render_object_unpurgeable; + functions->RenderObjectUnpurgeable = brw_render_object_unpurgeable; } diff --git a/src/mesa/drivers/dri/i965/brw_sync.c b/src/mesa/drivers/dri/i965/brw_sync.c index d0633a9860d..d6dc68fc895 100644 --- a/src/mesa/drivers/dri/i965/brw_sync.c +++ b/src/mesa/drivers/dri/i965/brw_sync.c @@ -138,7 +138,7 @@ brw_fence_insert_locked(struct brw_context *brw, struct brw_fence *fence) * compositor may read the incomplete framebuffer instead. */ if (driDrawable) - intel_resolve_for_dri2_flush(brw, driDrawable); + brw_resolve_for_dri2_flush(brw, driDrawable); brw_emit_mi_flush(brw); switch (fence->type) { diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 7357b14a351..90a75aac827 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -398,7 +398,7 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key) */ if (devinfo->gen < 6) { struct brw_renderbuffer *depth_irb = - intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); + brw_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* _NEW_COLOR */ if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) { diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index f7043d7b701..0a6c4c515d4 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -238,7 +238,7 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, assert(brw_render_target_supported(brw, rb)); - mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); + mesa_format rb_format = _mesa_get_render_format(ctx, brw_rb_format(irb)); if (unlikely(!brw->mesa_format_supports_render[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", __func__, _mesa_get_format_name(rb_format)); @@ -915,7 +915,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw, enum isl_format format; uint32_t offset; /* _NEW_BUFFERS */ - mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); + mesa_format rb_format = _mesa_get_render_format(ctx, brw_rb_format(irb)); /* BRW_NEW_FS_PROG_DATA */ if (rb->TexImage && !devinfo->has_surface_tile_offset) { @@ -1088,7 +1088,7 @@ update_renderbuffer_read_surfaces(struct brw_context *brw) if (irb) { const enum isl_format format = brw->mesa_to_isl_render_format[ - _mesa_get_render_format(ctx, intel_rb_format(irb))]; + _mesa_get_render_format(ctx, brw_rb_format(irb))]; assert(isl_format_supports_sampling(&brw->screen->devinfo, format)); diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index cb3b630e0ea..5bc07665814 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -49,7 +49,7 @@ pma_fix_enable(const struct brw_context *brw) brw_wm_prog_data(brw->wm.base.prog_data); /* _NEW_BUFFERS */ struct brw_renderbuffer *depth_irb = - intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); + brw_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* 3DSTATE_WM::ForceThreadDispatch is never used. */ const bool wm_force_thread_dispatch = false; diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 2dd71c4b506..db7ed9dd506 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -1177,7 +1177,7 @@ set_depth_stencil_bits(struct brw_context *brw, DEPTH_STENCIL_GENXML *ds) /* _NEW_BUFFERS */ struct brw_renderbuffer *depth_irb = - intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); + brw_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); /* _NEW_DEPTH */ struct gl_depthbuffer_attrib *depth = &ctx->Depth; @@ -1189,7 +1189,7 @@ set_depth_stencil_bits(struct brw_context *brw, DEPTH_STENCIL_GENXML *ds) if (depth->Test && depth_irb) { ds->DepthTestEnable = true; ds->DepthBufferWriteEnable = brw_depth_writes_enabled(brw); - ds->DepthTestFunction = intel_translate_compare_func(depth->Func); + ds->DepthTestFunction = brw_translate_compare_func(depth->Func); } if (brw->stencil_enabled) { @@ -1198,13 +1198,13 @@ set_depth_stencil_bits(struct brw_context *brw, DEPTH_STENCIL_GENXML *ds) ds->StencilTestMask = stencil->ValueMask[0] & 0xff; ds->StencilTestFunction = - intel_translate_compare_func(stencil->Function[0]); + brw_translate_compare_func(stencil->Function[0]); ds->StencilFailOp = - intel_translate_stencil_op(stencil->FailFunc[0]); + brw_translate_stencil_op(stencil->FailFunc[0]); ds->StencilPassDepthPassOp = - intel_translate_stencil_op(stencil->ZPassFunc[0]); + brw_translate_stencil_op(stencil->ZPassFunc[0]); ds->StencilPassDepthFailOp = - intel_translate_stencil_op(stencil->ZFailFunc[0]); + brw_translate_stencil_op(stencil->ZFailFunc[0]); ds->StencilBufferWriteEnable = brw->stencil_write_enabled; @@ -1214,13 +1214,13 @@ set_depth_stencil_bits(struct brw_context *brw, DEPTH_STENCIL_GENXML *ds) ds->BackfaceStencilTestMask = stencil->ValueMask[b] & 0xff; ds->BackfaceStencilTestFunction = - intel_translate_compare_func(stencil->Function[b]); + brw_translate_compare_func(stencil->Function[b]); ds->BackfaceStencilFailOp = - intel_translate_stencil_op(stencil->FailFunc[b]); + brw_translate_stencil_op(stencil->FailFunc[b]); ds->BackfaceStencilPassDepthPassOp = - intel_translate_stencil_op(stencil->ZPassFunc[b]); + brw_translate_stencil_op(stencil->ZPassFunc[b]); ds->BackfaceStencilPassDepthFailOp = - intel_translate_stencil_op(stencil->ZFailFunc[b]); + brw_translate_stencil_op(stencil->ZFailFunc[b]); } #if GEN_GEN <= 5 || GEN_GEN >= 9 @@ -2979,7 +2979,7 @@ genX(upload_blend_state)(struct brw_context *brw) if (ctx->Color.AlphaEnabled) { blend.AlphaTestEnable = true; blend.AlphaTestFunction = - intel_translate_compare_func(ctx->Color.AlphaFunc); + brw_translate_compare_func(ctx->Color.AlphaFunc); } if (ctx->Color.DitherFlag) { @@ -3369,7 +3369,7 @@ genX(upload_color_calc_state)(struct brw_context *brw) ctx->DrawBuffer->_NumColorDrawBuffers <= 1) { cc.AlphaTestEnable = true; cc.AlphaTestFunction = - intel_translate_compare_func(ctx->Color.AlphaFunc); + brw_translate_compare_func(ctx->Color.AlphaFunc); } cc.ColorDitherEnable = ctx->Color.DitherFlag; @@ -5300,7 +5300,7 @@ genX(update_sampler_state)(struct brw_context *brw, samp_st.ShadowFunction = sampler->Attrib.CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB ? - intel_translate_shadow_compare_func(sampler->Attrib.CompareFunc) : 0; + brw_translate_shadow_compare_func(sampler->Attrib.CompareFunc) : 0; #if GEN_GEN >= 7 /* Set shadow function. */ diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index 02014ceed49..014664267d4 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -41,7 +41,7 @@ void brw_batch_maybe_noop(struct brw_context *brw); /* Unlike bmBufferData, this currently requires the buffer be mapped. * Consider it a convenience function wrapping multple - * intel_buffer_dword() calls. + * brw_buffer_dword() calls. */ void brw_batch_data(struct brw_context *brw, const void *data, GLuint bytes); diff --git a/src/mesa/drivers/dri/i965/intel_buffers.c b/src/mesa/drivers/dri/i965/intel_buffers.c index dae56e3362c..75f37d2d814 100644 --- a/src/mesa/drivers/dri/i965/intel_buffers.c +++ b/src/mesa/drivers/dri/i965/intel_buffers.c @@ -43,7 +43,7 @@ intelDrawBuffer(struct gl_context *ctx) * (including the fake front) before we start rendering again. */ dri2InvalidateDrawable(brw->driContext->driDrawablePriv); - intel_prepare_render(brw); + brw_prepare_render(brw); } } @@ -59,7 +59,7 @@ intelReadBuffer(struct gl_context * ctx, GLenum mode) * (including the fake front) before we start reading again. */ dri2InvalidateDrawable(brw->driContext->driReadablePriv); - intel_prepare_render(brw); + brw_prepare_render(brw); } } diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c index 7f43eeb76e2..6b57e36ed5e 100644 --- a/src/mesa/drivers/dri/i965/intel_copy_image.c +++ b/src/mesa/drivers/dri/i965/intel_copy_image.c @@ -66,14 +66,14 @@ copy_miptrees(struct brw_context *brw, } static void -intel_copy_image_sub_data(struct gl_context *ctx, - struct gl_texture_image *src_image, - struct gl_renderbuffer *src_renderbuffer, - int src_x, int src_y, int src_z, - struct gl_texture_image *dst_image, - struct gl_renderbuffer *dst_renderbuffer, - int dst_x, int dst_y, int dst_z, - int src_width, int src_height) +brw_copy_image_sub_data(struct gl_context *ctx, + struct gl_texture_image *src_image, + struct gl_renderbuffer *src_renderbuffer, + int src_x, int src_y, int src_z, + struct gl_texture_image *dst_image, + struct gl_renderbuffer *dst_renderbuffer, + int dst_x, int dst_y, int dst_z, + int src_width, int src_height) { struct brw_context *brw = brw_context(ctx); struct brw_mipmap_tree *src_mt, *dst_mt; @@ -135,5 +135,5 @@ intel_copy_image_sub_data(struct gl_context *ctx, void intelInitCopyImageFuncs(struct dd_function_table *functions) { - functions->CopyImageSubData = intel_copy_image_sub_data; + functions->CopyImageSubData = brw_copy_image_sub_data; } diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index f200238b87f..95e34462f99 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -55,7 +55,7 @@ /** Called by gl_renderbuffer::Delete() */ static void -intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) +brw_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) { struct brw_renderbuffer *irb = brw_renderbuffer(rb); @@ -100,13 +100,13 @@ brw_renderbuffer_upsample(struct brw_context *brw, * \see dd_function_table::MapRenderbuffer */ static void -intel_map_renderbuffer(struct gl_context *ctx, - struct gl_renderbuffer *rb, - GLuint x, GLuint y, GLuint w, GLuint h, - GLbitfield mode, - GLubyte **out_map, - GLint *out_stride, - bool flip_y) +brw_map_renderbuffer(struct gl_context *ctx, + struct gl_renderbuffer *rb, + GLuint x, GLuint y, GLuint w, GLuint h, + GLbitfield mode, + GLubyte **out_map, + GLint *out_stride, + bool flip_y) { struct brw_context *brw = brw_context(ctx); struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb; @@ -124,7 +124,7 @@ intel_map_renderbuffer(struct gl_context *ctx, return; } - intel_prepare_render(brw); + brw_prepare_render(brw); /* The MapRenderbuffer API should always return a single-sampled mapping. * The case we are asked to map multisampled RBs is in glReadPixels() (or @@ -192,8 +192,7 @@ fail: * \see dd_function_table::UnmapRenderbuffer */ static void -intel_unmap_renderbuffer(struct gl_context *ctx, - struct gl_renderbuffer *rb) +brw_unmap_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) { struct brw_context *brw = brw_context(ctx); struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb; @@ -231,9 +230,9 @@ intel_unmap_renderbuffer(struct gl_context *ctx, * Round up the requested multisample count to the next supported sample size. */ unsigned -intel_quantize_num_samples(struct brw_screen *intel, unsigned num_samples) +brw_quantize_num_samples(struct brw_screen *intel, unsigned num_samples) { - const int *msaa_modes = intel_supported_msaa_modes(intel); + const int *msaa_modes = brw_supported_msaa_modes(intel); int quantized_samples = 0; for (int i = 0; msaa_modes[i] != -1; ++i) { @@ -279,9 +278,10 @@ brw_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat) } static GLboolean -intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, - GLenum internalFormat, - GLuint width, GLuint height) +brw_alloc_private_renderbuffer_storage(struct gl_context *ctx, + struct gl_renderbuffer *rb, + GLenum internalFormat, + GLuint width, GLuint height) { struct brw_context *brw = brw_context(ctx); struct brw_screen *screen = brw->screen; @@ -289,7 +289,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend assert(rb->Format != MESA_FORMAT_NONE); - rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples); + rb->NumSamples = brw_quantize_num_samples(screen, rb->NumSamples); rb->NumStorageSamples = rb->NumSamples; rb->Width = width; rb->Height = height; @@ -320,12 +320,12 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend * storage for a user-created renderbuffer. */ static GLboolean -intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, +brw_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, GLenum internalFormat, GLuint width, GLuint height) { rb->Format = brw_renderbuffer_format(ctx, internalFormat); - return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height); + return brw_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height); } static mesa_format @@ -358,9 +358,9 @@ fallback_rgbx_to_rgba(struct brw_screen *screen, struct gl_renderbuffer *rb, } static void -intel_image_target_renderbuffer_storage(struct gl_context *ctx, - struct gl_renderbuffer *rb, - void *image_handle) +brw_image_target_renderbuffer_storage(struct gl_context *ctx, + struct gl_renderbuffer *rb, + void *image_handle) { struct brw_context *brw = brw_context(ctx); struct brw_renderbuffer *irb; @@ -416,11 +416,11 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx, * * Any actual buffer reallocations for hardware renderbuffers (which would * have triggered _mesa_resize_framebuffer()) were done by - * intel_process_dri2_buffer(). + * brw_process_dri2_buffer(). */ static GLboolean -intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, - GLenum internalFormat, GLuint width, GLuint height) +brw_alloc_window_storage(struct gl_context *ctx, struct gl_renderbuffer *rb, + GLenum internalFormat, GLuint width, GLuint height) { (void) ctx; assert(rb->Name == 0); @@ -433,14 +433,14 @@ intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, /** Dummy function for gl_renderbuffer::AllocStorage() */ static GLboolean -intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, - GLenum internalFormat, GLuint width, GLuint height) +brw_nop_alloc_storage(struct gl_context *ctx, struct gl_renderbuffer *rb, + GLenum internalFormat, GLuint width, GLuint height) { (void) rb; (void) internalFormat; (void) width; (void) height; - _mesa_problem(ctx, "intel_nop_alloc_storage should never be called."); + _mesa_problem(ctx, "brw_nop_alloc_storage should never be called."); return false; } @@ -452,8 +452,8 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, * \param num_samples must be quantized. */ struct brw_renderbuffer * -intel_create_winsys_renderbuffer(struct brw_screen *screen, - mesa_format format, unsigned num_samples) +brw_create_winsys_renderbuffer(struct brw_screen *screen, + mesa_format format, unsigned num_samples) { struct brw_renderbuffer *irb = CALLOC_STRUCT(brw_renderbuffer); if (!irb) @@ -470,28 +470,28 @@ intel_create_winsys_renderbuffer(struct brw_screen *screen, rb->Format = fallback_rgbx_to_rgba(screen, rb, format); /* intel-specific methods */ - rb->Delete = intel_delete_renderbuffer; - rb->AllocStorage = intel_alloc_window_storage; + rb->Delete = brw_delete_renderbuffer; + rb->AllocStorage = brw_alloc_window_storage; return irb; } /** * Private window-system buffers (as opposed to ones shared with the display - * server created with intel_create_winsys_renderbuffer()) are most similar in their + * server created with brw_create_winsys_renderbuffer()) are most similar in their * handling to user-created renderbuffers, but they have a resize handler that - * may be called at intel_update_renderbuffers() time. + * may be called at brw_update_renderbuffers() time. * * \param num_samples must be quantized. */ struct brw_renderbuffer * -intel_create_private_renderbuffer(struct brw_screen *screen, - mesa_format format, unsigned num_samples) +brw_create_private_renderbuffer(struct brw_screen *screen, + mesa_format format, unsigned num_samples) { struct brw_renderbuffer *irb; - irb = intel_create_winsys_renderbuffer(screen, format, num_samples); - irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage; + irb = brw_create_winsys_renderbuffer(screen, format, num_samples); + irb->Base.Base.AllocStorage = brw_alloc_private_renderbuffer_storage; return irb; } @@ -501,7 +501,7 @@ intel_create_private_renderbuffer(struct brw_screen *screen, * Typically called via glBindRenderbufferEXT(). */ static struct gl_renderbuffer * -intel_new_renderbuffer(struct gl_context * ctx, GLuint name) +brw_new_renderbuffer(struct gl_context *ctx, GLuint name) { struct brw_renderbuffer *irb; struct gl_renderbuffer *rb; @@ -518,8 +518,8 @@ intel_new_renderbuffer(struct gl_context * ctx, GLuint name) rb->ClassID = INTEL_RB_CLASS; /* intel-specific methods */ - rb->Delete = intel_delete_renderbuffer; - rb->AllocStorage = intel_alloc_renderbuffer_storage; + rb->Delete = brw_delete_renderbuffer; + rb->AllocStorage = brw_alloc_renderbuffer_storage; /* span routines set in alloc_storage function */ return rb; @@ -537,7 +537,7 @@ brw_renderbuffer_update_wrapper(struct brw_context *brw, struct brw_mipmap_tree *mt = intel_image->mt; int level = image->Level; - rb->AllocStorage = intel_nop_alloc_storage; + rb->AllocStorage = brw_nop_alloc_storage; /* adjust for texture view parameters */ layer += image->TexObject->Attrib.MinLayer; @@ -581,12 +581,12 @@ brw_renderbuffer_set_draw_offset(struct brw_renderbuffer *irb) * Called by glFramebufferTexture[123]DEXT() (and other places) to * prepare for rendering into texture memory. This might be called * many times to choose different texture levels, cube faces, etc - * before intel_finish_render_texture() is ever called. + * before brw_finish_render_texture() is ever called. */ static void -intel_render_texture(struct gl_context * ctx, - struct gl_framebuffer *fb, - struct gl_renderbuffer_attachment *att) +brw_render_texture(struct gl_context * ctx, + struct gl_framebuffer *fb, + struct gl_renderbuffer_attachment *att) { struct brw_context *brw = brw_context(ctx); struct gl_renderbuffer *rb = att->Renderbuffer; @@ -644,14 +644,14 @@ intel_render_texture(struct gl_context * ctx, * Do additional "completeness" testing of a framebuffer object. */ static void -intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) +brw_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) { struct brw_context *brw = brw_context(ctx); const struct gen_device_info *devinfo = &brw->screen->devinfo; struct brw_renderbuffer *depthRb = - intel_get_renderbuffer(fb, BUFFER_DEPTH); + brw_get_renderbuffer(fb, BUFFER_DEPTH); struct brw_renderbuffer *stencilRb = - intel_get_renderbuffer(fb, BUFFER_STENCIL); + brw_get_renderbuffer(fb, BUFFER_STENCIL); struct brw_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; unsigned i; @@ -744,7 +744,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) /* A supported attachment will have a Renderbuffer set either * from being a Renderbuffer or being a texture that got the - * intel_wrap_texture() treatment. + * brw_wrap_texture() treatment. */ rb = fb->Attachment[i].Renderbuffer; if (rb == NULL) { @@ -780,7 +780,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED, "FBO incomplete: Unsupported HW " "texture/renderbuffer format attached: %s\n", - _mesa_get_format_name(intel_rb_format(irb))); + _mesa_get_format_name(brw_rb_format(irb))); } } } @@ -794,21 +794,21 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) * normal path. */ static GLbitfield -intel_blit_framebuffer_with_blitter(struct gl_context *ctx, - const struct gl_framebuffer *readFb, - const struct gl_framebuffer *drawFb, - GLint srcX0, GLint srcY0, - GLint srcX1, GLint srcY1, - GLint dstX0, GLint dstY0, - GLint dstX1, GLint dstY1, - GLbitfield mask) +brw_blit_framebuffer_with_blitter(struct gl_context *ctx, + const struct gl_framebuffer *readFb, + const struct gl_framebuffer *drawFb, + GLint srcX0, GLint srcY0, + GLint srcX1, GLint srcY1, + GLint dstX0, GLint dstY0, + GLint dstX1, GLint dstY1, + GLbitfield mask) { struct brw_context *brw = brw_context(ctx); /* Sync up the state of window system buffers. We need to do this before * we go looking for the buffers. */ - intel_prepare_render(brw); + brw_prepare_render(brw); if (mask & GL_COLOR_BUFFER_BIT) { unsigned i; @@ -887,12 +887,12 @@ intel_blit_framebuffer_with_blitter(struct gl_context *ctx, } static void -intel_blit_framebuffer(struct gl_context *ctx, - struct gl_framebuffer *readFb, - struct gl_framebuffer *drawFb, - GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, - GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, - GLbitfield mask, GLenum filter) +brw_blit_framebuffer(struct gl_context *ctx, + struct gl_framebuffer *readFb, + struct gl_framebuffer *drawFb, + GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, + GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, + GLbitfield mask, GLenum filter) { struct brw_context *brw = brw_context(ctx); const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -912,10 +912,10 @@ intel_blit_framebuffer(struct gl_context *ctx, * faster than using the 3D pipeline. Original Gen4 also has to rebase * and copy miptree slices in order to render to unaligned locations. */ - mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - mask); + mask = brw_blit_framebuffer_with_blitter(ctx, readFb, drawFb, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + mask); if (mask == 0x0) return; } @@ -966,7 +966,7 @@ brw_renderbuffer_move_to_temp(struct brw_context *brw, struct brw_mipmap_tree *new_mt; int width, height, depth; - intel_get_image_dims(rb->TexImage, &width, &height, &depth); + brw_get_image_dims(rb->TexImage, &width, &height, &depth); assert(irb->align_wa_mt == NULL); new_mt = brw_miptree_create(brw, GL_TEXTURE_2D, @@ -1119,17 +1119,17 @@ brw_depth_cache_add_bo(struct brw_context *brw, struct brw_bo *bo) * Hook in device driver functions. */ void -intel_fbo_init(struct brw_context *brw) +brw_fbo_init(struct brw_context *brw) { struct dd_function_table *dd = &brw->ctx.Driver; - dd->NewRenderbuffer = intel_new_renderbuffer; - dd->MapRenderbuffer = intel_map_renderbuffer; - dd->UnmapRenderbuffer = intel_unmap_renderbuffer; - dd->RenderTexture = intel_render_texture; - dd->ValidateFramebuffer = intel_validate_framebuffer; - dd->BlitFramebuffer = intel_blit_framebuffer; + dd->NewRenderbuffer = brw_new_renderbuffer; + dd->MapRenderbuffer = brw_map_renderbuffer; + dd->UnmapRenderbuffer = brw_unmap_renderbuffer; + dd->RenderTexture = brw_render_texture; + dd->ValidateFramebuffer = brw_validate_framebuffer; + dd->BlitFramebuffer = brw_blit_framebuffer; dd->EGLImageTargetRenderbufferStorage = - intel_image_target_renderbuffer_storage; + brw_image_target_renderbuffer_storage; brw->render_cache = _mesa_hash_table_create(brw->mem_ctx, _mesa_hash_pointer, _mesa_key_pointer_equal); diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index 514d2bad9c0..0ce86c1f9c0 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -164,7 +164,7 @@ brw_renderbuffer_get_mt(struct brw_renderbuffer *irb) * renderbuffer. */ static inline struct brw_renderbuffer * -intel_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex) +brw_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex) { struct gl_renderbuffer *rb; @@ -179,26 +179,26 @@ intel_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex) static inline mesa_format -intel_rb_format(const struct brw_renderbuffer *rb) +brw_rb_format(const struct brw_renderbuffer *rb) { return rb->Base.Base.Format; } extern struct brw_renderbuffer * -intel_create_winsys_renderbuffer(struct brw_screen *screen, - mesa_format format, unsigned num_samples); +brw_create_winsys_renderbuffer(struct brw_screen *screen, + mesa_format format, unsigned num_samples); struct brw_renderbuffer * -intel_create_private_renderbuffer(struct brw_screen *screen, - mesa_format format, unsigned num_samples); +brw_create_private_renderbuffer(struct brw_screen *screen, + mesa_format format, unsigned num_samples); struct gl_renderbuffer* -intel_create_wrapped_renderbuffer(struct gl_context * ctx, - int width, int height, - mesa_format format); +brw_create_wrapped_renderbuffer(struct gl_context *ctx, + int width, int height, + mesa_format format); extern void -intel_fbo_init(struct brw_context *brw); +brw_fbo_init(struct brw_context *brw); void brw_renderbuffer_set_draw_offset(struct brw_renderbuffer *irb); @@ -246,7 +246,7 @@ void brw_render_cache_add_bo(struct brw_context *brw, struct brw_bo *bo, void brw_depth_cache_add_bo(struct brw_context *brw, struct brw_bo *bo); unsigned -intel_quantize_num_samples(struct brw_screen *intel, unsigned num_samples); +brw_quantize_num_samples(struct brw_screen *intel, unsigned num_samples); #ifdef __cplusplus } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 979cba016e0..4e1495f7281 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -108,7 +108,7 @@ format_supports_ccs_e(const struct brw_context *brw, mesa_format format) * for separate stencil. */ mesa_format -intel_depth_format_for_depthstencil_format(mesa_format format) { +brw_depth_format_for_depthstencil_format(mesa_format format) { switch (format) { case MESA_FORMAT_Z24_UNORM_S8_UINT: return MESA_FORMAT_Z24_UNORM_X8_UINT; @@ -193,7 +193,7 @@ brw_miptree_choose_aux_usage(struct brw_context *brw, * compressed format, if unsupported. */ mesa_format -intel_lower_compressed_format(struct brw_context *brw, mesa_format format) +brw_lower_compressed_format(struct brw_context *brw, mesa_format format) { const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -492,7 +492,7 @@ miptree_create(struct brw_context *brw, /* Fix up the Z miptree format for how we're splitting out separate * stencil. Gen7 expects there to be no stencil bits in its depth buffer. */ - mt_fmt = intel_depth_format_for_depthstencil_format(format); + mt_fmt = brw_depth_format_for_depthstencil_format(format); } struct brw_mipmap_tree *mt = @@ -505,7 +505,7 @@ miptree_create(struct brw_context *brw, return NULL; if (brw_miptree_needs_fake_etc(brw, mt)) { - mesa_format decomp_format = intel_lower_compressed_format(brw, format); + mesa_format decomp_format = brw_lower_compressed_format(brw, format); mt->shadow_mt = make_surface(brw, target, decomp_format, first_level, last_level, width0, height0, depth0, num_samples, tiling_flags, @@ -593,7 +593,7 @@ brw_miptree_create_for_bo(struct brw_context *brw, if ((base_format == GL_DEPTH_COMPONENT || base_format == GL_DEPTH_STENCIL)) { const mesa_format mt_fmt = (devinfo->gen < 6) ? format : - intel_depth_format_for_depthstencil_format(format); + brw_depth_format_for_depthstencil_format(format); mt = make_surface(brw, target, mt_fmt, 0, 0, width, height, depth, 1, ISL_TILING_Y0_BIT, mt_surf_usage(mt_fmt), @@ -904,7 +904,7 @@ brw_miptree_create_for_dri_image(struct brw_context *brw, * irb->singlesample_mt). */ bool -intel_update_winsys_renderbuffer_miptree(struct brw_context *intel, +brw_update_winsys_renderbuffer_miptree(struct brw_context *intel, struct brw_renderbuffer *irb, struct brw_mipmap_tree *singlesample_mt, uint32_t width, uint32_t height, @@ -1040,7 +1040,7 @@ brw_miptree_release(struct brw_mipmap_tree **mt) void -intel_get_image_dims(struct gl_texture_image *image, +brw_get_image_dims(struct gl_texture_image *image, int *width, int *height, int *depth) { switch (image->TexObject->Target) { @@ -1102,7 +1102,7 @@ brw_miptree_match_image(struct brw_mipmap_tree *mt, _mesa_get_srgb_format_linear(mt_format)) return false; - intel_get_image_dims(image, &width, &height, &depth); + brw_get_image_dims(image, &width, &height, &depth); if (mt->target == GL_TEXTURE_CUBE_MAP) depth = 6; @@ -1395,7 +1395,7 @@ brw_miptree_copy_teximage(struct brw_context *brw, } static struct brw_miptree_aux_buffer * -intel_alloc_aux_buffer(struct brw_context *brw, +brw_alloc_aux_buffer(struct brw_context *brw, const struct isl_surf *aux_surf, bool wants_memset, uint8_t memset_value) @@ -1595,7 +1595,7 @@ brw_miptree_alloc_aux(struct brw_context *brw, struct brw_mipmap_tree *mt) /* Allocate the auxiliary buffer. */ const bool needs_memset = initial_state != ISL_AUX_STATE_AUX_INVALID; - mt->aux_buf = intel_alloc_aux_buffer(brw, &aux_surf, needs_memset, + mt->aux_buf = brw_alloc_aux_buffer(brw, &aux_surf, needs_memset, memset_value); if (mt->aux_buf == NULL) { free_aux_state_map(mt->aux_state); @@ -1785,7 +1785,7 @@ brw_miptree_prepare_access(struct brw_context *brw, assert(aux_op == ISL_AUX_OP_PARTIAL_RESOLVE); brw_blorp_mcs_partial_resolve(brw, mt, layer, 1); } else if (isl_aux_usage_has_hiz(mt->aux_usage)) { - intel_hiz_exec(brw, mt, level, layer, 1, aux_op); + brw_hiz_exec(brw, mt, level, layer, 1, aux_op); } else { assert(isl_aux_usage_has_ccs(mt->aux_usage)); brw_miptree_check_color_resolve(brw, mt, level, layer); @@ -2207,7 +2207,7 @@ brw_miptree_make_shareable(struct brw_context *brw, * mesa: Fix return type of _mesa_get_format_bytes() (#37351) */ static intptr_t -intel_offset_S8(uint32_t stride, uint32_t x, uint32_t y, bool swizzled) +brw_offset_S8(uint32_t stride, uint32_t x, uint32_t y, bool swizzled) { uint32_t tile_size = 4096; uint32_t tile_width = 64; @@ -2284,7 +2284,7 @@ brw_miptree_updownsample(struct brw_context *brw, } void -intel_update_r8stencil(struct brw_context *brw, +brw_update_r8stencil(struct brw_context *brw, struct brw_mipmap_tree *mt) { const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -2754,10 +2754,10 @@ brw_miptree_unmap_s8(struct brw_context *brw, for (uint32_t y = 0; y < map->h; y++) { for (uint32_t x = 0; x < map->w; x++) { - ptrdiff_t offset = intel_offset_S8(mt->surf.row_pitch_B, - image_x + x + map->x, - image_y + y + map->y, - brw->has_swizzling); + ptrdiff_t offset = brw_offset_S8(mt->surf.row_pitch_B, + image_x + x + map->x, + image_y + y + map->y, + brw->has_swizzling); tiled_s8_map[offset] = untiled_s8_map[y * map->w + x]; } } @@ -2796,10 +2796,10 @@ brw_miptree_map_s8(struct brw_context *brw, for (uint32_t y = 0; y < map->h; y++) { for (uint32_t x = 0; x < map->w; x++) { - ptrdiff_t offset = intel_offset_S8(mt->surf.row_pitch_B, - x + image_x + map->x, - y + image_y + map->y, - brw->has_swizzling); + ptrdiff_t offset = brw_offset_S8(mt->surf.row_pitch_B, + x + image_x + map->x, + y + image_y + map->y, + brw->has_swizzling); untiled_s8_map[y * map->w + x] = tiled_s8_map[offset]; } } @@ -2854,10 +2854,10 @@ brw_miptree_unmap_depthstencil(struct brw_context *brw, for (uint32_t y = 0; y < map->h; y++) { for (uint32_t x = 0; x < map->w; x++) { - ptrdiff_t s_offset = intel_offset_S8(s_mt->surf.row_pitch_B, - x + s_image_x + map->x, - y + s_image_y + map->y, - brw->has_swizzling); + ptrdiff_t s_offset = brw_offset_S8(s_mt->surf.row_pitch_B, + x + s_image_x + map->x, + y + s_image_y + map->y, + brw->has_swizzling); ptrdiff_t z_offset = ((y + z_image_y + map->y) * (z_mt->surf.row_pitch_B / 4) + (x + z_image_x + map->x)); @@ -2929,7 +2929,7 @@ brw_miptree_map_depthstencil(struct brw_context *brw, for (uint32_t y = 0; y < map->h; y++) { for (uint32_t x = 0; x < map->w; x++) { int map_x = map->x + x, map_y = map->y + y; - ptrdiff_t s_offset = intel_offset_S8(s_mt->surf.row_pitch_B, + ptrdiff_t s_offset = brw_offset_S8(s_mt->surf.row_pitch_B, map_x + s_image_x, map_y + s_image_y, brw->has_swizzling); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 9db5b45a892..df04a5a0e35 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -37,7 +37,7 @@ * order, and a texture may change size over time. Thus, each * brw_texture_image has a reference to a miptree that contains the pixel * data sized appropriately for it, which will later be referenced by/copied - * to the brw_texture_object at draw time (intel_finalize_mipmap_tree()) so + * to the brw_texture_object at draw time (brw_finalize_mipmap_tree()) so * that there's a single miptree for the complete texture. */ @@ -402,7 +402,7 @@ brw_miptree_create_for_dri_image(struct brw_context *brw, bool allow_internal_aux); bool -intel_update_winsys_renderbuffer_miptree(struct brw_context *intel, +brw_update_winsys_renderbuffer_miptree(struct brw_context *intel, struct brw_renderbuffer *irb, struct brw_mipmap_tree *singlesample_mt, uint32_t width, uint32_t height, @@ -423,10 +423,10 @@ brw_miptree_create_for_renderbuffer(struct brw_context *brw, uint32_t num_samples); mesa_format -intel_depth_format_for_depthstencil_format(mesa_format format); +brw_depth_format_for_depthstencil_format(mesa_format format); mesa_format -intel_lower_compressed_format(struct brw_context *brw, mesa_format format); +brw_lower_compressed_format(struct brw_context *brw, mesa_format format); unsigned brw_get_num_logical_layers(const struct brw_mipmap_tree *mt, unsigned level); @@ -460,7 +460,7 @@ get_isl_dim_layout(const struct gen_device_info *devinfo, enum isl_tiling tiling, GLenum target); void -intel_get_image_dims(struct gl_texture_image *image, +brw_get_image_dims(struct gl_texture_image *image, int *width, int *height, int *depth); uint32_t @@ -661,7 +661,7 @@ brw_miptree_updownsample(struct brw_context *brw, struct brw_mipmap_tree *dst); void -intel_update_r8stencil(struct brw_context *brw, +brw_update_r8stencil(struct brw_context *brw, struct brw_mipmap_tree *mt); void diff --git a/src/mesa/drivers/dri/i965/intel_pixel.c b/src/mesa/drivers/dri/i965/intel_pixel.c index 0cbb572838c..72f15f5cdcc 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel.c +++ b/src/mesa/drivers/dri/i965/intel_pixel.c @@ -54,7 +54,7 @@ effective_func(GLenum func, bool src_alpha_is_one) * glDraw/CopyPixels. */ bool -intel_check_blit_fragment_ops(struct gl_context * ctx, bool src_alpha_is_one) +brw_check_blit_fragment_ops(struct gl_context * ctx, bool src_alpha_is_one) { if (ctx->NewState) _mesa_update_state(ctx); diff --git a/src/mesa/drivers/dri/i965/intel_pixel.h b/src/mesa/drivers/dri/i965/intel_pixel.h index f5b931f5c1f..c3dac3c7e0a 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel.h +++ b/src/mesa/drivers/dri/i965/intel_pixel.h @@ -29,8 +29,8 @@ #include "main/mtypes.h" void intelInitPixelFuncs(struct dd_function_table *functions); -bool intel_check_blit_fragment_ops(struct gl_context * ctx, - bool src_alpha_is_one); +bool brw_check_blit_fragment_ops(struct gl_context *ctx, + bool src_alpha_is_one); void intelReadPixels(struct gl_context * ctx, GLint x, GLint y, diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c index 67b66bab322..510a12d7b6d 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c @@ -198,7 +198,7 @@ do_blit_bitmap( struct gl_context *ctx, return false; } - intel_prepare_render(brw); + brw_prepare_render(brw); if (fb->_NumColorDrawBuffers != 1) { perf_debug("accelerated glBitmap() only supports rendering to a " @@ -225,7 +225,7 @@ do_blit_bitmap( struct gl_context *ctx, UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[2], tmpColor[2]); UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]); - switch (_mesa_get_render_format(ctx, intel_rb_format(irb))) { + switch (_mesa_get_render_format(ctx, brw_rb_format(irb))) { case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_B8G8R8X8_UNORM: color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]); @@ -239,7 +239,7 @@ do_blit_bitmap( struct gl_context *ctx, return false; } - if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F)) + if (!brw_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F)) return false; /* Clip to buffer bounds and scissor. */ diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index e296802e815..cd4ac0569d9 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -63,7 +63,7 @@ do_blit_copypixels(struct gl_context * ctx, /* Update draw buffer bounds */ _mesa_update_state(ctx); - intel_prepare_render(brw); + brw_prepare_render(brw); switch (type) { case GL_COLOR: diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c index 258630c6b4f..b02fe50db7a 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c @@ -61,7 +61,7 @@ do_blit_drawpixels(struct gl_context * ctx, DBG("%s\n", __func__); - if (!intel_check_blit_fragment_ops(ctx, false)) + if (!brw_check_blit_fragment_ops(ctx, false)) return false; if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) { @@ -69,7 +69,7 @@ do_blit_drawpixels(struct gl_context * ctx, return false; } - intel_prepare_render(brw); + brw_prepare_render(brw); struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; struct brw_renderbuffer *irb = brw_renderbuffer(rb); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index badc1e174d2..5bd88555c00 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -64,12 +64,12 @@ * single copy operation. */ static bool -intel_readpixels_tiled_memcpy(struct gl_context * ctx, - GLint xoffset, GLint yoffset, - GLsizei width, GLsizei height, - GLenum format, GLenum type, - GLvoid * pixels, - const struct gl_pixelstore_attrib *pack) +brw_readpixels_tiled_memcpy(struct gl_context *ctx, + GLint xoffset, GLint yoffset, + GLsizei width, GLsizei height, + GLenum format, GLenum type, + GLvoid * pixels, + const struct gl_pixelstore_attrib *pack) { struct brw_context *brw = brw_context(ctx); struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorReadBuffer; @@ -214,11 +214,11 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, } static bool -intel_readpixels_blorp(struct gl_context *ctx, - unsigned x, unsigned y, - unsigned w, unsigned h, - GLenum format, GLenum type, const void *pixels, - const struct gl_pixelstore_attrib *packing) +brw_readpixels_blorp(struct gl_context *ctx, + unsigned x, unsigned y, + unsigned w, unsigned h, + GLenum format, GLenum type, const void *pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_context *brw = brw_context(ctx); struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorReadBuffer; @@ -266,22 +266,22 @@ intelReadPixels(struct gl_context * ctx, DBG("%s\n", __func__); /* Reading pixels wont dirty the front buffer, so reset the dirty - * flag after calling intel_prepare_render(). + * flag after calling brw_prepare_render(). */ dirty = brw->front_buffer_dirty; - intel_prepare_render(brw); + brw_prepare_render(brw); brw->front_buffer_dirty = dirty; if (pack->BufferObj) { - if (intel_readpixels_blorp(ctx, x, y, width, height, - format, type, pixels, pack)) + if (brw_readpixels_blorp(ctx, x, y, width, height, + format, type, pixels, pack)) return; perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__); } - ok = intel_readpixels_tiled_memcpy(ctx, x, y, width, height, - format, type, pixels, pack); + ok = brw_readpixels_tiled_memcpy(ctx, x, y, width, height, + format, type, pixels, pack); if(ok) return; @@ -295,6 +295,6 @@ intelReadPixels(struct gl_context * ctx, _mesa_readpixels(ctx, x, y, width, height, format, type, pack, pixels); - /* There's an intel_prepare_render() call in intelSpanRenderStart(). */ + /* There's an brw_prepare_render() call in intelSpanRenderStart(). */ brw->front_buffer_dirty = dirty; } diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 1f268a364a0..4d07a2c0bc4 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -147,7 +147,7 @@ static const __DRItexBufferExtension intelTexBufferExtension = { }; static void -intel_dri2_flush_with_flags(__DRIcontext *cPriv, +brw_dri2_flush_with_flags(__DRIcontext *cPriv, __DRIdrawable *dPriv, unsigned flags, enum __DRI2throttleReason reason) @@ -164,7 +164,7 @@ intel_dri2_flush_with_flags(__DRIcontext *cPriv, FLUSH_VERTICES(ctx, 0, 0); if (flags & __DRI2_FLUSH_DRAWABLE) - intel_resolve_for_dri2_flush(brw, dPriv); + brw_resolve_for_dri2_flush(brw, dPriv); if (reason == __DRI2_THROTTLE_SWAPBUFFER) brw->need_swap_throttle = true; @@ -181,9 +181,9 @@ intel_dri2_flush_with_flags(__DRIcontext *cPriv, * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13. */ static void -intel_dri2_flush(__DRIdrawable *drawable) +brw_dri2_flush(__DRIdrawable *drawable) { - intel_dri2_flush_with_flags(drawable->driContextPriv, drawable, + brw_dri2_flush_with_flags(drawable->driContextPriv, drawable, __DRI2_FLUSH_DRAWABLE, __DRI2_THROTTLE_SWAPBUFFER); } @@ -191,9 +191,9 @@ intel_dri2_flush(__DRIdrawable *drawable) static const struct __DRI2flushExtensionRec intelFlushExtension = { .base = { __DRI2_FLUSH, 4 }, - .flush = intel_dri2_flush, + .flush = brw_dri2_flush, .invalidate = dri2InvalidateDrawable, - .flush_with_flags = intel_dri2_flush_with_flags, + .flush_with_flags = brw_dri2_flush_with_flags, }; static const struct brw_image_format brw_image_formats[] = { @@ -416,7 +416,7 @@ tiling_to_modifier(uint32_t tiling) } static void -intel_image_warn_if_unaligned(__DRIimage *image, const char *func) +brw_image_warn_if_unaligned(__DRIimage *image, const char *func) { uint32_t tiling, swizzle; brw_bo_get_tiling(image->bo, &tiling, &swizzle); @@ -439,7 +439,7 @@ brw_image_format_lookup(int fourcc) } static bool -intel_image_get_fourcc(__DRIimage *image, int *fourcc) +brw_image_get_fourcc(__DRIimage *image, int *fourcc) { if (image->planar_format) { *fourcc = image->planar_format->fourcc; @@ -456,8 +456,8 @@ intel_image_get_fourcc(__DRIimage *image, int *fourcc) } static __DRIimage * -intel_allocate_image(struct brw_screen *screen, int dri_format, - void *loaderPrivate) +brw_allocate_image(struct brw_screen *screen, int dri_format, + void *loaderPrivate) { __DRIimage *image; @@ -487,9 +487,9 @@ intel_allocate_image(struct brw_screen *screen, int dri_format, * Sets up a DRIImage structure to point to a slice out of a miptree. */ static void -intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image, - struct brw_mipmap_tree *mt, GLuint level, - GLuint zoffset) +brw_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image, + struct brw_mipmap_tree *mt, GLuint level, + GLuint zoffset) { brw_miptree_make_shareable(brw, mt); @@ -511,15 +511,15 @@ intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image, } static __DRIimage * -intel_create_image_from_name(__DRIscreen *dri_screen, - int width, int height, int format, - int name, int pitch, void *loaderPrivate) +brw_create_image_from_name(__DRIscreen *dri_screen, + int width, int height, int format, + int name, int pitch, void *loaderPrivate) { struct brw_screen *screen = dri_screen->driverPrivate; __DRIimage *image; int cpp; - image = intel_allocate_image(screen, format, loaderPrivate); + image = brw_allocate_image(screen, format, loaderPrivate); if (image == NULL) return NULL; @@ -543,8 +543,8 @@ intel_create_image_from_name(__DRIscreen *dri_screen, } static __DRIimage * -intel_create_image_from_renderbuffer(__DRIcontext *context, - int renderbuffer, void *loaderPrivate) +brw_create_image_from_renderbuffer(__DRIcontext *context, + int renderbuffer, void *loaderPrivate) { __DRIimage *image; struct brw_context *brw = context->driverPrivate; @@ -585,11 +585,11 @@ intel_create_image_from_renderbuffer(__DRIcontext *context, } static __DRIimage * -intel_create_image_from_texture(__DRIcontext *context, int target, - unsigned texture, int zoffset, - int level, - unsigned *error, - void *loaderPrivate) +brw_create_image_from_texture(__DRIcontext *context, int target, + unsigned texture, int zoffset, + int level, + unsigned *error, + void *loaderPrivate) { __DRIimage *image; struct brw_context *brw = context->driverPrivate; @@ -634,7 +634,7 @@ intel_create_image_from_texture(__DRIcontext *context, int target, isl_tiling_to_i915_tiling(iobj->mt->surf.tiling)); image->driScrnPriv = context->driScreenPriv; image->loader_private = loaderPrivate; - intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset); + brw_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset); image->dri_format = driGLFormatToImageFormat(image->format); image->has_depthstencil = iobj->mt->stencil_mt? true : false; image->planar_format = iobj->planar_format; @@ -649,7 +649,7 @@ intel_create_image_from_texture(__DRIcontext *context, int target, } static void -intel_destroy_image(__DRIimage *image) +brw_destroy_image(__DRIimage *image) { const __DRIscreen * driScreen = image->driScrnPriv; const __DRIimageLoaderExtension *imgLoader = driScreen->image.loader; @@ -718,12 +718,12 @@ select_best_modifier(struct gen_device_info *devinfo, } static __DRIimage * -intel_create_image_common(__DRIscreen *dri_screen, - int width, int height, int format, - unsigned int use, - const uint64_t *modifiers, - unsigned count, - void *loaderPrivate) +brw_create_image_common(__DRIscreen *dri_screen, + int width, int height, int format, + unsigned int use, + const uint64_t *modifiers, + unsigned count, + void *loaderPrivate) { __DRIimage *image; struct brw_screen *screen = dri_screen->driverPrivate; @@ -759,7 +759,7 @@ intel_create_image_common(__DRIscreen *dri_screen, } } - image = intel_allocate_image(screen, format, loaderPrivate); + image = brw_allocate_image(screen, format, loaderPrivate); if (image == NULL) return NULL; @@ -833,19 +833,19 @@ intel_create_image_common(__DRIscreen *dri_screen, } static __DRIimage * -intel_create_image(__DRIscreen *dri_screen, +brw_create_image(__DRIscreen *dri_screen, int width, int height, int format, unsigned int use, void *loaderPrivate) { - return intel_create_image_common(dri_screen, width, height, format, use, NULL, 0, - loaderPrivate); + return brw_create_image_common(dri_screen, width, height, format, use, + NULL, 0, loaderPrivate); } static void * -intel_map_image(__DRIcontext *context, __DRIimage *image, - int x0, int y0, int width, int height, - unsigned int flags, int *stride, void **map_info) +brw_map_image(__DRIcontext *context, __DRIimage *image, + int x0, int y0, int width, int height, + unsigned int flags, int *stride, void **map_info) { struct brw_context *brw = NULL; struct brw_bo *bo = NULL; @@ -895,8 +895,8 @@ intel_map_image(__DRIcontext *context, __DRIimage *image, } static void -intel_unmap_image(UNUSED __DRIcontext *context, UNUSED __DRIimage *image, - void *map_info) +brw_unmap_image(UNUSED __DRIcontext *context, UNUSED __DRIimage *image, + void *map_info) { struct brw_bo *bo = map_info; @@ -905,18 +905,18 @@ intel_unmap_image(UNUSED __DRIcontext *context, UNUSED __DRIimage *image, } static __DRIimage * -intel_create_image_with_modifiers(__DRIscreen *dri_screen, +brw_create_image_with_modifiers(__DRIscreen *dri_screen, int width, int height, int format, const uint64_t *modifiers, const unsigned count, void *loaderPrivate) { - return intel_create_image_common(dri_screen, width, height, format, 0, - modifiers, count, loaderPrivate); + return brw_create_image_common(dri_screen, width, height, format, 0, + modifiers, count, loaderPrivate); } static GLboolean -intel_query_image(__DRIimage *image, int attrib, int *value) +brw_query_image(__DRIimage *image, int attrib, int *value) { switch (attrib) { case __DRI_IMAGE_ATTRIB_STRIDE: @@ -951,7 +951,7 @@ intel_query_image(__DRIimage *image, int attrib, int *value) case __DRI_IMAGE_ATTRIB_FD: return !brw_bo_gem_export_to_prime(image->bo, value); case __DRI_IMAGE_ATTRIB_FOURCC: - return intel_image_get_fourcc(image, value); + return brw_image_get_fourcc(image, value); case __DRI_IMAGE_ATTRIB_NUM_PLANES: if (isl_drm_modifier_has_aux(image->modifier)) { assert(!image->planar_format || image->planar_format->nplanes == 1); @@ -978,7 +978,7 @@ intel_query_image(__DRIimage *image, int attrib, int *value) } static GLboolean -intel_query_format_modifier_attribs(__DRIscreen *dri_screen, +brw_query_format_modifier_attribs(__DRIscreen *dri_screen, uint32_t fourcc, uint64_t modifier, int attrib, uint64_t *value) { @@ -999,7 +999,7 @@ intel_query_format_modifier_attribs(__DRIscreen *dri_screen, } static __DRIimage * -intel_dup_image(__DRIimage *orig_image, void *loaderPrivate) +brw_dup_image(__DRIimage *orig_image, void *loaderPrivate) { __DRIimage *image; @@ -1034,7 +1034,7 @@ intel_dup_image(__DRIimage *orig_image, void *loaderPrivate) } static GLboolean -intel_validate_usage(__DRIimage *image, unsigned int use) +brw_validate_usage(__DRIimage *image, unsigned int use) { if (use & __DRI_IMAGE_USE_CURSOR) { if (image->width != 64 || image->height != 64) @@ -1045,11 +1045,11 @@ intel_validate_usage(__DRIimage *image, unsigned int use) } static __DRIimage * -intel_create_image_from_names(__DRIscreen *dri_screen, - int width, int height, int fourcc, - int *names, int num_names, - int *strides, int *offsets, - void *loaderPrivate) +brw_create_image_from_names(__DRIscreen *dri_screen, + int width, int height, int fourcc, + int *names, int num_names, + int *strides, int *offsets, + void *loaderPrivate) { const struct brw_image_format *f = NULL; __DRIimage *image; @@ -1062,10 +1062,10 @@ intel_create_image_from_names(__DRIscreen *dri_screen, if (f == NULL) return NULL; - image = intel_create_image_from_name(dri_screen, width, height, - __DRI_IMAGE_FORMAT_NONE, - names[0], strides[0], - loaderPrivate); + image = brw_create_image_from_name(dri_screen, width, height, + __DRI_IMAGE_FORMAT_NONE, + names[0], strides[0], + loaderPrivate); if (image == NULL) return NULL; @@ -1081,11 +1081,11 @@ intel_create_image_from_names(__DRIscreen *dri_screen, } static __DRIimage * -intel_create_image_from_fds_common(__DRIscreen *dri_screen, - int width, int height, int fourcc, - uint64_t modifier, int *fds, int num_fds, - int *strides, int *offsets, - void *loaderPrivate) +brw_create_image_from_fds_common(__DRIscreen *dri_screen, + int width, int height, int fourcc, + uint64_t modifier, int *fds, int num_fds, + int *strides, int *offsets, + void *loaderPrivate) { struct brw_screen *screen = dri_screen->driverPrivate; const struct brw_image_format *f; @@ -1105,10 +1105,10 @@ intel_create_image_from_fds_common(__DRIscreen *dri_screen, return NULL; if (f->nplanes == 1) - image = intel_allocate_image(screen, f->planes[0].dri_format, + image = brw_allocate_image(screen, f->planes[0].dri_format, loaderPrivate); else - image = intel_allocate_image(screen, __DRI_IMAGE_FORMAT_NONE, + image = brw_allocate_image(screen, __DRI_IMAGE_FORMAT_NONE, loaderPrivate); if (image == NULL) @@ -1249,36 +1249,36 @@ intel_create_image_from_fds_common(__DRIscreen *dri_screen, if (f->nplanes == 1) { image->offset = image->offsets[0]; - intel_image_warn_if_unaligned(image, __func__); + brw_image_warn_if_unaligned(image, __func__); } return image; } static __DRIimage * -intel_create_image_from_fds(__DRIscreen *dri_screen, - int width, int height, int fourcc, - int *fds, int num_fds, int *strides, int *offsets, - void *loaderPrivate) +brw_create_image_from_fds(__DRIscreen *dri_screen, + int width, int height, int fourcc, + int *fds, int num_fds, int *strides, int *offsets, + void *loaderPrivate) { - return intel_create_image_from_fds_common(dri_screen, width, height, fourcc, - DRM_FORMAT_MOD_INVALID, - fds, num_fds, strides, offsets, - loaderPrivate); + return brw_create_image_from_fds_common(dri_screen, width, height, fourcc, + DRM_FORMAT_MOD_INVALID, + fds, num_fds, strides, offsets, + loaderPrivate); } static __DRIimage * -intel_create_image_from_dma_bufs2(__DRIscreen *dri_screen, - int width, int height, - int fourcc, uint64_t modifier, - int *fds, int num_fds, - int *strides, int *offsets, - enum __DRIYUVColorSpace yuv_color_space, - enum __DRISampleRange sample_range, - enum __DRIChromaSiting horizontal_siting, - enum __DRIChromaSiting vertical_siting, - unsigned *error, - void *loaderPrivate) +brw_create_image_from_dma_bufs2(__DRIscreen *dri_screen, + int width, int height, + int fourcc, uint64_t modifier, + int *fds, int num_fds, + int *strides, int *offsets, + enum __DRIYUVColorSpace yuv_color_space, + enum __DRISampleRange sample_range, + enum __DRIChromaSiting horizontal_siting, + enum __DRIChromaSiting vertical_siting, + unsigned *error, + void *loaderPrivate) { __DRIimage *image; const struct brw_image_format *f = brw_image_format_lookup(fourcc); @@ -1288,10 +1288,10 @@ intel_create_image_from_dma_bufs2(__DRIscreen *dri_screen, return NULL; } - image = intel_create_image_from_fds_common(dri_screen, width, height, - fourcc, modifier, - fds, num_fds, strides, offsets, - loaderPrivate); + image = brw_create_image_from_fds_common(dri_screen, width, height, + fourcc, modifier, + fds, num_fds, strides, offsets, + loaderPrivate); /* * Invalid parameters and any inconsistencies between are assumed to be @@ -1314,26 +1314,26 @@ intel_create_image_from_dma_bufs2(__DRIscreen *dri_screen, } static __DRIimage * -intel_create_image_from_dma_bufs(__DRIscreen *dri_screen, - int width, int height, int fourcc, - int *fds, int num_fds, - int *strides, int *offsets, - enum __DRIYUVColorSpace yuv_color_space, - enum __DRISampleRange sample_range, - enum __DRIChromaSiting horizontal_siting, - enum __DRIChromaSiting vertical_siting, - unsigned *error, - void *loaderPrivate) +brw_create_image_from_dma_bufs(__DRIscreen *dri_screen, + int width, int height, int fourcc, + int *fds, int num_fds, + int *strides, int *offsets, + enum __DRIYUVColorSpace yuv_color_space, + enum __DRISampleRange sample_range, + enum __DRIChromaSiting horizontal_siting, + enum __DRIChromaSiting vertical_siting, + unsigned *error, + void *loaderPrivate) { - return intel_create_image_from_dma_bufs2(dri_screen, width, height, - fourcc, DRM_FORMAT_MOD_INVALID, - fds, num_fds, strides, offsets, - yuv_color_space, - sample_range, - horizontal_siting, - vertical_siting, - error, - loaderPrivate); + return brw_create_image_from_dma_bufs2(dri_screen, width, height, + fourcc, DRM_FORMAT_MOD_INVALID, + fds, num_fds, strides, offsets, + yuv_color_space, + sample_range, + horizontal_siting, + vertical_siting, + error, + loaderPrivate); } static bool @@ -1361,7 +1361,7 @@ brw_image_format_is_supported(const struct gen_device_info *devinfo, } static GLboolean -intel_query_dma_buf_formats(__DRIscreen *_screen, int max, +brw_query_dma_buf_formats(__DRIscreen *_screen, int max, int *formats, int *count) { struct brw_screen *screen = _screen->driverPrivate; @@ -1395,7 +1395,7 @@ intel_query_dma_buf_formats(__DRIscreen *_screen, int max, } static GLboolean -intel_query_dma_buf_modifiers(__DRIscreen *_screen, int fourcc, int max, +brw_query_dma_buf_modifiers(__DRIscreen *_screen, int fourcc, int max, uint64_t *modifiers, unsigned int *external_only, int *count) @@ -1446,7 +1446,7 @@ intel_query_dma_buf_modifiers(__DRIscreen *_screen, int fourcc, int max, } static __DRIimage * -intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) +brw_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) { int width, height, offset, stride, size, dri_format; __DRIimage *image; @@ -1491,7 +1491,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) return NULL; } - image = intel_allocate_image(parent->screen, dri_format, loaderPrivate); + image = brw_allocate_image(parent->screen, dri_format, loaderPrivate); if (image == NULL) return NULL; @@ -1504,7 +1504,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) image->pitch = stride; image->offset = offset; - intel_image_warn_if_unaligned(image, __func__); + brw_image_warn_if_unaligned(image, __func__); return image; } @@ -1512,27 +1512,27 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) static const __DRIimageExtension intelImageExtension = { .base = { __DRI_IMAGE, 16 }, - .createImageFromName = intel_create_image_from_name, - .createImageFromRenderbuffer = intel_create_image_from_renderbuffer, - .destroyImage = intel_destroy_image, - .createImage = intel_create_image, - .queryImage = intel_query_image, - .dupImage = intel_dup_image, - .validateUsage = intel_validate_usage, - .createImageFromNames = intel_create_image_from_names, - .fromPlanar = intel_from_planar, - .createImageFromTexture = intel_create_image_from_texture, - .createImageFromFds = intel_create_image_from_fds, - .createImageFromDmaBufs = intel_create_image_from_dma_bufs, + .createImageFromName = brw_create_image_from_name, + .createImageFromRenderbuffer = brw_create_image_from_renderbuffer, + .destroyImage = brw_destroy_image, + .createImage = brw_create_image, + .queryImage = brw_query_image, + .dupImage = brw_dup_image, + .validateUsage = brw_validate_usage, + .createImageFromNames = brw_create_image_from_names, + .fromPlanar = brw_from_planar, + .createImageFromTexture = brw_create_image_from_texture, + .createImageFromFds = brw_create_image_from_fds, + .createImageFromDmaBufs = brw_create_image_from_dma_bufs, .blitImage = NULL, .getCapabilities = NULL, - .mapImage = intel_map_image, - .unmapImage = intel_unmap_image, - .createImageWithModifiers = intel_create_image_with_modifiers, - .createImageFromDmaBufs2 = intel_create_image_from_dma_bufs2, - .queryDmaBufFormats = intel_query_dma_buf_formats, - .queryDmaBufModifiers = intel_query_dma_buf_modifiers, - .queryDmaBufFormatModifierAttribs = intel_query_format_modifier_attribs, + .mapImage = brw_map_image, + .unmapImage = brw_unmap_image, + .createImageWithModifiers = brw_create_image_with_modifiers, + .createImageFromDmaBufs2 = brw_create_image_from_dma_bufs2, + .queryDmaBufFormats = brw_query_dma_buf_formats, + .queryDmaBufModifiers = brw_query_dma_buf_modifiers, + .queryDmaBufFormatModifierAttribs = brw_query_format_modifier_attribs, }; static int @@ -1686,7 +1686,7 @@ static const __DRIextension *intelRobustScreenExtensions[] = { }; static int -intel_get_param(struct brw_screen *screen, int param, int *value) +brw_get_param(struct brw_screen *screen, int param, int *value) { int ret = 0; struct drm_i915_getparam gp; @@ -1705,18 +1705,18 @@ intel_get_param(struct brw_screen *screen, int param, int *value) } static bool -intel_get_boolean(struct brw_screen *screen, int param) +brw_get_boolean(struct brw_screen *screen, int param) { int value = 0; - return (intel_get_param(screen, param, &value) == 0) && value; + return (brw_get_param(screen, param, &value) == 0) && value; } static int -intel_get_integer(struct brw_screen *screen, int param) +brw_get_integer(struct brw_screen *screen, int param) { int value = -1; - if (intel_get_param(screen, param, &value) == 0) + if (brw_get_param(screen, param, &value) == 0) return value; return -1; @@ -1754,7 +1754,7 @@ intelCreateBuffer(__DRIscreen *dri_screen, dri_screen->driverPrivate; mesa_format rgbFormat; unsigned num_samples = - intel_quantize_num_samples(screen, mesaVis->samples); + brw_quantize_num_samples(screen, mesaVis->samples); if (isPixmap) return false; @@ -1801,12 +1801,12 @@ intelCreateBuffer(__DRIscreen *dri_screen, bool srgb_cap_set = mesaVis->redBits >= 8 && mesaVis->sRGBCapable; /* setup the hardware-based renderbuffers */ - rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); + rb = brw_create_winsys_renderbuffer(screen, rgbFormat, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, &rb->Base.Base); rb->need_srgb = srgb_cap_set; if (mesaVis->doubleBufferMode) { - rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); + rb = brw_create_winsys_renderbuffer(screen, rgbFormat, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, &rb->Base.Base); rb->need_srgb = srgb_cap_set; } @@ -1820,11 +1820,11 @@ intelCreateBuffer(__DRIscreen *dri_screen, assert(mesaVis->stencilBits == 8); if (screen->devinfo.has_hiz_and_separate_stencil) { - rb = intel_create_private_renderbuffer(screen, + rb = brw_create_private_renderbuffer(screen, MESA_FORMAT_Z24_UNORM_X8_UINT, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); - rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8, + rb = brw_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_STENCIL, &rb->Base.Base); } else { @@ -1832,7 +1832,7 @@ intelCreateBuffer(__DRIscreen *dri_screen, * Use combined depth/stencil. Note that the renderbuffer is * attached to two attachment points. */ - rb = intel_create_private_renderbuffer(screen, + rb = brw_create_private_renderbuffer(screen, MESA_FORMAT_Z24_UNORM_S8_UINT, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); @@ -1841,7 +1841,7 @@ intelCreateBuffer(__DRIscreen *dri_screen, } else if (mesaVis->depthBits == 16) { assert(mesaVis->stencilBits == 0); - rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_Z_UNORM16, + rb = brw_create_private_renderbuffer(screen, MESA_FORMAT_Z_UNORM16, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); } @@ -1872,7 +1872,7 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv) } static void -intel_cs_timestamp_frequency(struct brw_screen *screen) +brw_cs_timestamp_frequency(struct brw_screen *screen) { /* We shouldn't need to update gen_device_info.timestamp_frequency prior to * gen10, PCI-id is enough to figure it out. @@ -1881,7 +1881,7 @@ intel_cs_timestamp_frequency(struct brw_screen *screen) int ret, freq; - ret = intel_get_param(screen, I915_PARAM_CS_TIMESTAMP_FREQUENCY, + ret = brw_get_param(screen, I915_PARAM_CS_TIMESTAMP_FREQUENCY, &freq); if (ret < 0) { _mesa_warning(NULL, @@ -1893,7 +1893,7 @@ intel_cs_timestamp_frequency(struct brw_screen *screen) } static void -intel_detect_sseu(struct brw_screen *screen) +brw_detect_sseu(struct brw_screen *screen) { assert(screen->devinfo.gen >= 8); int ret; @@ -1901,12 +1901,12 @@ intel_detect_sseu(struct brw_screen *screen) screen->subslice_total = -1; screen->eu_total = -1; - ret = intel_get_param(screen, I915_PARAM_SUBSLICE_TOTAL, + ret = brw_get_param(screen, I915_PARAM_SUBSLICE_TOTAL, &screen->subslice_total); if (ret < 0 && ret != -EINVAL) goto err_out; - ret = intel_get_param(screen, + ret = brw_get_param(screen, I915_PARAM_EU_TOTAL, &screen->eu_total); if (ret < 0 && ret != -EINVAL) goto err_out; @@ -1928,7 +1928,7 @@ err_out: } static bool -intel_init_bufmgr(struct brw_screen *screen) +brw_init_bufmgr(struct brw_screen *screen) { __DRIscreen *dri_screen = screen->driScrnPriv; @@ -1953,7 +1953,7 @@ intel_init_bufmgr(struct brw_screen *screen) } screen->fd = brw_bufmgr_get_fd(screen->bufmgr); - if (!intel_get_boolean(screen, I915_PARAM_HAS_EXEC_NO_RELOC)) { + if (!brw_get_boolean(screen, I915_PARAM_HAS_EXEC_NO_RELOC)) { fprintf(stderr, "[%s: %u] Kernel 3.9 required.\n", __func__, __LINE__); return false; } @@ -1962,7 +1962,7 @@ intel_init_bufmgr(struct brw_screen *screen) } static bool -intel_detect_swizzling(struct brw_screen *screen) +brw_detect_swizzling(struct brw_screen *screen) { /* Broadwell PRM says: * @@ -1993,7 +1993,7 @@ intel_detect_swizzling(struct brw_screen *screen) } static int -intel_detect_timestamp(struct brw_screen *screen) +brw_detect_timestamp(struct brw_screen *screen) { uint64_t dummy = 0, last = 0; int upper, lower, loops; @@ -2044,7 +2044,7 @@ intel_detect_timestamp(struct brw_screen *screen) * try and write a register and see if works. */ static bool -intel_detect_pipelined_register(struct brw_screen *screen, +brw_detect_pipelined_register(struct brw_screen *screen, int reg, uint32_t expected_value, bool reset) { if (screen->no_hw) @@ -2136,7 +2136,7 @@ err: } static bool -intel_detect_pipelined_so(struct brw_screen *screen) +brw_detect_pipelined_so(struct brw_screen *screen) { const struct gen_device_info *devinfo = &screen->devinfo; @@ -2154,7 +2154,7 @@ intel_detect_pipelined_so(struct brw_screen *screen) /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the * statistics registers), and we already reset it to zero before using it. */ - return intel_detect_pipelined_register(screen, + return brw_detect_pipelined_register(screen, GEN7_SO_WRITE_OFFSET(0), 0x1337d0d0, false); @@ -2165,7 +2165,7 @@ intel_detect_pipelined_so(struct brw_screen *screen) * zero-terminated and sorted in decreasing order. */ const int* -intel_supported_msaa_modes(const struct brw_screen *screen) +brw_supported_msaa_modes(const struct brw_screen *screen) { static const int gen9_modes[] = {16, 8, 4, 2, 0, -1}; static const int gen8_modes[] = {8, 4, 2, 0, -1}; @@ -2187,7 +2187,7 @@ intel_supported_msaa_modes(const struct brw_screen *screen) } static unsigned -intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap) +brw_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap) { if (dri_screen->dri2.loader && dri_screen->dri2.loader->base.version >= 4 && dri_screen->dri2.loader->getCapability) @@ -2201,12 +2201,12 @@ intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap) } static bool -intel_allowed_format(__DRIscreen *dri_screen, mesa_format format) +brw_allowed_format(__DRIscreen *dri_screen, mesa_format format) { struct brw_screen *screen = dri_screen->driverPrivate; /* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */ - bool allow_rgba_ordering = intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING); + bool allow_rgba_ordering = brw_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING); if (!allow_rgba_ordering && (format == MESA_FORMAT_R8G8B8A8_UNORM || format == MESA_FORMAT_R8G8B8X8_UNORM || @@ -2230,7 +2230,7 @@ intel_allowed_format(__DRIscreen *dri_screen, mesa_format format) /* Shall we expose fp16 formats? */ bool allow_fp16_configs = driQueryOptionb(&screen->optionCache, "allow_fp16_configs"); - allow_fp16_configs &= intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_FP16); + allow_fp16_configs &= brw_loader_get_cap(dri_screen, DRI_LOADER_CAP_FP16); if (!allow_fp16_configs && (format == MESA_FORMAT_RGBA_FLOAT16 || format == MESA_FORMAT_RGBX_FLOAT16)) @@ -2302,7 +2302,7 @@ brw_screen_make_configs(__DRIscreen *dri_screen) __DRIconfig **new_configs; int num_depth_stencil_bits = 1; - if (!intel_allowed_format(dri_screen, formats[i])) + if (!brw_allowed_format(dri_screen, formats[i])) continue; /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil @@ -2346,7 +2346,7 @@ brw_screen_make_configs(__DRIscreen *dri_screen) for (unsigned i = 0; i < num_formats; i++) { __DRIconfig **new_configs; - if (!intel_allowed_format(dri_screen, formats[i])) + if (!brw_allowed_format(dri_screen, formats[i])) continue; if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { @@ -2390,7 +2390,7 @@ brw_screen_make_configs(__DRIscreen *dri_screen) if (devinfo->gen < 6) break; - if (!intel_allowed_format(dri_screen, formats[i])) + if (!brw_allowed_format(dri_screen, formats[i])) continue; __DRIconfig **new_configs; @@ -2605,7 +2605,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) return NULL; } - if (!intel_init_bufmgr(screen)) + if (!brw_init_bufmgr(screen)) return NULL; brw_process_intel_debug_variable(); @@ -2616,7 +2616,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) intel_debug &= ~DEBUG_SHADER_TIME; } - if (intel_get_integer(screen, I915_PARAM_MMAP_GTT_VERSION) >= 1) { + if (brw_get_integer(screen, I915_PARAM_MMAP_GTT_VERSION) >= 1) { /* Theorectically unlimited! At least for individual objects... * * Currently the entire (global) address space for all GTT maps is @@ -2652,18 +2652,18 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) screen->aperture_threshold = devinfo->aperture_bytes * 3 / 4; - screen->hw_has_swizzling = intel_detect_swizzling(screen); - screen->hw_has_timestamp = intel_detect_timestamp(screen); + screen->hw_has_swizzling = brw_detect_swizzling(screen); + screen->hw_has_timestamp = brw_detect_timestamp(screen); isl_device_init(&screen->isl_dev, &screen->devinfo, screen->hw_has_swizzling); if (devinfo->gen >= 10) - intel_cs_timestamp_frequency(screen); + brw_cs_timestamp_frequency(screen); /* GENs prior to 8 do not support EU/Subslice info */ if (devinfo->gen >= 8) { - intel_detect_sseu(screen); + brw_detect_sseu(screen); } else if (devinfo->gen == 7) { screen->subslice_total = 1 << (devinfo->gt - 1); } @@ -2765,22 +2765,22 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) * means that we can no longer use it as an indicator of the * age of the kernel. */ - if (intel_get_param(screen, I915_PARAM_CMD_PARSER_VERSION, + if (brw_get_param(screen, I915_PARAM_CMD_PARSER_VERSION, &screen->cmd_parser_version) < 0) { /* Command parser does not exist - getparam is unrecognized */ screen->cmd_parser_version = 0; } /* Kernel 4.13 retuired for exec object capture */ - if (intel_get_boolean(screen, I915_PARAM_HAS_EXEC_CAPTURE)) { + if (brw_get_boolean(screen, I915_PARAM_HAS_EXEC_CAPTURE)) { screen->kernel_features |= KERNEL_ALLOWS_EXEC_CAPTURE; } - if (intel_get_boolean(screen, I915_PARAM_HAS_EXEC_BATCH_FIRST)) { + if (brw_get_boolean(screen, I915_PARAM_HAS_EXEC_BATCH_FIRST)) { screen->kernel_features |= KERNEL_ALLOWS_EXEC_BATCH_FIRST; } - if (!intel_detect_pipelined_so(screen)) { + if (!brw_detect_pipelined_so(screen)) { /* We can't do anything, so the effective version is 0. */ screen->cmd_parser_version = 0; } else { @@ -2811,13 +2811,13 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) if (devinfo->gen >= 8 || screen->cmd_parser_version >= 5) screen->kernel_features |= KERNEL_ALLOWS_COMPUTE_DISPATCH; - if (intel_get_boolean(screen, I915_PARAM_HAS_CONTEXT_ISOLATION)) + if (brw_get_boolean(screen, I915_PARAM_HAS_CONTEXT_ISOLATION)) screen->kernel_features |= KERNEL_ALLOWS_CONTEXT_ISOLATION; const char *force_msaa = getenv("INTEL_FORCE_MSAA"); if (force_msaa) { screen->winsys_msaa_samples_override = - intel_quantize_num_samples(screen, atoi(force_msaa)); + brw_quantize_num_samples(screen, atoi(force_msaa)); printf("Forcing winsys sample count to %d\n", screen->winsys_msaa_samples_override); } else { @@ -2866,12 +2866,12 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) screen->compiler->lower_variable_group_size = true; screen->has_exec_fence = - intel_get_boolean(screen, I915_PARAM_HAS_EXEC_FENCE); + brw_get_boolean(screen, I915_PARAM_HAS_EXEC_FENCE); brw_screen_init_surface_formats(screen); if (INTEL_DEBUG & (DEBUG_BATCH | DEBUG_SUBMIT)) { - unsigned int caps = intel_get_integer(screen, I915_PARAM_HAS_SCHEDULER); + unsigned int caps = brw_get_integer(screen, I915_PARAM_HAS_SCHEDULER); if (caps) { fprintf(stderr, "Kernel scheduler detected: %08x\n", caps); if (caps & I915_SCHEDULER_CAP_PRIORITY) diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h index b1a4a16f3c6..e9c6bb919b3 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.h +++ b/src/mesa/drivers/dri/i965/intel_screen.h @@ -140,7 +140,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv, double get_time(void); const int* -intel_supported_msaa_modes(const struct brw_screen *screen); +brw_supported_msaa_modes(const struct brw_screen *screen); static inline bool can_do_pipelined_register_writes(const struct brw_screen *screen) diff --git a/src/mesa/drivers/dri/i965/intel_state.c b/src/mesa/drivers/dri/i965/intel_state.c index 3d477dfcf0f..efb63fb1bd1 100644 --- a/src/mesa/drivers/dri/i965/intel_state.c +++ b/src/mesa/drivers/dri/i965/intel_state.c @@ -33,7 +33,7 @@ #include "brw_defines.h" int -intel_translate_shadow_compare_func(GLenum func) +brw_translate_shadow_compare_func(GLenum func) { /* GL specifies the result of shadow comparisons as: * 1 if ref texel, @@ -69,7 +69,7 @@ intel_translate_shadow_compare_func(GLenum func) } int -intel_translate_compare_func(GLenum func) +brw_translate_compare_func(GLenum func) { switch (func) { case GL_NEVER: @@ -94,7 +94,7 @@ intel_translate_compare_func(GLenum func) } int -intel_translate_stencil_op(GLenum op) +brw_translate_stencil_op(GLenum op) { switch (op) { case GL_KEEP: diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c index bef8ef220f8..25b405a7e60 100644 --- a/src/mesa/drivers/dri/i965/intel_tex.c +++ b/src/mesa/drivers/dri/i965/intel_tex.c @@ -60,8 +60,8 @@ intelDeleteTextureObject(struct gl_context *ctx, } static GLboolean -intel_alloc_texture_image_buffer(struct gl_context *ctx, - struct gl_texture_image *image) +brw_alloc_texture_image_buffer(struct gl_context *ctx, + struct gl_texture_image *image) { struct brw_context *brw = brw_context(ctx); struct brw_texture_image *intel_image = brw_texture_image(image); @@ -72,7 +72,7 @@ intel_alloc_texture_image_buffer(struct gl_context *ctx, /* Quantize sample count */ if (image->NumSamples) { - image->NumSamples = intel_quantize_num_samples(brw->screen, image->NumSamples); + image->NumSamples = brw_quantize_num_samples(brw->screen, image->NumSamples); if (!image->NumSamples) return false; } @@ -120,18 +120,18 @@ intel_alloc_texture_image_buffer(struct gl_context *ctx, * ctx->Driver.AllocTextureStorage() handler. * * Compare this to _mesa_AllocTextureStorage_sw, which would call into - * intel_alloc_texture_image_buffer() above. + * brw_alloc_texture_image_buffer() above. */ static GLboolean -intel_alloc_texture_storage(struct gl_context *ctx, - struct gl_texture_object *texobj, - GLsizei levels, GLsizei width, - GLsizei height, GLsizei depth) +brw_alloc_texture_storage(struct gl_context *ctx, + struct gl_texture_object *texobj, + GLsizei levels, GLsizei width, + GLsizei height, GLsizei depth) { struct brw_context *brw = brw_context(ctx); struct brw_texture_object *intel_texobj = brw_texture_object(texobj); struct gl_texture_image *first_image = texobj->Image[0][0]; - int num_samples = intel_quantize_num_samples(brw->screen, + int num_samples = brw_quantize_num_samples(brw->screen, first_image->NumSamples); const int numFaces = _mesa_num_tex_faces(texobj->Target); int face; @@ -145,7 +145,7 @@ intel_alloc_texture_storage(struct gl_context *ctx, intel_texobj->mt->last_level != levels - 1) { brw_miptree_release(&intel_texobj->mt); - intel_get_image_dims(first_image, &width, &height, &depth); + brw_get_image_dims(first_image, &width, &height, &depth); intel_texobj->mt = brw_miptree_create(brw, texobj->Target, first_image->TexFormat, 0, levels - 1, @@ -184,8 +184,8 @@ intel_alloc_texture_storage(struct gl_context *ctx, static void -intel_free_texture_image_buffer(struct gl_context * ctx, - struct gl_texture_image *texImage) +brw_free_texture_image_buffer(struct gl_context * ctx, + struct gl_texture_image *texImage) { struct brw_texture_image *intelImage = brw_texture_image(texImage); @@ -204,13 +204,13 @@ intel_free_texture_image_buffer(struct gl_context * ctx, * \param rowStrideOut returns row stride in bytes */ static void -intel_map_texture_image(struct gl_context *ctx, - struct gl_texture_image *tex_image, - GLuint slice, - GLuint x, GLuint y, GLuint w, GLuint h, - GLbitfield mode, - GLubyte **map, - GLint *out_stride) +brw_map_texture_image(struct gl_context *ctx, + struct gl_texture_image *tex_image, + GLuint slice, + GLuint x, GLuint y, GLuint w, GLuint h, + GLbitfield mode, + GLubyte **map, + GLint *out_stride) { struct brw_context *brw = brw_context(ctx); struct brw_texture_image *intel_image = brw_texture_image(tex_image); @@ -240,8 +240,8 @@ intel_map_texture_image(struct gl_context *ctx, } static void -intel_unmap_texture_image(struct gl_context *ctx, - struct gl_texture_image *tex_image, GLuint slice) +brw_unmap_texture_image(struct gl_context *ctx, + struct gl_texture_image *tex_image, GLuint slice) { struct brw_context *brw = brw_context(ctx); struct brw_texture_image *intel_image = brw_texture_image(tex_image); @@ -257,8 +257,8 @@ intel_unmap_texture_image(struct gl_context *ctx, static GLboolean brw_texture_view(struct gl_context *ctx, - struct gl_texture_object *texObj, - struct gl_texture_object *origTexObj) + struct gl_texture_object *texObj, + struct gl_texture_object *origTexObj) { struct brw_context *brw = brw_context(ctx); struct brw_texture_object *intel_tex = brw_texture_object(texObj); @@ -297,8 +297,8 @@ brw_texture_view(struct gl_context *ctx, * would have been applied to determine the underlying texture's * mt->format. */ - intel_tex->_Format = intel_depth_format_for_depthstencil_format( - intel_lower_compressed_format(brw, texObj->Image[0][0]->TexFormat)); + intel_tex->_Format = brw_depth_format_for_depthstencil_format( + brw_lower_compressed_format(brw, texObj->Image[0][0]->TexFormat)); return GL_TRUE; } @@ -329,11 +329,11 @@ intelInitTextureFuncs(struct dd_function_table *functions) functions->NewTextureImage = intelNewTextureImage; functions->DeleteTextureImage = intelDeleteTextureImage; functions->DeleteTexture = intelDeleteTextureObject; - functions->AllocTextureImageBuffer = intel_alloc_texture_image_buffer; - functions->FreeTextureImageBuffer = intel_free_texture_image_buffer; - functions->AllocTextureStorage = intel_alloc_texture_storage; - functions->MapTextureImage = intel_map_texture_image; - functions->UnmapTextureImage = intel_unmap_texture_image; + functions->AllocTextureImageBuffer = brw_alloc_texture_image_buffer; + functions->FreeTextureImageBuffer = brw_free_texture_image_buffer; + functions->AllocTextureStorage = brw_alloc_texture_storage; + functions->MapTextureImage = brw_map_texture_image; + functions->UnmapTextureImage = brw_unmap_texture_image; functions->TextureView = brw_texture_view; functions->TextureBarrier = brw_texture_barrier; } diff --git a/src/mesa/drivers/dri/i965/intel_tex.h b/src/mesa/drivers/dri/i965/intel_tex.h index 8e2dd57dfb7..db3d631ab61 100644 --- a/src/mesa/drivers/dri/i965/intel_tex.h +++ b/src/mesa/drivers/dri/i965/intel_tex.h @@ -52,7 +52,7 @@ brw_miptree_create_for_teximage(struct brw_context *brw, struct brw_texture_image *intelImage, enum brw_miptree_create_flags flags); -void intel_finalize_mipmap_tree(struct brw_context *brw, +void brw_finalize_mipmap_tree(struct brw_context *brw, struct gl_texture_object *tex_obj); #endif diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 4ef2efe37c5..afe101c3d1c 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -60,7 +60,7 @@ brw_miptree_create_for_teximage(struct brw_context *brw, const struct brw_mipmap_tree *old_mt = intelObj->mt; const unsigned level = intelImage->base.Base.Level; - intel_get_image_dims(&intelImage->base.Base, &width, &height, &depth); + brw_get_image_dims(&intelImage->base.Base, &width, &height, &depth); if (old_mt) { old_width = old_mt->surf.logical_level0_px.width; @@ -128,12 +128,12 @@ brw_miptree_create_for_teximage(struct brw_context *brw, } static bool -intel_texsubimage_blorp(struct brw_context *brw, GLuint dims, - struct gl_texture_image *tex_image, - unsigned x, unsigned y, unsigned z, - unsigned width, unsigned height, unsigned depth, - GLenum format, GLenum type, const void *pixels, - const struct gl_pixelstore_attrib *packing) +brw_texsubimage_blorp(struct brw_context *brw, GLuint dims, + struct gl_texture_image *tex_image, + unsigned x, unsigned y, unsigned z, + unsigned width, unsigned height, unsigned depth, + GLenum format, GLenum type, const void *pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_texture_image *intel_image = brw_texture_image(tex_image); const unsigned mt_level = tex_image->Level + tex_image->TexObject->Attrib.MinLevel; @@ -174,14 +174,14 @@ intel_texsubimage_blorp(struct brw_context *brw, GLuint dims, * performance gain of this fastpath on Sandybridge is over 5x. */ static bool -intel_texsubimage_tiled_memcpy(struct gl_context * ctx, - GLuint dims, - struct gl_texture_image *texImage, - GLint xoffset, GLint yoffset, GLint zoffset, - GLsizei width, GLsizei height, GLsizei depth, - GLenum format, GLenum type, - const GLvoid *pixels, - const struct gl_pixelstore_attrib *packing) +brw_texsubimage_tiled_memcpy(struct gl_context * ctx, + GLuint dims, + struct gl_texture_image *texImage, + GLint xoffset, GLint yoffset, GLint zoffset, + GLsizei width, GLsizei height, GLsizei depth, + GLenum format, GLenum type, + const GLvoid *pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_context *brw = brw_context(ctx); const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -308,14 +308,14 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, static void -intel_upload_tex(struct gl_context * ctx, - GLuint dims, - struct gl_texture_image *texImage, - GLint xoffset, GLint yoffset, GLint zoffset, - GLsizei width, GLsizei height, GLsizei depth, - GLenum format, GLenum type, - const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing) +brw_upload_tex(struct gl_context * ctx, + GLuint dims, + struct gl_texture_image *texImage, + GLint xoffset, GLint yoffset, GLint zoffset, + GLsizei width, GLsizei height, GLsizei depth, + GLenum format, GLenum type, + const GLvoid * pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_context *brw = brw_context(ctx); struct brw_mipmap_tree *mt = brw_texture_image(texImage)->mt; @@ -330,7 +330,7 @@ intel_upload_tex(struct gl_context * ctx, if (packing->BufferObj || tex_busy || mt->aux_usage == ISL_AUX_USAGE_CCS_E) { - ok = intel_texsubimage_blorp(brw, dims, texImage, + ok = brw_texsubimage_blorp(brw, dims, texImage, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels, packing); @@ -338,7 +338,7 @@ intel_upload_tex(struct gl_context * ctx, return; } - ok = intel_texsubimage_tiled_memcpy(ctx, dims, texImage, + ok = brw_texsubimage_tiled_memcpy(ctx, dims, texImage, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels, packing); @@ -373,7 +373,7 @@ intelTexImage(struct gl_context * ctx, assert(brw_texture_image(texImage)->mt); - intel_upload_tex(ctx, dims, texImage, 0, 0, 0, + brw_upload_tex(ctx, dims, texImage, 0, 0, 0, texImage->Width, texImage->Height, texImage->Depth, format, type, pixels, unpack); } @@ -395,17 +395,17 @@ intelTexSubImage(struct gl_context * ctx, _mesa_enum_to_string(format), _mesa_enum_to_string(type), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); - intel_upload_tex(ctx, dims, texImage, xoffset, yoffset, zoffset, + brw_upload_tex(ctx, dims, texImage, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels, packing); } static void -intel_set_texture_image_mt(struct brw_context *brw, - struct gl_texture_image *image, - GLenum internal_format, - mesa_format format, - struct brw_mipmap_tree *mt) +brw_set_texture_image_mt(struct brw_context *brw, + struct gl_texture_image *image, + GLenum internal_format, + mesa_format format, + struct brw_mipmap_tree *mt) { struct gl_texture_object *texobj = image->TexObject; @@ -453,9 +453,9 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, if (dPriv->lastStamp != dPriv->dri2.stamp || !pDRICtx->driScreenPriv->dri2.useInvalidate) - intel_update_renderbuffers(pDRICtx, dPriv); + brw_update_renderbuffers(pDRICtx, dPriv); - rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); + rb = brw_get_renderbuffer(fb, BUFFER_FRONT_LEFT); /* If the miptree isn't set, then intel_update_renderbuffers was unable * to get the BO for the drawable from the window system. */ @@ -471,7 +471,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, * is a texture with a linear format even if it was rendered with sRGB * encoding enabled. */ - texFormat = _mesa_get_srgb_format_linear(intel_rb_format(rb)); + texFormat = _mesa_get_srgb_format_linear(brw_rb_format(rb)); if (rb->mt->cpp == 4) { /* The extra texture_format parameter indicates whether the alpha @@ -492,7 +492,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, _mesa_lock_texture(&brw->ctx, texObj); texImage = _mesa_get_tex_image(ctx, texObj, target, 0); - intel_set_texture_image_mt(brw, texImage, internal_format, + brw_set_texture_image_mt(brw, texImage, internal_format, texFormat, rb->mt); _mesa_unlock_texture(&brw->ctx, texObj); } @@ -559,9 +559,9 @@ intelReleaseTexBuffer(__DRIcontext *pDRICtx, GLint target, } static GLboolean -intel_bind_renderbuffer_tex_image(struct gl_context *ctx, - struct gl_renderbuffer *rb, - struct gl_texture_image *image) +brw_bind_renderbuffer_tex_image(struct gl_context *ctx, + struct gl_renderbuffer *rb, + struct gl_texture_image *image) { struct brw_renderbuffer *irb = brw_renderbuffer(rb); struct brw_texture_image *intel_image = brw_texture_image(image); @@ -603,11 +603,11 @@ intelSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) } static void -intel_image_target_texture(struct gl_context *ctx, GLenum target, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage, - GLeglImageOES image_handle, - bool storage) +brw_image_target_texture(struct gl_context *ctx, GLenum target, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage, + GLeglImageOES image_handle, + bool storage) { struct brw_context *brw = brw_context(ctx); struct brw_mipmap_tree *mt; @@ -662,28 +662,28 @@ intel_image_target_texture(struct gl_context *ctx, GLenum target, } } - intel_set_texture_image_mt(brw, texImage, internal_format, mt->format, mt); + brw_set_texture_image_mt(brw, texImage, internal_format, mt->format, mt); brw_miptree_release(&mt); } static void -intel_image_target_texture_2d(struct gl_context *ctx, GLenum target, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage, - GLeglImageOES image_handle) +brw_image_target_texture_2d(struct gl_context *ctx, GLenum target, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage, + GLeglImageOES image_handle) { - intel_image_target_texture(ctx, target, texObj, texImage, image_handle, + brw_image_target_texture(ctx, target, texObj, texImage, image_handle, false); } static void -intel_image_target_tex_storage(struct gl_context *ctx, GLenum target, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage, - GLeglImageOES image_handle) +brw_image_target_tex_storage(struct gl_context *ctx, GLenum target, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage, + GLeglImageOES image_handle) { struct brw_texture_object *intel_texobj = brw_texture_object(texObj); - intel_image_target_texture(ctx, target, texObj, texImage, image_handle, + brw_image_target_texture(ctx, target, texObj, texImage, image_handle, true); /* The miptree is in a validated state, so no need to check later. */ @@ -694,12 +694,12 @@ intel_image_target_tex_storage(struct gl_context *ctx, GLenum target, } static bool -intel_gettexsubimage_blorp(struct brw_context *brw, - struct gl_texture_image *tex_image, - unsigned x, unsigned y, unsigned z, - unsigned width, unsigned height, unsigned depth, - GLenum format, GLenum type, const void *pixels, - const struct gl_pixelstore_attrib *packing) +brw_gettexsubimage_blorp(struct brw_context *brw, + struct gl_texture_image *tex_image, + unsigned x, unsigned y, unsigned z, + unsigned width, unsigned height, unsigned depth, + GLenum format, GLenum type, const void *pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_texture_image *intel_image = brw_texture_image(tex_image); const unsigned mt_level = tex_image->Level + tex_image->TexObject->Attrib.MinLevel; @@ -721,16 +721,16 @@ intel_gettexsubimage_blorp(struct brw_context *brw, /** * \brief A fast path for glGetTexImage. * - * \see intel_readpixels_tiled_memcpy() + * \see brw_readpixels_tiled_memcpy() */ static bool -intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, - struct gl_texture_image *texImage, - GLint xoffset, GLint yoffset, - GLsizei width, GLsizei height, - GLenum format, GLenum type, - GLvoid *pixels, - const struct gl_pixelstore_attrib *packing) +brw_gettexsubimage_tiled_memcpy(struct gl_context *ctx, + struct gl_texture_image *texImage, + GLint xoffset, GLint yoffset, + GLsizei width, GLsizei height, + GLenum format, GLenum type, + GLvoid *pixels, + const struct gl_pixelstore_attrib *packing) { struct brw_context *brw = brw_context(ctx); const struct gen_device_info *devinfo = &brw->screen->devinfo; @@ -857,11 +857,11 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, } static void -intel_get_tex_sub_image(struct gl_context *ctx, - GLint xoffset, GLint yoffset, GLint zoffset, - GLsizei width, GLsizei height, GLint depth, - GLenum format, GLenum type, GLvoid *pixels, - struct gl_texture_image *texImage) +brw_get_tex_sub_image(struct gl_context *ctx, + GLint xoffset, GLint yoffset, GLint zoffset, + GLsizei width, GLsizei height, GLint depth, + GLenum format, GLenum type, GLvoid *pixels, + struct gl_texture_image *texImage) { struct brw_context *brw = brw_context(ctx); bool ok; @@ -869,7 +869,7 @@ intel_get_tex_sub_image(struct gl_context *ctx, DBG("%s\n", __func__); if (ctx->Pack.BufferObj) { - if (intel_gettexsubimage_blorp(brw, texImage, + if (brw_gettexsubimage_blorp(brw, texImage, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels, &ctx->Pack)) @@ -878,7 +878,7 @@ intel_get_tex_sub_image(struct gl_context *ctx, perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__); } - ok = intel_gettexsubimage_tiled_memcpy(ctx, texImage, xoffset, yoffset, + ok = brw_gettexsubimage_tiled_memcpy(ctx, texImage, xoffset, yoffset, width, height, format, type, pixels, &ctx->Pack); @@ -984,8 +984,8 @@ intelInitTextureImageFuncs(struct dd_function_table *functions) functions->TexImage = intelTexImage; functions->TexSubImage = intelTexSubImage; functions->CompressedTexSubImage = intelCompressedTexSubImage; - functions->EGLImageTargetTexture2D = intel_image_target_texture_2d; - functions->EGLImageTargetTexStorage = intel_image_target_tex_storage; - functions->BindRenderbufferTexImage = intel_bind_renderbuffer_tex_image; - functions->GetTexSubImage = intel_get_tex_sub_image; + functions->EGLImageTargetTexture2D = brw_image_target_texture_2d; + functions->EGLImageTargetTexStorage = brw_image_target_tex_storage; + functions->BindRenderbufferTexImage = brw_bind_renderbuffer_tex_image; + functions->GetTexSubImage = brw_get_tex_sub_image; } diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c index 3c9ea01a286..89fed9c4e1a 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_validate.c +++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c @@ -42,8 +42,8 @@ * allow sampling beyond level 0. */ static void -intel_update_max_level(struct gl_texture_object *tObj, - struct gl_sampler_object *sampler) +brw_update_max_level(struct gl_texture_object *tObj, + struct gl_sampler_object *sampler) { struct brw_texture_object *intelObj = brw_texture_object(tObj); @@ -64,7 +64,7 @@ intel_update_max_level(struct gl_texture_object *tObj, * stored in other miptrees. */ void -intel_finalize_mipmap_tree(struct brw_context *brw, +brw_finalize_mipmap_tree(struct brw_context *brw, struct gl_texture_object *tObj) { struct brw_texture_object *intelObj = brw_texture_object(tObj); @@ -120,7 +120,7 @@ intel_finalize_mipmap_tree(struct brw_context *brw, */ if (!intelObj->mt) { const unsigned level = firstImage->base.Base.Level; - intel_get_image_dims(&firstImage->base.Base, &width, &height, &depth); + brw_get_image_dims(&firstImage->base.Base, &width, &height, &depth); /* Figure out image dimensions at start level. */ switch(intelObj->base.Target) { case GL_TEXTURE_2D_MULTISAMPLE: @@ -215,7 +215,7 @@ brw_validate_textures(struct brw_context *brw) */ assert(tex_obj->_BaseComplete); - intel_update_max_level(tex_obj, sampler); - intel_finalize_mipmap_tree(brw, tex_obj); + brw_update_max_level(tex_obj, sampler); + brw_finalize_mipmap_tree(brw, tex_obj); } }