diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 33fc9c55ee8..26d897b741b 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -32,6 +32,9 @@
  * dispatches from the current IB to finish. */
 #define RADEON_FLUSH_START_NEXT_GFX_IB_NOW (1u << 31)
 
+/* Toggle the secure submission boolean after the flush */
+#define RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION (1u << 30)
+
 #define RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW                                                   \
    (PIPE_FLUSH_ASYNC | RADEON_FLUSH_START_NEXT_GFX_IB_NOW)
 
@@ -692,7 +695,6 @@ struct radeon_winsys {
     */
    bool (*ws_uses_secure_bo)(struct radeon_winsys *ws);
    bool (*cs_is_secure)(struct radeon_cmdbuf *cs);
-   void (*cs_set_secure)(struct radeon_cmdbuf *cs, bool secure);
 };
 
 static inline bool radeon_emitted(struct radeon_cmdbuf *cs, unsigned num_dw)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 9fce8fd7fff..23a65308813 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -851,8 +851,9 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
    if (unlikely(sctx->ws->ws_uses_secure_bo(sctx->ws))) {
       bool secure = si_compute_resources_check_encrypted(sctx);
       if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
-         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
-         sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
+         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW |
+                               RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION,
+                         NULL);
       }
    }
 
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 926feaf9ed0..71e3bdb8bde 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -343,8 +343,8 @@ void si_cp_dma_copy_buffer(struct si_context *sctx, struct pipe_resource *dst,
       bool secure = src && (si_resource(src)->flags & RADEON_FLAG_ENCRYPTED);
       assert(!secure || (!dst || (si_resource(dst)->flags & RADEON_FLAG_ENCRYPTED)));
       if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
-         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
-         sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
+         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW |
+                               RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION, NULL);
       }
    }
 
diff --git a/src/gallium/drivers/radeonsi/si_dma_cs.c b/src/gallium/drivers/radeonsi/si_dma_cs.c
index 309be4ae620..d5d0e892989 100644
--- a/src/gallium/drivers/radeonsi/si_dma_cs.c
+++ b/src/gallium/drivers/radeonsi/si_dma_cs.c
@@ -75,7 +75,7 @@ void si_sdma_clear_buffer(struct si_context *sctx, struct pipe_resource *dst, ui
 
    if (!cs || dst->flags & PIPE_RESOURCE_FLAG_SPARSE ||
        sctx->screen->debug_flags & DBG(NO_SDMA_CLEARS) ||
-       sctx->ws->ws_uses_secure_bo(sctx->ws)) {
+       unlikely(sctx->ws->ws_uses_secure_bo(sctx->ws))) {
       sctx->b.clear_buffer(&sctx->b, dst, offset, size, &clear_value, 4);
       return;
    }
@@ -260,10 +260,10 @@ void si_need_dma_space(struct si_context *ctx, unsigned num_dw, struct si_resour
         !ws->cs_check_space(ctx->sdma_cs, num_dw, false) ||
         ctx->sdma_cs->used_vram + ctx->sdma_cs->used_gart > 64 * 1024 * 1024 ||
         !radeon_cs_memory_below_limit(ctx->screen, ctx->sdma_cs, vram, gtt))) {
-      si_flush_dma_cs(ctx, PIPE_FLUSH_ASYNC, NULL);
+      si_flush_dma_cs(ctx, PIPE_FLUSH_ASYNC | RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION, NULL);
+      assert(ctx->ws->cs_is_secure(ctx->sdma_cs) == use_secure_cmd);
       assert((num_dw + ctx->sdma_cs->current.cdw) <= ctx->sdma_cs->current.max_dw);
    }
-   ctx->ws->cs_set_secure(ctx->sdma_cs, use_secure_cmd);
 
    /* Wait for idle if either buffer has been used in the IB before to
     * prevent read-after-write hazards.
@@ -290,7 +290,8 @@ void si_flush_dma_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
    struct radeon_saved_cs saved;
    bool check_vm = (ctx->screen->debug_flags & DBG(CHECK_VM)) != 0;
 
-   if (!radeon_emitted(cs, 0)) {
+   if (!radeon_emitted(cs, 0) &&
+       !(flags & RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION)) {
       if (fence)
          ctx->ws->fence_reference(fence, ctx->last_sdma_fence);
       return;
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 6a92e9860e4..235b00021e9 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -102,7 +102,9 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
    }
 
    /* Drop this flush if it's a no-op. */
-   if (!radeon_emitted(cs, ctx->initial_gfx_cs_size) && (!wait_flags || !ctx->gfx_last_ib_is_busy))
+   if (!radeon_emitted(cs, ctx->initial_gfx_cs_size) &&
+       (!wait_flags || !ctx->gfx_last_ib_is_busy) &&
+       !(flags & RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION))
       return;
 
    if (ctx->b.get_device_reset_status(&ctx->b) != PIPE_NO_RESET)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 77414a577ae..a88311e22f1 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -2037,8 +2037,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
    if (unlikely(sctx->ws->ws_uses_secure_bo(sctx->ws))) {
       bool secure = si_gfx_resources_check_encrypted(sctx);
       if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
-         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
-         sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
+         si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW |
+                               RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION, NULL);
       }
    }
 
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 319c58cd200..ded4c57f5e9 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -1420,7 +1420,7 @@ static bool amdgpu_add_sparse_backing_buffers(struct amdgpu_cs_context *cs)
    return true;
 }
 
-void amdgpu_cs_submit_ib(void *job, int thread_index)
+static void amdgpu_cs_submit_ib(void *job, int thread_index)
 {
    struct amdgpu_cs *acs = (struct amdgpu_cs*)job;
    struct amdgpu_winsys *ws = acs->ctx->ws;
@@ -1839,6 +1839,12 @@ static int amdgpu_cs_flush(struct radeon_cmdbuf *rcs,
       /* Submit. */
       util_queue_add_job(&ws->cs_queue, cs, &cs->flush_completed,
                          amdgpu_cs_submit_ib, NULL, 0);
+
+      if (flags & RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION)
+         cs->csc->secure = !cs->cst->secure;
+      else
+         cs->csc->secure = cs->cst->secure;
+
       /* The submission has been queued, unlock the fence now. */
       simple_mtx_unlock(&ws->bo_fence_lock);
 
@@ -1847,6 +1853,8 @@ static int amdgpu_cs_flush(struct radeon_cmdbuf *rcs,
          error_code = cur->error_code;
       }
    } else {
+      if (flags & RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION)
+         cs->csc->secure = !cs->csc->secure;
       amdgpu_cs_context_cleanup(cs->csc);
    }
 
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index 138e0b0adcc..5c8ba753609 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -282,6 +282,5 @@ void amdgpu_add_fences(struct amdgpu_winsys_bo *bo,
                        struct pipe_fence_handle **fences);
 void amdgpu_cs_sync_flush(struct radeon_cmdbuf *rcs);
 void amdgpu_cs_init_functions(struct amdgpu_screen_winsys *ws);
-void amdgpu_cs_submit_ib(void *job, int thread_index);
 
 #endif
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index e5db23aa109..9f0724047ab 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -339,12 +339,6 @@ static bool amdgpu_cs_is_secure(struct radeon_cmdbuf *rcs)
    return cs->csc->secure;
 }
 
-static void amdgpu_cs_set_secure(struct radeon_cmdbuf *rcs, bool secure)
-{
-   struct amdgpu_cs *cs = amdgpu_cs(rcs);
-   cs->csc->secure = secure;
-}
-
 PUBLIC struct radeon_winsys *
 amdgpu_winsys_create(int fd, const struct pipe_screen_config *config,
 		     radeon_screen_create_t screen_create)
@@ -520,7 +514,6 @@ amdgpu_winsys_create(int fd, const struct pipe_screen_config *config,
    ws->base.pin_threads_to_L3_cache = amdgpu_pin_threads_to_L3_cache;
    ws->base.ws_uses_secure_bo = amdgpu_ws_uses_secure_bo;
    ws->base.cs_is_secure = amdgpu_cs_is_secure;
-   ws->base.cs_set_secure = amdgpu_cs_set_secure;
 
    amdgpu_bo_init_functions(ws);
    amdgpu_cs_init_functions(ws);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 225d396f9ec..4e83c3ccc58 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -813,10 +813,6 @@ static bool radeon_cs_is_secure(struct radeon_cmdbuf* cs)
     return false;
 }
 
-static void radeon_cs_set_secure(struct radeon_cmdbuf* cs, bool enable)
-{
-}
-
 PUBLIC struct radeon_winsys *
 radeon_drm_winsys_create(int fd, const struct pipe_screen_config *config,
                          radeon_screen_create_t screen_create)
@@ -890,7 +886,6 @@ radeon_drm_winsys_create(int fd, const struct pipe_screen_config *config,
    ws->base.read_registers = radeon_read_registers;
    ws->base.ws_uses_secure_bo = radeon_ws_uses_secure_bo;
    ws->base.cs_is_secure = radeon_cs_is_secure;
-   ws->base.cs_set_secure = radeon_cs_set_secure;
 
    radeon_drm_bo_init_functions(ws);
    radeon_drm_cs_init_functions(ws);