From 559d94cd0d77bf326d55682832b2ef1f3294728e Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Mon, 19 Feb 2024 22:25:16 -0800 Subject: [PATCH] intel/brw: Use fs_visitor instead of backend_shader in various passes And since we are touching them, rename a couple of passes to follow same name convention as existing ones. Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_cfg.cpp | 7 +++-- src/intel/compiler/brw_cfg.h | 5 +-- src/intel/compiler/brw_dead_control_flow.cpp | 4 +-- src/intel/compiler/brw_dead_control_flow.h | 31 ------------------- src/intel/compiler/brw_fs.cpp | 2 +- src/intel/compiler/brw_fs.h | 8 +++-- src/intel/compiler/brw_fs_live_variables.cpp | 4 +-- src/intel/compiler/brw_fs_live_variables.h | 6 ++-- src/intel/compiler/brw_fs_lower_dpas.cpp | 2 +- src/intel/compiler/brw_fs_opt.cpp | 7 ++--- src/intel/compiler/brw_fs_reg_allocate.cpp | 4 +-- src/intel/compiler/brw_fs_scoreboard.cpp | 2 +- src/intel/compiler/brw_fs_visitor.cpp | 6 ++-- src/intel/compiler/brw_ir_performance.cpp | 2 +- src/intel/compiler/brw_ir_performance.h | 4 ++- src/intel/compiler/brw_predicated_break.cpp | 4 +-- .../compiler/brw_schedule_instructions.cpp | 4 +-- src/intel/compiler/brw_shader.cpp | 3 +- src/intel/compiler/brw_shader.h | 3 -- src/intel/compiler/meson.build | 1 - src/intel/compiler/test_predicated_break.cpp | 2 +- 21 files changed, 40 insertions(+), 71 deletions(-) delete mode 100644 src/intel/compiler/brw_dead_control_flow.h diff --git a/src/intel/compiler/brw_cfg.cpp b/src/intel/compiler/brw_cfg.cpp index 01cb42635c1..3f30b71ce2b 100644 --- a/src/intel/compiler/brw_cfg.cpp +++ b/src/intel/compiler/brw_cfg.cpp @@ -27,7 +27,7 @@ #include "brw_cfg.h" #include "util/u_dynarray.h" -#include "brw_shader.h" +#include "brw_fs.h" /** @file brw_cfg.cpp * @@ -617,7 +617,8 @@ sort_links(util_dynarray *scratch, exec_list *list) void cfg_t::dump(FILE *file) { - const idom_tree *idom = (s ? &s->idom_analysis.require() : NULL); + const fs_visitor *fs = static_cast(s); + const idom_tree *idom = (fs ? &fs->idom_analysis.require() : NULL); /* Temporary storage to sort the lists of blocks. This normalizes the * output, making it possible to use it for certain tests. @@ -658,7 +659,7 @@ cfg_t::dump(FILE *file) * (less than 1000 nodes) that this algorithm is significantly faster than * others like Lengauer-Tarjan. */ -idom_tree::idom_tree(const backend_shader *s) : +idom_tree::idom_tree(const fs_visitor *s) : num_parents(s->cfg->num_blocks), parents(new bblock_t *[num_parents]()) { diff --git a/src/intel/compiler/brw_cfg.h b/src/intel/compiler/brw_cfg.h index 7784ab43784..c3da9eca940 100644 --- a/src/intel/compiler/brw_cfg.h +++ b/src/intel/compiler/brw_cfg.h @@ -73,6 +73,7 @@ struct bblock_link { enum bblock_link_kind kind; }; +struct fs_visitor; struct backend_shader; struct cfg_t; @@ -486,11 +487,11 @@ namespace brw { * Immediate dominator tree analysis of a shader. */ struct idom_tree { - idom_tree(const backend_shader *s); + idom_tree(const fs_visitor *s); ~idom_tree(); bool - validate(const backend_shader *) const + validate(const fs_visitor *) const { /* FINISHME */ return true; diff --git a/src/intel/compiler/brw_dead_control_flow.cpp b/src/intel/compiler/brw_dead_control_flow.cpp index 03295f87ce4..665ab216778 100644 --- a/src/intel/compiler/brw_dead_control_flow.cpp +++ b/src/intel/compiler/brw_dead_control_flow.cpp @@ -26,7 +26,7 @@ * This file implements the dead control flow elimination optimization pass. */ -#include "brw_shader.h" +#include "brw_fs.h" #include "brw_cfg.h" using namespace brw; @@ -38,7 +38,7 @@ using namespace brw; * - then in if/else/endif */ bool -dead_control_flow_eliminate(backend_shader &s) +brw_fs_opt_dead_control_flow_eliminate(fs_visitor &s) { bool progress = false; diff --git a/src/intel/compiler/brw_dead_control_flow.h b/src/intel/compiler/brw_dead_control_flow.h deleted file mode 100644 index 95f878ebb4e..00000000000 --- a/src/intel/compiler/brw_dead_control_flow.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#ifndef BRW_DEAD_CONTROL_FLOW_H -#define BRW_DEAD_CONTROL_FLOW_H - -#include "brw_shader.h" - -bool dead_control_flow_eliminate(backend_shader &s); - -#endif /* BRW_DEAD_CONTROL_FLOW_H */ diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index fe194863294..e339cc482c5 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -34,7 +34,6 @@ #include "brw_fs_live_variables.h" #include "brw_nir.h" #include "brw_cfg.h" -#include "brw_dead_control_flow.h" #include "brw_private.h" #include "intel_nir.h" #include "shader_enums.h" @@ -2421,6 +2420,7 @@ fs_visitor::invalidate_analysis(brw::analysis_dependency_class c) backend_shader::invalidate_analysis(c); live_analysis.invalidate(c); regpressure_analysis.invalidate(c); + idom_analysis.invalidate(c); } void diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 9e246cfdcca..e1cf9782d36 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -297,9 +297,10 @@ public: struct brw_stage_prog_data *prog_data; - brw_analysis live_analysis; + brw_analysis live_analysis; brw_analysis regpressure_analysis; brw_analysis performance_analysis; + brw_analysis idom_analysis; /** Number of uniform variable components visited. */ unsigned uniforms; @@ -537,8 +538,6 @@ void brw_emit_predicate_on_sample_mask(const brw::fs_builder &bld, fs_inst *inst int brw_get_subgroup_id_param_index(const intel_device_info *devinfo, const brw_stage_prog_data *prog_data); -bool brw_lower_dpas(fs_visitor &v); - void nir_to_brw(fs_visitor *s); void brw_fs_optimize(fs_visitor &s); @@ -547,6 +546,7 @@ bool brw_fs_lower_3src_null_dest(fs_visitor &s); bool brw_fs_lower_barycentrics(fs_visitor &s); bool brw_fs_lower_constant_loads(fs_visitor &s); bool brw_fs_lower_derivatives(fs_visitor &s); +bool brw_fs_lower_dpas(fs_visitor &s); bool brw_fs_lower_find_live_channel(fs_visitor &s); bool brw_fs_lower_integer_multiplication(fs_visitor &s); bool brw_fs_lower_logical_sends(fs_visitor &s); @@ -567,8 +567,10 @@ bool brw_fs_opt_compact_virtual_grfs(fs_visitor &s); bool brw_fs_opt_copy_propagation(fs_visitor &s); bool brw_fs_opt_cse(fs_visitor &s); bool brw_fs_opt_dead_code_eliminate(fs_visitor &s); +bool brw_fs_opt_dead_control_flow_eliminate(fs_visitor &s); bool brw_fs_opt_eliminate_find_live_channel(fs_visitor &s); bool brw_fs_opt_peephole_sel(fs_visitor &s); +bool brw_fs_opt_predicated_break(fs_visitor &s); bool brw_fs_opt_register_coalesce(fs_visitor &s); bool brw_fs_opt_remove_extra_rounding_modes(fs_visitor &s); bool brw_fs_opt_remove_redundant_halts(fs_visitor &s); diff --git a/src/intel/compiler/brw_fs_live_variables.cpp b/src/intel/compiler/brw_fs_live_variables.cpp index c6361d67d95..08bbecce81d 100644 --- a/src/intel/compiler/brw_fs_live_variables.cpp +++ b/src/intel/compiler/brw_fs_live_variables.cpp @@ -246,7 +246,7 @@ fs_live_variables::compute_start_end() } } -fs_live_variables::fs_live_variables(const backend_shader *s) +fs_live_variables::fs_live_variables(const fs_visitor *s) : devinfo(s->devinfo), cfg(s->cfg) { mem_ctx = ralloc_context(NULL); @@ -334,7 +334,7 @@ check_register_live_range(const fs_live_variables *live, int ip, } bool -fs_live_variables::validate(const backend_shader *s) const +fs_live_variables::validate(const fs_visitor *s) const { int ip = 0; diff --git a/src/intel/compiler/brw_fs_live_variables.h b/src/intel/compiler/brw_fs_live_variables.h index 1c77efa0c19..d78653d13b6 100644 --- a/src/intel/compiler/brw_fs_live_variables.h +++ b/src/intel/compiler/brw_fs_live_variables.h @@ -33,7 +33,7 @@ #include "util/bitset.h" struct cfg_t; -struct backend_shader; +struct fs_visitor; namespace brw { @@ -77,10 +77,10 @@ public: BITSET_WORD flag_liveout[1]; }; - fs_live_variables(const backend_shader *s); + fs_live_variables(const fs_visitor *s); ~fs_live_variables(); - bool validate(const backend_shader *s) const; + bool validate(const fs_visitor *s) const; analysis_dependency_class dependency_class() const diff --git a/src/intel/compiler/brw_fs_lower_dpas.cpp b/src/intel/compiler/brw_fs_lower_dpas.cpp index 306731722af..2a90fb9f86b 100644 --- a/src/intel/compiler/brw_fs_lower_dpas.cpp +++ b/src/intel/compiler/brw_fs_lower_dpas.cpp @@ -275,7 +275,7 @@ int8_using_mul_add(const fs_builder &bld, fs_inst *inst) } bool -brw_lower_dpas(fs_visitor &v) +brw_fs_lower_dpas(fs_visitor &v) { bool progress = false; diff --git a/src/intel/compiler/brw_fs_opt.cpp b/src/intel/compiler/brw_fs_opt.cpp index b32aca6d1d7..42d444cebfa 100644 --- a/src/intel/compiler/brw_fs_opt.cpp +++ b/src/intel/compiler/brw_fs_opt.cpp @@ -3,7 +3,6 @@ * SPDX-License-Identifier: MIT */ -#include "brw_dead_control_flow.h" #include "brw_eu.h" #include "brw_fs.h" #include "brw_fs_builder.h" @@ -44,7 +43,7 @@ brw_fs_optimize(fs_visitor &s) s.validate(); if (s.compiler->lower_dpas) - OPT(brw_lower_dpas); + OPT(brw_fs_lower_dpas); OPT(brw_fs_opt_split_virtual_grfs); @@ -66,11 +65,11 @@ brw_fs_optimize(fs_visitor &s) OPT(brw_fs_opt_algebraic); OPT(brw_fs_opt_cse); OPT(brw_fs_opt_copy_propagation); - OPT(opt_predicated_break); + OPT(brw_fs_opt_predicated_break); OPT(brw_fs_opt_cmod_propagation); OPT(brw_fs_opt_dead_code_eliminate); OPT(brw_fs_opt_peephole_sel); - OPT(dead_control_flow_eliminate); + OPT(brw_fs_opt_dead_control_flow_eliminate); OPT(brw_fs_opt_saturate_propagation); OPT(brw_fs_opt_register_coalesce); OPT(brw_fs_opt_eliminate_find_live_channel); diff --git a/src/intel/compiler/brw_fs_reg_allocate.cpp b/src/intel/compiler/brw_fs_reg_allocate.cpp index 1cbeaa11b66..ae03b23d6a0 100644 --- a/src/intel/compiler/brw_fs_reg_allocate.cpp +++ b/src/intel/compiler/brw_fs_reg_allocate.cpp @@ -364,7 +364,7 @@ namespace { * into multiple (force_writemask_all) scratch messages. */ unsigned - spill_max_size(const backend_shader *s) + spill_max_size(const fs_visitor *s) { /* LSC is limited to SIMD16 sends */ if (s->devinfo->has_lsc) @@ -379,7 +379,7 @@ namespace { * backend_shader (or some nonexistent fs_shader class?) * rather than in the visitor class. */ - return static_cast(s)->dispatch_width / 8; + return s->dispatch_width / 8; } } diff --git a/src/intel/compiler/brw_fs_scoreboard.cpp b/src/intel/compiler/brw_fs_scoreboard.cpp index 8996c3cbd0a..5b97d232877 100644 --- a/src/intel/compiler/brw_fs_scoreboard.cpp +++ b/src/intel/compiler/brw_fs_scoreboard.cpp @@ -250,7 +250,7 @@ namespace { * Return the number of instructions in the program. */ unsigned - num_instructions(const backend_shader *shader) + num_instructions(const fs_visitor *shader) { return shader->cfg->blocks[shader->cfg->num_blocks - 1]->end_ip + 1; } diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp index cade905f73b..f935c129432 100644 --- a/src/intel/compiler/brw_fs_visitor.cpp +++ b/src/intel/compiler/brw_fs_visitor.cpp @@ -989,7 +989,7 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, : backend_shader(compiler, params, shader, prog_data, debug_enabled), key(key), gs_compile(NULL), prog_data(prog_data), live_analysis(this), regpressure_analysis(this), - performance_analysis(this), + performance_analysis(this), idom_analysis(this), needs_register_pressure(needs_register_pressure), dispatch_width(dispatch_width), max_polygons(0), @@ -1010,7 +1010,7 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, debug_enabled), key(&key->base), gs_compile(NULL), prog_data(&prog_data->base), live_analysis(this), regpressure_analysis(this), - performance_analysis(this), + performance_analysis(this), idom_analysis(this), needs_register_pressure(needs_register_pressure), dispatch_width(dispatch_width), max_polygons(max_polygons), @@ -1035,7 +1035,7 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, key(&c->key.base), gs_compile(c), prog_data(&prog_data->base.base), live_analysis(this), regpressure_analysis(this), - performance_analysis(this), + performance_analysis(this), idom_analysis(this), needs_register_pressure(needs_register_pressure), dispatch_width(compiler->devinfo->ver >= 20 ? 16 : 8), max_polygons(0), diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp index c91b5c12d39..b172a24d54e 100644 --- a/src/intel/compiler/brw_ir_performance.cpp +++ b/src/intel/compiler/brw_ir_performance.cpp @@ -1013,7 +1013,7 @@ namespace { * Estimate the performance of the specified shader. */ void - calculate_performance(performance &p, const backend_shader *s, + calculate_performance(performance &p, const fs_visitor *s, void (*issue_instruction)( state &, const struct brw_isa_info *, const backend_instruction *), diff --git a/src/intel/compiler/brw_ir_performance.h b/src/intel/compiler/brw_ir_performance.h index 80dc95b0d2e..baf694ac7e7 100644 --- a/src/intel/compiler/brw_ir_performance.h +++ b/src/intel/compiler/brw_ir_performance.h @@ -25,6 +25,8 @@ #ifndef BRW_IR_PERFORMANCE_H #define BRW_IR_PERFORMANCE_H +#include "brw_ir_analysis.h" + class fs_visitor; namespace brw { @@ -44,7 +46,7 @@ namespace brw { } bool - validate(const backend_shader *) const + validate(const fs_visitor *) const { return true; } diff --git a/src/intel/compiler/brw_predicated_break.cpp b/src/intel/compiler/brw_predicated_break.cpp index 8ec7f150f5e..f375b14e1f0 100644 --- a/src/intel/compiler/brw_predicated_break.cpp +++ b/src/intel/compiler/brw_predicated_break.cpp @@ -21,7 +21,7 @@ * IN THE SOFTWARE. */ -#include "brw_shader.h" +#include "brw_fs.h" using namespace brw; @@ -99,7 +99,7 @@ has_continue(const struct loop_continue_tracking *s) } bool -opt_predicated_break(backend_shader &s) +brw_fs_opt_predicated_break(fs_visitor &s) { bool progress = false; struct loop_continue_tracking state = { {0, }, 0 }; diff --git a/src/intel/compiler/brw_schedule_instructions.cpp b/src/intel/compiler/brw_schedule_instructions.cpp index 2932ccf23f8..34a8eecd87d 100644 --- a/src/intel/compiler/brw_schedule_instructions.cpp +++ b/src/intel/compiler/brw_schedule_instructions.cpp @@ -586,7 +586,7 @@ schedule_node::set_latency(const struct brw_isa_info *isa) class instruction_scheduler { public: - instruction_scheduler(void *mem_ctx, const backend_shader *s, int grf_count, + instruction_scheduler(void *mem_ctx, const fs_visitor *s, int grf_count, int grf_write_scale, bool post_reg_alloc): bs(s) { @@ -662,7 +662,7 @@ public: bool post_reg_alloc; int grf_count; - const backend_shader *bs; + const fs_visitor *bs; /** * Last instruction to have written the grf (or a channel in the grf, for the diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 6999e3152af..01c338c08c4 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -601,7 +601,7 @@ backend_shader::backend_shader(const struct brw_compiler *compiler, nir(shader), stage_prog_data(stage_prog_data), mem_ctx(params->mem_ctx), - cfg(NULL), idom_analysis(this), + cfg(NULL), stage(shader->info.stage), debug_enabled(debug_enabled) { @@ -1156,7 +1156,6 @@ backend_shader::calculate_cfg() void backend_shader::invalidate_analysis(brw::analysis_dependency_class c) { - idom_analysis.invalidate(c); } extern "C" const unsigned * diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h index f0d3737ecf9..2da97775db9 100644 --- a/src/intel/compiler/brw_shader.h +++ b/src/intel/compiler/brw_shader.h @@ -72,7 +72,6 @@ public: exec_list instructions; cfg_t *cfg; - brw_analysis idom_analysis; gl_shader_stage stage; bool debug_enabled; @@ -93,8 +92,6 @@ public: virtual void invalidate_analysis(brw::analysis_dependency_class c); }; -bool opt_predicated_break(backend_shader &s); - #else struct backend_shader; #endif /* __cplusplus */ diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build index dfe58f3c773..e9970673966 100644 --- a/src/intel/compiler/meson.build +++ b/src/intel/compiler/meson.build @@ -45,7 +45,6 @@ libintel_compiler_brw_files = files( 'brw_compiler.c', 'brw_compiler.h', 'brw_dead_control_flow.cpp', - 'brw_dead_control_flow.h', 'brw_debug_recompile.c', 'brw_disasm.c', 'brw_disasm_info.c', diff --git a/src/intel/compiler/test_predicated_break.cpp b/src/intel/compiler/test_predicated_break.cpp index 60d93fe6b5b..3672a2d4ff8 100644 --- a/src/intel/compiler/test_predicated_break.cpp +++ b/src/intel/compiler/test_predicated_break.cpp @@ -77,7 +77,7 @@ PredicatedBreakTest::opt_predicated_break(fs_visitor *s) s->cfg->dump(); } - bool ret = ::opt_predicated_break(*s); + bool ret = brw_fs_opt_predicated_break(*s); if (print) { fprintf(stderr, "\n= After =\n");