From 535f0b9391446d49e3cb8bea33be6c5afc006a5a Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Sun, 17 Apr 2022 11:51:35 +0200 Subject: [PATCH] ntt: Add option to not optimized register allocation On virglrenderer it is of interest to not re-use temporaries when we want to handle precise, invariant, and highp/mediump with better possibility for optimization. v2: Force optimized RA if the number of registers is too large (Emma: only 16 bit signed int are reserved for register indices) Signed-off-by: Gert Wollny Reviewed-by: Emma Anholt Part-of: --- src/gallium/auxiliary/nir/nir_to_tgsi.c | 17 ++++++++++++++++- src/gallium/auxiliary/nir/nir_to_tgsi.h | 1 + 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c index 7cd2c98d620..96a9e2297f8 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.c +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c @@ -523,6 +523,14 @@ ntt_allocate_regs(struct ntt_compile *c, nir_function_impl *impl) } } +static void +ntt_allocate_regs_unoptimized(struct ntt_compile *c, nir_function_impl *impl) +{ + for (int i = c->first_non_array_temp; i < c->num_temps; i++) + ureg_DECL_temporary(c->ureg); +} + + /** * Try to find an iadd of a constant value with a non-constant value in the * nir_src's first component, returning the constant offset and replacing *src @@ -3048,6 +3056,7 @@ ntt_emit_impl(struct ntt_compile *c, nir_function_impl *impl) _mesa_hash_table_insert(c->blocks, block, ntt_block); } + ntt_setup_registers(c, &impl->registers); c->cur_block = ntt_block_from_nir(c, nir_start_block(impl)); @@ -3058,7 +3067,13 @@ ntt_emit_impl(struct ntt_compile *c, nir_function_impl *impl) /* Emit the ntt insns */ ntt_emit_cf_list(c, &impl->body); - ntt_allocate_regs(c, impl); + /* Don't do optimized RA if the driver requests it, unless the number of + * temps is too large to be covered by the 16 bit signed int that TGSI + * allocates for the register index */ + if (!c->options->unoptimized_ra || c->num_temps > 0x7fff) + ntt_allocate_regs(c, impl); + else + ntt_allocate_regs_unoptimized(c, impl); /* Turn the ntt insns into actual TGSI tokens */ ntt_emit_cf_list_ureg(c, &impl->body); diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.h b/src/gallium/auxiliary/nir/nir_to_tgsi.h index 3d1d5166991..e77d7523ce3 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.h +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.h @@ -33,6 +33,7 @@ struct nir_to_tgsi_options { bool lower_cmp; /* Emit MAX(a,-a) instead of abs src modifier) */ bool lower_fabs; + bool unoptimized_ra; }; const void *nir_to_tgsi(struct nir_shader *s,