From 52f94e2b93a43993613296bdc9ec9d0a30789af5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 12 May 2023 21:55:09 -0400 Subject: [PATCH] radeonsi: decompress DCC for SDMA if we're really going to use SDMA change the order of operations Reviewed-by: Qiang Yu Part-of: --- src/gallium/drivers/radeonsi/si_sdma_copy_image.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_sdma_copy_image.c b/src/gallium/drivers/radeonsi/si_sdma_copy_image.c index ec020ceef9d..5af6a4749b5 100644 --- a/src/gallium/drivers/radeonsi/si_sdma_copy_image.c +++ b/src/gallium/drivers/radeonsi/si_sdma_copy_image.c @@ -376,16 +376,18 @@ bool si_sdma_copy_image(struct si_context *sctx, struct si_texture *dst, struct if (!si_prepare_for_sdma_copy(sctx, dst, src)) return false; - /* Decompress DCC on older chips */ - if (vi_dcc_enabled(src, 0) && sctx->gfx_level < GFX10) - si_decompress_dcc(sctx, src); /* TODO: DCC compression is possible on GFX10+. See si_set_mutable_tex_desc_fields for * additional constraints. - * For now, the only use-case of SDMA is DRI_PRIME tiled->linear copy, so this is not - * implemented. */ + * For now, the only use-case of SDMA is DRI_PRIME tiled->linear copy, and linear dst + * never has DCC. + */ if (vi_dcc_enabled(dst, 0)) return false; + /* Decompress DCC on older chips where SDMA can't read it. */ + if (vi_dcc_enabled(src, 0) && sctx->gfx_level < GFX10) + si_decompress_dcc(sctx, src); + /* Always flush the gfx queue to get the winsys to handle the dependencies for us. */ si_flush_gfx_cs(sctx, 0, NULL);