diff --git a/src/compiler/nir/nir_opt_vectorize.c b/src/compiler/nir/nir_opt_vectorize.c
index fad5b6896db..e03cd194bfd 100644
--- a/src/compiler/nir/nir_opt_vectorize.c
+++ b/src/compiler/nir/nir_opt_vectorize.c
@@ -455,6 +455,11 @@ instr_try_combine_alu(struct set *instr_set, nir_alu_instr *alu1, nir_alu_instr
     */
    new_alu->exact = alu1->exact || alu2->exact;
 
+   /* fp_fast_math is a set of FLOAT_CONTROLS_*_PRESERVE_*.  Preserve anything
+    * preserved by either instruction.
+    */
+   new_alu->fp_fast_math = alu1->fp_fast_math | alu2->fp_fast_math;
+
    /* If all channels don't wrap, we can say that the whole vector doesn't
     * wrap.
     */
diff --git a/src/nouveau/ci/nvk-ga106-fails.txt b/src/nouveau/ci/nvk-ga106-fails.txt
index 64ab6094263..b8debcf27f6 100644
--- a/src/nouveau/ci/nvk-ga106-fails.txt
+++ b/src/nouveau/ci/nvk-ga106-fails.txt
@@ -272,10 +272,3 @@ dEQP-VK.pipeline.shader_object_linked_binary.pipeline_cache.robustness2.storage,
 dEQP-VK.pipeline.shader_object_linked_spirv.pipeline_cache.robustness2.storage,Fail
 dEQP-VK.pipeline.shader_object_unlinked_binary.pipeline_cache.robustness2.storage,Fail
 dEQP-VK.pipeline.shader_object_unlinked_spirv.pipeline_cache.robustness2.storage,Fail
-
-dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.generated_args.signed_zero_sub_var_preserve,Fail
-dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.generated_args.signed_zero_sub_var_preserve_nostorage,Fail
-dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.generated_args.signed_zero_sub_var_preserve_frag,Fail
-dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.generated_args.signed_zero_sub_var_preserve_nostorage_frag,Fail
-dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.generated_args.signed_zero_sub_var_preserve_nostorage_vert,Fail
-dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.generated_args.signed_zero_sub_var_preserve_vert,Fail