From 51893699a21fd4dafafb0e76de1e4899f056cc18 Mon Sep 17 00:00:00 2001
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Tue, 4 Nov 2025 12:25:50 +0200
Subject: [PATCH] brw: stop emitting flush operations for begin/end interlock

NIR barrier intrinsics are already added for required flushing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38242>
---
 src/intel/compiler/brw/brw_from_nir.cpp       | 53 ++++++++++++-------
 .../compiler/brw/brw_lower_logical_sends.cpp  |  5 --
 2 files changed, 34 insertions(+), 24 deletions(-)

diff --git a/src/intel/compiler/brw/brw_from_nir.cpp b/src/intel/compiler/brw/brw_from_nir.cpp
index 3257df44a3c..69b4b70ebc7 100644
--- a/src/intel/compiler/brw/brw_from_nir.cpp
+++ b/src/intel/compiler/brw/brw_from_nir.cpp
@@ -5077,29 +5077,44 @@ lsc_fence_descriptor_for_intrinsic(const struct intel_device_info *devinfo,
 {
    assert(devinfo->has_lsc);
 
-   enum lsc_fence_scope scope = LSC_FENCE_LOCAL;
-   enum lsc_flush_type flush_type = LSC_FLUSH_TYPE_NONE;
+   enum lsc_fence_scope scope;
+   enum lsc_flush_type flush_type;
 
-   if (nir_intrinsic_has_memory_scope(instr)) {
-      switch (nir_intrinsic_memory_scope(instr)) {
-      case SCOPE_DEVICE:
-      case SCOPE_QUEUE_FAMILY:
+   if (instr->intrinsic == nir_intrinsic_begin_invocation_interlock ||
+       instr->intrinsic == nir_intrinsic_end_invocation_interlock) {
+      /* Critical section begin/end don't need any flush, if the shader needs
+       * some barrier intrinsics will express the flushing needed.
+       *
+       * We choose scope TILE as we have to synchronize all the fragment
+       * shaders of a given draw call.
+       */
+      scope = LSC_FENCE_TILE;
+      flush_type = LSC_FLUSH_TYPE_NONE;
+   } else {
+      if (nir_intrinsic_has_memory_scope(instr)) {
+         switch (nir_intrinsic_memory_scope(instr)) {
+         case SCOPE_DEVICE:
+         case SCOPE_QUEUE_FAMILY:
+            scope = LSC_FENCE_TILE;
+            flush_type = LSC_FLUSH_TYPE_EVICT;
+            break;
+         case SCOPE_WORKGROUP:
+            scope = LSC_FENCE_THREADGROUP;
+            flush_type = LSC_FLUSH_TYPE_NONE;
+            break;
+         case SCOPE_SHADER_CALL:
+         case SCOPE_INVOCATION:
+         case SCOPE_SUBGROUP:
+         case SCOPE_NONE:
+            scope = LSC_FENCE_LOCAL;
+            flush_type = LSC_FLUSH_TYPE_NONE;
+            break;
+         }
+      } else {
+         /* No scope defined. */
          scope = LSC_FENCE_TILE;
          flush_type = LSC_FLUSH_TYPE_EVICT;
-         break;
-      case SCOPE_WORKGROUP:
-         scope = LSC_FENCE_THREADGROUP;
-         break;
-      case SCOPE_SHADER_CALL:
-      case SCOPE_INVOCATION:
-      case SCOPE_SUBGROUP:
-      case SCOPE_NONE:
-         break;
       }
-   } else {
-      /* No scope defined. */
-      scope = LSC_FENCE_TILE;
-      flush_type = LSC_FLUSH_TYPE_EVICT;
    }
    return lsc_fence_msg_desc(devinfo, scope, flush_type, true);
 }
diff --git a/src/intel/compiler/brw/brw_lower_logical_sends.cpp b/src/intel/compiler/brw/brw_lower_logical_sends.cpp
index 7cff8a301f1..7c4ddde3b1f 100644
--- a/src/intel/compiler/brw/brw_lower_logical_sends.cpp
+++ b/src/intel/compiler/brw/brw_lower_logical_sends.cpp
@@ -2199,11 +2199,6 @@ lower_lsc_memory_fence_and_interlock(const brw_builder &bld, struct brw_send_ins
       enum lsc_flush_type flush_type =
          lsc_fence_msg_desc_flush_type(devinfo, intrinsic_desc);
 
-      if (send->sfid == BRW_SFID_TGM) {
-         scope = LSC_FENCE_TILE;
-         flush_type = LSC_FLUSH_TYPE_EVICT;
-      }
-
       /* Wa_14012437816:
        *
        *   "For any fence greater than local scope, always set flush type to