From 50428f3c8a80f751d816a88b387461e1e388b532 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 30 Jan 2025 09:27:29 -0500 Subject: [PATCH] nir/lower_scratch_to_var: handle KERNELs need 64-bit indices or else we blow up. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Lionel Landwerlin Part-of: --- src/compiler/nir/nir_lower_scratch_to_var.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/nir/nir_lower_scratch_to_var.c b/src/compiler/nir/nir_lower_scratch_to_var.c index 0e01c960f6f..973c30f4207 100644 --- a/src/compiler/nir/nir_lower_scratch_to_var.c +++ b/src/compiler/nir/nir_lower_scratch_to_var.c @@ -60,9 +60,12 @@ lower_scratch_to_var(nir_builder *b, nir_intrinsic_instr *intr, void *data) nir_def *index = nir_udiv_aligned_4(b, intr->src[1].ssa); nir_def *value = intr->src[0].ssa; + index = nir_u2uN(b, index, nir_get_ptr_bitsize(b->shader)); nir_store_array_var(b, scratch, index, value, nir_component_mask(1)); } else if (intr->intrinsic == nir_intrinsic_load_scratch) { nir_def *index = nir_udiv_aligned_4(b, intr->src[0].ssa); + + index = nir_u2uN(b, index, nir_get_ptr_bitsize(b->shader)); nir_def_rewrite_uses(&intr->def, nir_load_array_var(b, scratch, index)); } else { return false;