diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c index 44f1ceb3707..66cc409c201 100644 --- a/src/gallium/drivers/zink/zink_screen.c +++ b/src/gallium/drivers/zink/zink_screen.c @@ -449,77 +449,6 @@ zink_screen_get_pipeline_cache(struct zink_screen *screen, struct zink_program * util_queue_add_job(&screen->cache_get_thread, pg, &pg->cache_fence, cache_get_job, NULL, 0); } -static int -zink_get_compute_param(struct pipe_screen *pscreen, - enum pipe_compute_cap param, void *ret) -{ - struct zink_screen *screen = zink_screen(pscreen); -#define RET(x) do { \ - if (ret) \ - memcpy(ret, x, sizeof(x)); \ - return sizeof(x); \ -} while (0) - - switch (param) { - case PIPE_COMPUTE_CAP_ADDRESS_BITS: - RET((uint32_t []){ 64 }); - - case PIPE_COMPUTE_CAP_IR_TARGET: - if (ret) - strcpy(ret, "nir"); - return 4; - - case PIPE_COMPUTE_CAP_GRID_DIMENSION: - RET((uint64_t []) { 3 }); - - case PIPE_COMPUTE_CAP_MAX_GRID_SIZE: - RET(((uint64_t []) { screen->info.props.limits.maxComputeWorkGroupCount[0], - screen->info.props.limits.maxComputeWorkGroupCount[1], - screen->info.props.limits.maxComputeWorkGroupCount[2] })); - - case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE: - /* MaxComputeWorkGroupSize[0..2] */ - RET(((uint64_t []) {screen->info.props.limits.maxComputeWorkGroupSize[0], - screen->info.props.limits.maxComputeWorkGroupSize[1], - screen->info.props.limits.maxComputeWorkGroupSize[2]})); - - case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK: - case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: - RET((uint64_t []) { screen->info.props.limits.maxComputeWorkGroupInvocations }); - - case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: - RET((uint64_t []) { screen->info.props.limits.maxComputeSharedMemorySize }); - - case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED: - RET((uint32_t []) { 1 }); - - case PIPE_COMPUTE_CAP_SUBGROUP_SIZES: - RET((uint32_t []) { screen->info.props11.subgroupSize }); - - case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: - RET((uint64_t []) { screen->clamp_video_mem }); - - case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE: - RET((uint64_t []) { screen->total_video_mem }); - - case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS: - // no way in vulkan to retrieve this information. - RET((uint32_t []) { 1 }); - - case PIPE_COMPUTE_CAP_MAX_SUBGROUPS: - RET((uint32_t []) { screen->info.props13.maxComputeWorkgroupSubgroups }); - - case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY: - case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: - case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE: - // XXX: I think these are for Clover... - return 0; - - default: - unreachable("unknown compute param"); - } -} - static uint32_t get_smallest_buffer_heap(struct zink_screen *screen) { @@ -564,201 +493,6 @@ have_fp32_filter_linear(struct zink_screen *screen) return true; } -static int -zink_get_shader_param(struct pipe_screen *pscreen, - gl_shader_stage shader, - enum pipe_shader_cap param) -{ - struct zink_screen *screen = zink_screen(pscreen); - - switch (param) { - case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: - switch (shader) { - case MESA_SHADER_FRAGMENT: - case MESA_SHADER_VERTEX: - return INT_MAX; - case MESA_SHADER_TESS_CTRL: - case MESA_SHADER_TESS_EVAL: - if (screen->info.feats.features.tessellationShader && - screen->info.have_KHR_maintenance2) - return INT_MAX; - break; - - case MESA_SHADER_GEOMETRY: - if (screen->info.feats.features.geometryShader) - return INT_MAX; - break; - - case MESA_SHADER_COMPUTE: - return INT_MAX; - default: - break; - } - return 0; - case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: - case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: - case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: - case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: - return INT_MAX; - - case PIPE_SHADER_CAP_MAX_INPUTS: { - uint32_t max = 0; - switch (shader) { - case MESA_SHADER_VERTEX: - max = MIN2(screen->info.props.limits.maxVertexInputAttributes, PIPE_MAX_ATTRIBS); - break; - case MESA_SHADER_TESS_CTRL: - max = screen->info.props.limits.maxTessellationControlPerVertexInputComponents / 4; - break; - case MESA_SHADER_TESS_EVAL: - max = screen->info.props.limits.maxTessellationEvaluationInputComponents / 4; - break; - case MESA_SHADER_GEOMETRY: - max = screen->info.props.limits.maxGeometryInputComponents / 4; - break; - case MESA_SHADER_FRAGMENT: - /* intel drivers report fewer components, but it's a value that's compatible - * with what we need for GL, so we can still force a conformant value here - */ - if (zink_driverid(screen) == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA || - zink_driverid(screen) == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS) - return 32; - max = screen->info.props.limits.maxFragmentInputComponents / 4; - break; - default: - return 0; /* unsupported stage */ - } - switch (shader) { - case MESA_SHADER_VERTEX: - case MESA_SHADER_TESS_EVAL: - case MESA_SHADER_GEOMETRY: - /* last vertex stage must support streamout, and this is capped in glsl compiler */ - return MIN2(max, MAX_VARYING); - default: break; - } - return MIN2(max, 64); // prevent overflowing struct shader_info::inputs_read - } - - case PIPE_SHADER_CAP_MAX_OUTPUTS: { - uint32_t max = 0; - switch (shader) { - case MESA_SHADER_VERTEX: - max = screen->info.props.limits.maxVertexOutputComponents / 4; - break; - case MESA_SHADER_TESS_CTRL: - max = screen->info.props.limits.maxTessellationControlPerVertexOutputComponents / 4; - break; - case MESA_SHADER_TESS_EVAL: - max = screen->info.props.limits.maxTessellationEvaluationOutputComponents / 4; - break; - case MESA_SHADER_GEOMETRY: - max = screen->info.props.limits.maxGeometryOutputComponents / 4; - break; - case MESA_SHADER_FRAGMENT: - max = screen->info.props.limits.maxColorAttachments; - break; - default: - return 0; /* unsupported stage */ - } - return MIN2(max, 64); // prevent overflowing struct shader_info::outputs_read/written - } - - case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE: - /* At least 16384 is guaranteed by VK spec */ - assert(screen->info.props.limits.maxUniformBufferRange >= 16384); - /* but Gallium can't handle values that are too big */ - return MIN3(get_smallest_buffer_heap(screen), - screen->info.props.limits.maxUniformBufferRange, BITFIELD_BIT(31)); - - case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: - return MIN2(screen->info.props.limits.maxPerStageDescriptorUniformBuffers, - PIPE_MAX_CONSTANT_BUFFERS); - - case PIPE_SHADER_CAP_MAX_TEMPS: - return INT_MAX; - - case PIPE_SHADER_CAP_INTEGERS: - return 1; - - case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: - case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: - return 1; - - case PIPE_SHADER_CAP_SUBROUTINES: - case PIPE_SHADER_CAP_INT64_ATOMICS: - case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: - return 0; /* not implemented */ - - case PIPE_SHADER_CAP_FP16_CONST_BUFFERS: - //enabling this breaks GTF-GL46.gtf21.GL2Tests.glGetUniform.glGetUniform - //return screen->info.feats11.uniformAndStorageBuffer16BitAccess || - //(screen->info.have_KHR_16bit_storage && screen->info.storage_16bit_feats.uniformAndStorageBuffer16BitAccess); - return 0; - case PIPE_SHADER_CAP_FP16_DERIVATIVES: - return 0; //spirv requires 32bit derivative srcs and dests - case PIPE_SHADER_CAP_FP16: - return screen->info.feats12.shaderFloat16 || - (screen->info.have_KHR_shader_float16_int8 && - screen->info.shader_float16_int8_feats.shaderFloat16); - - case PIPE_SHADER_CAP_INT16: - return screen->info.feats.features.shaderInt16; - - case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: - return 0; /* not implemented */ - - case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: - case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: - return MIN2(MIN2(screen->info.props.limits.maxPerStageDescriptorSamplers, - screen->info.props.limits.maxPerStageDescriptorSampledImages), - PIPE_MAX_SAMPLERS); - - case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: - return 0; /* no idea */ - - case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: - switch (shader) { - case MESA_SHADER_VERTEX: - case MESA_SHADER_TESS_CTRL: - case MESA_SHADER_TESS_EVAL: - case MESA_SHADER_GEOMETRY: - if (!screen->info.feats.features.vertexPipelineStoresAndAtomics) - return 0; - break; - - case MESA_SHADER_FRAGMENT: - if (!screen->info.feats.features.fragmentStoresAndAtomics) - return 0; - break; - - default: - break; - } - - /* TODO: this limitation is dumb, and will need some fixes in mesa */ - return MIN2(screen->info.props.limits.maxPerStageDescriptorStorageBuffers, PIPE_MAX_SHADER_BUFFERS); - - case PIPE_SHADER_CAP_SUPPORTED_IRS: - return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI); - - case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: - if (screen->info.feats.features.shaderStorageImageExtendedFormats && - screen->info.feats.features.shaderStorageImageWriteWithoutFormat) - return MIN2(screen->info.props.limits.maxPerStageDescriptorStorageImages, - ZINK_MAX_SHADER_IMAGES); - return 0; - - case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: - case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - return 0; /* not implemented */ - case PIPE_SHADER_CAP_CONT_SUPPORTED: - return 1; - } - - /* should only get here on unhandled cases */ - return 0; -} - static void zink_init_shader_caps(struct zink_screen *screen) { @@ -3720,10 +3454,8 @@ zink_internal_create_screen(const struct pipe_screen_config *config, int64_t dev screen->base.is_parallel_shader_compilation_finished = zink_is_parallel_shader_compilation_finished; screen->base.get_vendor = zink_get_vendor; screen->base.get_device_vendor = zink_get_device_vendor; - screen->base.get_compute_param = zink_get_compute_param; screen->base.get_timestamp = zink_get_timestamp; screen->base.query_memory_info = zink_query_memory_info; - screen->base.get_shader_param = zink_get_shader_param; screen->base.get_compiler_options = zink_get_compiler_options; screen->base.get_sample_pixel_grid = zink_get_sample_pixel_grid; screen->base.is_compute_copy_faster = zink_is_compute_copy_faster;