From 4debb5bbc42fa97c7c3c7f61c8c0bdf10f83ae1d Mon Sep 17 00:00:00 2001 From: Jianxun Zhang Date: Wed, 12 Jun 2024 15:34:48 -0700 Subject: [PATCH] isl: Implement a part of WA_22018390030 (xe2) Fix: piglit test gl-3.2-layered-rendering-clear-color-all-types 2d_array mipmapped -auto -fbo Signed-off-by: Jianxun Zhang Reviewed-by: Rohan Garg Reviewed-by: Lionel Landwerlin Signed-off-by: Jianxun Zhang Part-of: --- src/intel/isl/isl_gfx20.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/intel/isl/isl_gfx20.c b/src/intel/isl/isl_gfx20.c index 97dc415b3c5..36d685e5a8a 100644 --- a/src/intel/isl/isl_gfx20.c +++ b/src/intel/isl/isl_gfx20.c @@ -21,6 +21,7 @@ * IN THE SOFTWARE. */ +#include "dev/intel_debug.h" #include "isl_gfx20.h" #include "isl_priv.h" @@ -221,6 +222,19 @@ isl_gfx20_choose_image_alignment_el(const struct isl_device *dev, * is always Linear. */ *image_align_el = isl_extent3d(128 * 8 / fmtl->bpb, 4, 1); + + /* WA_22018390030: + * + * Don't choose VALIGN_4 on Xe2 for color, non-volumetric, Tile4 surfaces + * which can be fast cleared. We choose the next smallest option instead, + * VALIGN_8. + */ + if (!INTEL_DEBUG(DEBUG_NO_FAST_CLEAR) && + intel_needs_workaround(dev->info, 22018390030) && + tiling == ISL_TILING_4 && + info->dim != ISL_SURF_DIM_3D) { + image_align_el->h = 8; + } } else if (fmtl->bpb >= 64) { assert(fmtl->bpb == 64 || fmtl->bpb == 128); /* From RENDER_SURFACE_STATE::SurfaceHorizontalAlignment,