From 4bdd226ab6154992b877f40ecf853273b26cbd1b Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Tue, 30 Aug 2022 12:12:54 -0700 Subject: [PATCH] freedreno/ir3: Switch to NIR for a3xx/a4xx's vertex id lowering. We already have the compiler pass, just need to set the flag. We were the last consumer of glsl's lower_vertex_id. Reviewed-by: Rob Clark Part-of: --- src/freedreno/ir3/ir3_compiler.c | 8 ++++---- src/gallium/drivers/freedreno/freedreno_screen.c | 3 --- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c index 555c46bffcd..e740d2475a5 100644 --- a/src/freedreno/ir3/ir3_compiler.c +++ b/src/freedreno/ir3/ir3_compiler.c @@ -284,11 +284,11 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id, compiler->nir_options.has_sudot_4x8 = true, compiler->nir_options.has_udot_4x8 = dev_info->a6xx.has_dp2acc; compiler->nir_options.has_sudot_4x8 = dev_info->a6xx.has_dp2acc; - } else { - + } else if (compiler->gen >= 3 && compiler->gen <= 4) { + compiler->nir_options.vertex_id_zero_based = true; + } else if (compiler->gen <= 2) { /* a2xx compiler doesn't handle indirect: */ - if (compiler->gen <= 2) - compiler->nir_options.force_indirect_unrolling = nir_var_all; + compiler->nir_options.force_indirect_unrolling = nir_var_all; } /* 16-bit ALU op generation is mostly controlled by frontend compiler options, but diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index f007b0e6ff1..d9f6dccd5b6 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -230,9 +230,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: return screen->has_robustness; - case PIPE_CAP_VERTEXID_NOBASE: - return is_a3xx(screen) || is_a4xx(screen); - case PIPE_CAP_COMPUTE: return has_compute(screen);