diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index fc26eb561ce..8056bf557a1 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -688,9 +688,9 @@ gen6_blorp_emit_wm_config(struct brw_context *brw,
    uint32_t dw2, dw4, dw5, dw6;
 
    /* Even when thread dispatch is disabled, max threads (dw5.25:31) must be
-    * nonzero to prevent the GPU from hanging. See the valid ranges in the
-    * BSpec, Volume 2a.11 Windower, Section 3DSTATE_WM, Dword 5.25:31
-    * "Maximum Number Of Threads".
+    * nonzero to prevent the GPU from hanging.  While the documentation doesn't
+    * mention this explicitly, it notes that the valid range for the field is
+    * [1,39] = [2,40] threads, which excludes zero.
     *
     * To be safe (and to minimize extraneous code) we go ahead and fully
     * configure the WM state whether or not there is a WM program.
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 199866ec24d..cfac411403c 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -526,8 +526,8 @@ gen7_blorp_emit_wm_config(struct brw_context *brw,
  *
  * Pixel shader dispatch is disabled above in 3DSTATE_WM, dw1.29. Despite
  * that, thread dispatch info must still be specified.
- *     - Maximum Number of Threads (dw4.24:31) must be nonzero, as the BSpec
- *       states that the valid range for this field is [0x3, 0x2f].
+ *     - Maximum Number of Threads (dw4.24:31) must be nonzero, as the
+ *       valid range for this field is [0x3, 0x2f].
  *     - A dispatch mode must be given; that is, at least one of the
  *       "N Pixel Dispatch Enable" (N=8,16,32) fields must be set. This was
  *       discovered through simulator error messages.