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ir3: Unconditionally enable MERGEDREGS on a6xx

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As per discussion on !5059, we don't see any particular reason as to
why MERGEDREGS should be disabled on HS/DS/GS, and none of the dEQP
tests (both VK and GL) fail when MERGEDREGS is enabled. In fact, some
of the VK dEQP tests fail when MERGEDREGS is disabled (e.g. tests
with shaders that employ a0.x). As a result, let's just enable
MERGEDREGS unconditionally on a6xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
This commit is contained in:
Brian Ho
2020-06-18 12:17:31 -04:00
committed by Marge Bot
parent 7a836ec631
commit 497671be35
1 changed files with 1 additions and 20 deletions
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src/freedreno/ir3/ir3_shader.c
+1 -20
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@@ -184,26 +184,7 @@ create_variant(struct ir3_shader *shader, const struct ir3_shader_key *key,
v->nonbinning = nonbinning;
v->key = *key;
v->type = shader->type;
if (shader->compiler->gpu_id >= 600) {
switch (v->type) {
case MESA_SHADER_TESS_CTRL:
case MESA_SHADER_TESS_EVAL:
v->mergedregs = false;
break;
case MESA_SHADER_VERTEX:
case MESA_SHADER_GEOMETRY:
/* For VS/GS, normally do mergedregs, but if there is tess
* we need to not used MERGEDREGS
*/
v->mergedregs = !key->tessellation;
break;
default:
v->mergedregs = true;
}
} else {
v->mergedregs = false;
}
v->mergedregs = shader->compiler->gpu_id >= 600;
if (!v->binning_pass)
v->const_state = rzalloc_size(v, sizeof(*v->const_state));